Lines Matching refs:VTD_PAGE_SHIFT

49 #define __DOMAIN_MAX_PFN(gaw)  ((((uint64_t)1) << ((gaw) - VTD_PAGE_SHIFT)) - 1)
56 #define DOMAIN_MAX_ADDR(gaw) (((uint64_t)__DOMAIN_MAX_PFN(gaw)) << VTD_PAGE_SHIFT)
289 int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT; in domain_pfn_supported()
803 pgtable_walk(iommu, addr >> VTD_PAGE_SHIFT, bus, devfn, pgtable, level); in dmar_fault_dump_ptes()
840 pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE; in pfn_to_dma_pte()
1284 !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) in iommu_enable_pci_caps()
1769 cache_tag_flush_range(domain, start_pfn << VTD_PAGE_SHIFT, in switch_to_super_page()
1770 end_pfn << VTD_PAGE_SHIFT, 0); in switch_to_super_page()
1812 pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | attr; in __domain_mapping()
3676 return __domain_mapping(dmar_domain, iova >> VTD_PAGE_SHIFT, in intel_iommu_map()
3677 hpa >> VTD_PAGE_SHIFT, size, prot, gfp); in intel_iommu_map()
3712 if (unlikely(!pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT, in intel_iommu_unmap()
3719 start_pfn = iova >> VTD_PAGE_SHIFT; in intel_iommu_unmap()
3720 last_pfn = (iova + size - 1) >> VTD_PAGE_SHIFT; in intel_iommu_unmap()
3764 pte = pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT, &level, in intel_iommu_iova_to_phys()
3769 VTD_PAGE_SHIFT) - 1)); in intel_iommu_iova_to_phys()
3912 pci_prepare_ats(pdev, VTD_PAGE_SHIFT); in intel_iommu_probe_device()
4473 pte = pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT, &lvl, in intel_iommu_read_and_clear_dirty()
4475 pgsize = level_size(lvl) << VTD_PAGE_SHIFT; in intel_iommu_read_and_clear_dirty()