885 	u64 cap, ecap;  in dmar_validate_one_drhd()  local
903 	ecap = dmar_readq(addr + DMAR_ECAP_REG);  in dmar_validate_one_drhd()
910 	if (cap == (uint64_t)-1 && ecap == (uint64_t)-1) {  in dmar_validate_one_drhd()
989 	iommu->ecap = dmar_readq(iommu->reg + DMAR_ECAP_REG);  in map_iommu()
991 	if (iommu->cap == (uint64_t)-1 && iommu->ecap == (uint64_t)-1) {  in map_iommu()
998 	map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),  in map_iommu()
1072 	    (!ecap_smts(iommu->ecap) || ecap_slts(iommu->ecap))) {  in alloc_iommu()
1104 	pr_info("%s: reg_base_addr %llx ver %d:%d cap %llx ecap %llx\n",  in alloc_iommu()
1109 		(unsigned long long)iommu->ecap);  in alloc_iommu()
1126 	 * A value of N in PSS field of eCap register indicates hardware  in alloc_iommu()
1130 		iommu->iommu.max_pasids = 2UL << ecap_pss(iommu->ecap);  in alloc_iommu()
1613 	if (!ecap_qis(iommu->ecap))  in dmar_disable_qi()
1656 	if (ecap_smts(iommu->ecap))  in __dmar_enable_qi()
1686 	if (!ecap_qis(iommu->ecap))  in dmar_enable_qi()
1705 	order = ecap_smts(iommu->ecap) ? 1 : 0;  in dmar_enable_qi()
2090 	if (!ecap_qis(iommu->ecap))  in dmar_reenable_qi()