Lines Matching refs:iommu_writel
91 iommu_writel(struct qcom_iommu_ctx *ctx, unsigned reg, u32 val) in iommu_writel() function
124 iommu_writel(ctx, ARM_SMMU_CB_TLBSYNC, 0); in qcom_iommu_tlb_sync()
141 iommu_writel(ctx, ARM_SMMU_CB_S1_TLBIASID, ctx->asid); in qcom_iommu_tlb_inv_context()
163 iommu_writel(ctx, reg, iova); in qcom_iommu_tlb_inv_range_nosync()
210 iommu_writel(ctx, ARM_SMMU_CB_FSR, fsr); in qcom_iommu_fault()
211 iommu_writel(ctx, ARM_SMMU_CB_RESUME, ARM_SMMU_RESUME_TERMINATE); in qcom_iommu_fault()
273 iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0); in qcom_iommu_init_domain()
276 iommu_writel(ctx, ARM_SMMU_CB_FAR, 0); in qcom_iommu_init_domain()
277 iommu_writel(ctx, ARM_SMMU_CB_FSR, ARM_SMMU_CB_FSR_FAULT); in qcom_iommu_init_domain()
286 iommu_writel(ctx, ARM_SMMU_CB_TCR2, in qcom_iommu_init_domain()
288 iommu_writel(ctx, ARM_SMMU_CB_TCR, in qcom_iommu_init_domain()
292 iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR0, in qcom_iommu_init_domain()
294 iommu_writel(ctx, ARM_SMMU_CB_S1_MAIR1, in qcom_iommu_init_domain()
306 iommu_writel(ctx, ARM_SMMU_CB_SCTLR, reg); in qcom_iommu_init_domain()
412 iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0); in qcom_iommu_identity_attach()
711 iommu_writel(ctx, ARM_SMMU_CB_FSR, iommu_readl(ctx, ARM_SMMU_CB_FSR)); in qcom_iommu_ctx_probe()