510 				       struct io_pgtable_cfg *pgtbl_cfg)  in arm_smmu_init_context_bank()  argument
521 			cb->tcr[0] = pgtbl_cfg->arm_v7s_cfg.tcr;  in arm_smmu_init_context_bank()
523 			cb->tcr[0] = arm_smmu_lpae_tcr(pgtbl_cfg);  in arm_smmu_init_context_bank()
524 			cb->tcr[1] = arm_smmu_lpae_tcr2(pgtbl_cfg);  in arm_smmu_init_context_bank()
531 		cb->tcr[0] = arm_smmu_lpae_vtcr(pgtbl_cfg);  in arm_smmu_init_context_bank()
537 			cb->ttbr[0] = pgtbl_cfg->arm_v7s_cfg.ttbr;  in arm_smmu_init_context_bank()
545 			if (pgtbl_cfg->quirks & IO_PGTABLE_QUIRK_ARM_TTBR1)  in arm_smmu_init_context_bank()
546 				cb->ttbr[1] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr;  in arm_smmu_init_context_bank()
548 				cb->ttbr[0] |= pgtbl_cfg->arm_lpae_s1_cfg.ttbr;  in arm_smmu_init_context_bank()
551 		cb->ttbr[0] = pgtbl_cfg->arm_lpae_s2_cfg.vttbr;  in arm_smmu_init_context_bank()
557 			cb->mair[0] = pgtbl_cfg->arm_v7s_cfg.prrr;  in arm_smmu_init_context_bank()
558 			cb->mair[1] = pgtbl_cfg->arm_v7s_cfg.nmrr;  in arm_smmu_init_context_bank()
560 			cb->mair[0] = pgtbl_cfg->arm_lpae_s1_cfg.mair;  in arm_smmu_init_context_bank()
561 			cb->mair[1] = pgtbl_cfg->arm_lpae_s1_cfg.mair >> 32;  in arm_smmu_init_context_bank()
672 	struct io_pgtable_cfg pgtbl_cfg;  in arm_smmu_init_domain_context()  local
797 	pgtbl_cfg = (struct io_pgtable_cfg) {  in arm_smmu_init_domain_context()
807 		ret = smmu->impl->init_context(smmu_domain, &pgtbl_cfg, dev);  in arm_smmu_init_domain_context()
813 		pgtbl_cfg.quirks |= smmu_domain->pgtbl_quirks;  in arm_smmu_init_domain_context()
815 	pgtbl_ops = alloc_io_pgtable_ops(fmt, &pgtbl_cfg, smmu_domain);  in arm_smmu_init_domain_context()
822 	domain->pgsize_bitmap = pgtbl_cfg.pgsize_bitmap;  in arm_smmu_init_domain_context()
824 	if (pgtbl_cfg.quirks & IO_PGTABLE_QUIRK_ARM_TTBR1) {  in arm_smmu_init_domain_context()
834 	arm_smmu_init_context_bank(smmu_domain, &pgtbl_cfg);  in arm_smmu_init_domain_context()