64 	struct arm_smmu_domain *smmu_domain = (void *)cookie;  in qcom_adreno_smmu_get_fault_info()  local
65 	struct arm_smmu_cfg *cfg = &smmu_domain->cfg;  in qcom_adreno_smmu_get_fault_info()
66 	struct arm_smmu_device *smmu = smmu_domain->smmu;  in qcom_adreno_smmu_get_fault_info()
79 	struct arm_smmu_domain *smmu_domain = (void *)cookie;  in qcom_adreno_smmu_set_stall()  local
80 	struct arm_smmu_cfg *cfg = &smmu_domain->cfg;  in qcom_adreno_smmu_set_stall()
81 	struct qcom_smmu *qsmmu = to_qcom_smmu(smmu_domain->smmu);  in qcom_adreno_smmu_set_stall()
91 	struct arm_smmu_domain *smmu_domain = (void *)cookie;  in qcom_adreno_smmu_resume_translation()  local
92 	struct arm_smmu_cfg *cfg = &smmu_domain->cfg;  in qcom_adreno_smmu_resume_translation()
93 	struct arm_smmu_device *smmu = smmu_domain->smmu;  in qcom_adreno_smmu_resume_translation()
126 	struct arm_smmu_domain *smmu_domain = (void *)cookie;  in qcom_adreno_smmu_get_ttbr1_cfg()  local
128 		io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops);  in qcom_adreno_smmu_get_ttbr1_cfg()
141 	struct arm_smmu_domain *smmu_domain = (void *)cookie;  in qcom_adreno_smmu_set_ttbr0_cfg()  local
142 	struct io_pgtable *pgtable = io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops);  in qcom_adreno_smmu_set_ttbr0_cfg()
143 	struct arm_smmu_cfg *cfg = &smmu_domain->cfg;  in qcom_adreno_smmu_set_ttbr0_cfg()
144 	struct arm_smmu_cb *cb = &smmu_domain->smmu->cbs[cfg->cbndx];  in qcom_adreno_smmu_set_ttbr0_cfg()
174 	arm_smmu_write_context_bank(smmu_domain->smmu, cb->cfg->cbndx);  in qcom_adreno_smmu_set_ttbr0_cfg()
179 static int qcom_adreno_smmu_alloc_context_bank(struct arm_smmu_domain *smmu_domain,  in qcom_adreno_smmu_alloc_context_bank()  argument
210 static int qcom_adreno_smmu_init_context(struct arm_smmu_domain *smmu_domain,  in qcom_adreno_smmu_init_context()  argument
215 	smmu_domain->cfg.flush_walk_prefer_tlbiasid = true;  in qcom_adreno_smmu_init_context()
226 	if (qcom_adreno_can_do_ttbr1(smmu_domain->smmu) &&  in qcom_adreno_smmu_init_context()
227 	    (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) &&  in qcom_adreno_smmu_init_context()
228 	    (smmu_domain->cfg.fmt == ARM_SMMU_CTX_FMT_AARCH64))  in qcom_adreno_smmu_init_context()
236 	priv->cookie = smmu_domain;  in qcom_adreno_smmu_init_context()
269 static int qcom_smmu_init_context(struct arm_smmu_domain *smmu_domain,  in qcom_smmu_init_context()  argument
272 	smmu_domain->cfg.flush_walk_prefer_tlbiasid = true;  in qcom_smmu_init_context()