Lines Matching full:adapt
610 u32 ts_wires = 0, adapt; in mxs_lradc_ts_probe() local
631 if (of_property_read_u32(node, "fsl,ave-ctrl", &adapt)) { in mxs_lradc_ts_probe()
634 if (adapt >= 1 && adapt <= 32) { in mxs_lradc_ts_probe()
635 ts->over_sample_cnt = adapt; in mxs_lradc_ts_probe()
638 adapt); in mxs_lradc_ts_probe()
643 if (of_property_read_u32(node, "fsl,ave-delay", &adapt)) { in mxs_lradc_ts_probe()
646 if (adapt >= 2 && adapt <= LRADC_DELAY_DELAY_MASK + 1) { in mxs_lradc_ts_probe()
647 ts->over_sample_delay = adapt; in mxs_lradc_ts_probe()
650 adapt); in mxs_lradc_ts_probe()
655 if (of_property_read_u32(node, "fsl,settling", &adapt)) { in mxs_lradc_ts_probe()
658 if (adapt >= 1 && adapt <= LRADC_DELAY_DELAY_MASK) { in mxs_lradc_ts_probe()
659 ts->settling_delay = adapt; in mxs_lradc_ts_probe()
662 adapt); in mxs_lradc_ts_probe()