Lines Matching +full:supports +full:- +full:cqe
2 * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
7 * 2-Clause License. This program is distributed in the hope that it
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
17 * The BSD 2-Clause License
23 * - Redistributions of source code must retain the above
27 * - Redistributions in binary form must reproduce the above
68 * Masks and accessors for page directory, which is a two-level lookup:
69 * page directory -> page table -> page. Only one directory for now, but we
83 * Max MSI-X vectors.
101 #define PVRDMA_CQ_FLAG_ARMED_SOL BIT(0) /* Armed for solicited-only. */
129 * supports RoCE as mode, so only the different GID types for RoCE are
137 * Version checks. This checks whether each version supports specific
142 (_dev->dsr_version == PVRDMA_ROCEV1_VERSION && \
143 _dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V1)
146 (_dev->dsr_version >= PVRDMA_ROCEV2_VERSION && \
147 (_dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V1 || \
148 _dev->dsr->caps.gid_types == PVRDMA_GID_TYPE_FLAG_ROCE_V2)) \
151 ((_dev->dsr->caps.mode == PVRDMA_DEVICE_MODE_ROCE) && \
162 PVRDMA_PCI_RESOURCE_MSIX, /* BAR0: MSI-X, MMIO. */
164 PVRDMA_PCI_RESOURCE_UAR, /* BAR2: UAR pages, MMIO, 64-bit. */
189 PVRDMA_GOS_BITS_32, /* 32-bit. */
190 PVRDMA_GOS_BITS_64, /* 64-bit. */
209 u32 pad; /* Pad to 8-byte alignment. */
276 u32 pad; /* Pad to 8-byte align. */
286 u64 uar_pfn64; /* W: 64-bit UAR page frame. */
420 u64 pfn64; /* 64-bit UAR page frame number */
483 u32 cqe; member
491 u32 cqe; member
497 u32 cqe; member
502 u32 cqe; member