127 	dd->pcidev = pdev;  in qib_pcie_ddinit()
170 	pci_disable_device(dd->pcidev);  in qib_pcie_ddcleanup()
171 	pci_release_regions(dd->pcidev);  in qib_pcie_ddcleanup()
173 	pci_set_drvdata(dd->pcidev, NULL);  in qib_pcie_ddcleanup()
183 	struct pci_dev *pdev = dd->pcidev;  in qib_cache_msi_info()
203 	if (!pci_is_pcie(dd->pcidev)) {  in qib_pcie_params()
215 	nvec = pci_alloc_irq_vectors(dd->pcidev, 1, maxvec, flags);  in qib_pcie_params()
225 		*nent = !dd->pcidev->msix_enabled ? 0 : nvec;  in qib_pcie_params()
227 	if (dd->pcidev->msi_enabled)  in qib_pcie_params()
228 		qib_cache_msi_info(dd, dd->pcidev->msi_cap);  in qib_pcie_params()
230 	pcie_capability_read_word(dd->pcidev, PCI_EXP_LNKSTA, &linkstat);  in qib_pcie_params()
282 	pci_free_irq(dd->pcidev, 0, dd);  in qib_free_irq()
283 	pci_free_irq_vectors(dd->pcidev);  in qib_free_irq()
304 	pos = dd->pcidev->msi_cap;  in qib_reinit_intr()
312 	pci_write_config_dword(dd->pcidev, pos + PCI_MSI_ADDRESS_LO,  in qib_reinit_intr()
314 	pci_write_config_dword(dd->pcidev, pos + PCI_MSI_ADDRESS_HI,  in qib_reinit_intr()
316 	pci_read_config_word(dd->pcidev, pos + PCI_MSI_FLAGS, &control);  in qib_reinit_intr()
319 		pci_write_config_word(dd->pcidev, pos + PCI_MSI_FLAGS,  in qib_reinit_intr()
323 	pci_write_config_word(dd->pcidev, pos +  in qib_reinit_intr()
334 	pci_set_master(dd->pcidev);  in qib_reinit_intr()
345 	pci_read_config_word(dd->pcidev, PCI_COMMAND, cmd);  in qib_pcie_getcmd()
346 	pci_read_config_byte(dd->pcidev, PCI_INTERRUPT_LINE, iline);  in qib_pcie_getcmd()
347 	pci_read_config_byte(dd->pcidev, PCI_CACHE_LINE_SIZE, cline);  in qib_pcie_getcmd()
354 	r = pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0,  in qib_pcie_reenable()
358 	r = pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_1,  in qib_pcie_reenable()
363 	pci_write_config_word(dd->pcidev, PCI_COMMAND, cmd);  in qib_pcie_reenable()
364 	pci_write_config_byte(dd->pcidev, PCI_INTERRUPT_LINE, iline);  in qib_pcie_reenable()
365 	pci_write_config_byte(dd->pcidev, PCI_CACHE_LINE_SIZE, cline);  in qib_pcie_reenable()
366 	r = pci_enable_device(dd->pcidev);  in qib_pcie_reenable()
393 	parent = dd->pcidev->bus->self;  in qib_tune_pcie_coalesce()
395 		qib_devinfo(dd->pcidev, "Parent not root\n");  in qib_tune_pcie_coalesce()
457 	parent = dd->pcidev->bus->self;  in qib_tune_pcie_caps()
459 		qib_devinfo(dd->pcidev, "Parent not root\n");  in qib_tune_pcie_caps()
463 	if (!pci_is_pcie(parent) || !pci_is_pcie(dd->pcidev))  in qib_tune_pcie_caps()
469 	ep_mpss = dd->pcidev->pcie_mpss;  in qib_tune_pcie_caps()
470 	ep_mps = ffs(pcie_get_mps(dd->pcidev)) - 8;  in qib_tune_pcie_caps()
487 		pcie_set_mps(dd->pcidev, 128 << ep_mps);  in qib_tune_pcie_caps()
501 	ep_mrrs = pcie_get_readrq(dd->pcidev);  in qib_tune_pcie_caps()
509 		pcie_set_readrq(dd->pcidev, ep_mrrs);  in qib_tune_pcie_caps()