Lines Matching refs:qib_write_kreg
368 static inline void qib_write_kreg(const struct qib_devdata *dd, in qib_write_kreg() function
386 qib_write_kreg(dd, regno + ctxt, value); in qib_write_kreg_ctxt()
683 qib_write_kreg(dd, kr_intmask, ~0ULL); in qib_6120_set_intr_state()
685 qib_write_kreg(dd, kr_intclear, 0ULL); in qib_6120_set_intr_state()
687 qib_write_kreg(dd, kr_intmask, 0ULL); in qib_6120_set_intr_state()
708 qib_write_kreg(dd, kr_errmask, 0ULL); in qib_6120_clear_freeze()
716 qib_write_kreg(dd, kr_control, dd->control); in qib_6120_clear_freeze()
728 qib_write_kreg(dd, kr_hwerrclear, 0ULL); in qib_6120_clear_freeze()
729 qib_write_kreg(dd, kr_errclear, E_SPKT_ERRS_IGNORE); in qib_6120_clear_freeze()
730 qib_write_kreg(dd, kr_errmask, dd->cspec->errormask); in qib_6120_clear_freeze()
768 qib_write_kreg(dd, kr_hwerrclear, in qib_handle_6120_hwerrors()
817 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_handle_6120_hwerrors()
842 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_handle_6120_hwerrors()
851 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_handle_6120_hwerrors()
1040 qib_write_kreg(dd, kr_errclear, errs); in handle_6120_errors()
1149 qib_write_kreg(dd, kr_hwerrclear, ~HWE_MASK(PowerOnBISTFailed)); in qib_6120_init_hwerrors()
1150 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_6120_init_hwerrors()
1153 qib_write_kreg(dd, kr_errclear, ~0ULL); in qib_6120_init_hwerrors()
1155 qib_write_kreg(dd, kr_errmask, ~0ULL); in qib_6120_init_hwerrors()
1158 qib_write_kreg(dd, kr_intclear, ~0ULL); in qib_6120_init_hwerrors()
1160 qib_write_kreg(dd, kr_rcvbthqp, in qib_6120_init_hwerrors()
1174 qib_write_kreg(dd, kr_errclear, in qib_set_6120_armlaunch()
1179 qib_write_kreg(dd, kr_errmask, dd->cspec->errormask); in qib_set_6120_armlaunch()
1216 qib_write_kreg(dd, kr_ibcctrl, dd->cspec->ibcctrl | mod_wd); in qib_set_ib_6120_lstate()
1218 qib_write_kreg(dd, kr_scratch, 0); in qib_set_ib_6120_lstate()
1232 qib_write_kreg(dd, kr_control, 0ULL); in qib_6120_bringup_serdes()
1263 qib_write_kreg(dd, kr_ibcctrl, val); in qib_6120_bringup_serdes()
1280 qib_write_kreg(dd, kr_serdes_cfg0, val); in qib_6120_bringup_serdes()
1300 qib_write_kreg(dd, kr_serdes_cfg0, val); in qib_6120_bringup_serdes()
1312 qib_write_kreg(dd, kr_serdes_cfg0, val); in qib_6120_bringup_serdes()
1326 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_6120_bringup_serdes()
1336 qib_write_kreg(dd, kr_serdes_cfg1, config1); in qib_6120_bringup_serdes()
1349 qib_write_kreg(dd, kr_hwerrclear, hwstat); in qib_6120_bringup_serdes()
1350 qib_write_kreg(dd, kr_errclear, ERR_MASK(HardwareErr)); in qib_6120_bringup_serdes()
1355 qib_write_kreg(dd, kr_control, dd->control); in qib_6120_bringup_serdes()
1374 qib_write_kreg(dd, kr_control, in qib_6120_quiet_serdes()
1383 qib_write_kreg(dd, kr_hwdiagctrl, in qib_6120_quiet_serdes()
1402 qib_write_kreg(dd, kr_hwdiagctrl, diagc); in qib_6120_quiet_serdes()
1407 qib_write_kreg(dd, kr_serdes_cfg0, val); in qib_6120_quiet_serdes()
1469 qib_write_kreg(dd, kr_extctrl, extctl); in qib_6120_setup_setextled()
1504 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in qib_wantpiobuf_6120_intr()
1505 qib_write_kreg(dd, kr_scratch, 0ULL); in qib_wantpiobuf_6120_intr()
1574 qib_write_kreg(dd, kr_gpio_mask, in unlikely_6120_intr()
1579 qib_write_kreg(dd, kr_gpio_clear, (u64) to_clear); in unlikely_6120_intr()
1626 qib_write_kreg(dd, kr_intclear, istat); in qib_6120intr()
1697 qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask); in qib_setup_6120_interrupt()
1812 qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask); in qib_6120_setup_reset()
1880 qib_write_kreg(dd, kr_scratch, 0xfeeddeaf); in qib_6120_put_tid()
1882 qib_write_kreg(dd, kr_scratch, 0xdeadbeef); in qib_6120_put_tid()
2131 qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl); in rcvctrl_6120_mod()
2225 qib_write_kreg(dd, kr_sendctrl, tmp_dd_sendctrl | in sendctrl_6120_mod()
2227 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_6120_mod()
2242 qib_write_kreg(dd, kr_sendctrl, tmp_dd_sendctrl); in sendctrl_6120_mod()
2243 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_6120_mod()
2246 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in sendctrl_6120_mod()
2247 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_6120_mod()
2261 qib_write_kreg(dd, kr_scratch, v); in sendctrl_6120_mod()
2263 qib_write_kreg(dd, kr_scratch, v); in sendctrl_6120_mod()
2592 qib_write_kreg(dd, kr_errmask, in qib_chk_6120_errormask()
2597 qib_write_kreg(dd, kr_hwerrclear, 0ULL); in qib_chk_6120_errormask()
2598 qib_write_kreg(dd, kr_errclear, 0ULL); in qib_chk_6120_errormask()
2600 qib_write_kreg(dd, kr_intclear, 0ULL); in qib_chk_6120_errormask()
2668 qib_write_kreg(dd, kr_control, in qib_6120_xgxs_reset()
2670 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_6120_xgxs_reset()
2672 qib_write_kreg(dd, kr_xgxs_cfg, prev_val); in qib_6120_xgxs_reset()
2673 qib_write_kreg(dd, kr_control, dd->control); in qib_6120_xgxs_reset()
2768 qib_write_kreg(dd, kr_ibcctrl, dd->cspec->ibcctrl); in qib_6120_set_ib_cfg()
2769 qib_write_kreg(dd, kr_scratch, 0); in qib_6120_set_ib_cfg()
2781 qib_write_kreg(dd, kr_ibcctrl, dd->cspec->ibcctrl); in qib_6120_set_ib_cfg()
2782 qib_write_kreg(dd, kr_scratch, 0); in qib_6120_set_ib_cfg()
2790 qib_write_kreg(dd, kr_partitionkey, val64); in qib_6120_set_ib_cfg()
2801 qib_write_kreg(dd, kr_ibcctrl, dd->cspec->ibcctrl); in qib_6120_set_ib_cfg()
2802 qib_write_kreg(dd, kr_scratch, 0); in qib_6120_set_ib_cfg()
2817 qib_write_kreg(dd, kr_ibcctrl, dd->cspec->ibcctrl); in qib_6120_set_ib_cfg()
2818 qib_write_kreg(dd, kr_scratch, 0); in qib_6120_set_ib_cfg()
2900 qib_write_kreg(ppd->dd, kr_ibcctrl, ppd->dd->cspec->ibcctrl); in qib_6120_set_loopback()
2901 qib_write_kreg(ppd->dd, kr_scratch, 0); in qib_6120_set_loopback()
3048 qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl); in gpio_6120_mod()
3049 qib_write_kreg(dd, kr_gpio_out, new_out); in gpio_6120_mod()
3148 qib_write_kreg(dd, kr_rcvhdrentsize, dd->rcvhdrentsize); in qib_late_6120_initreg()
3149 qib_write_kreg(dd, kr_rcvhdrsize, dd->rcvhdrsize); in qib_late_6120_initreg()
3150 qib_write_kreg(dd, kr_rcvhdrcnt, dd->rcvhdrcnt); in qib_late_6120_initreg()
3151 qib_write_kreg(dd, kr_sendpioavailaddr, dd->pioavailregs_phys); in qib_late_6120_initreg()
3396 (void) qib_write_kreg(dd, kr_scratch, val); in writescratch()
3512 qib_write_kreg(dd, kr_hwdiagctrl, 0); in qib_init_iba6120_funcs()
3516 qib_write_kreg(dd, kr_hwerrclear, in qib_init_iba6120_funcs()