Lines Matching full:eq
173 static inline void tavor_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci) in tavor_set_eq_ci() argument
179 * more EQ entries, and we want to avoid the exceedingly in tavor_set_eq_ci()
184 mthca_write64(MTHCA_EQ_DB_SET_CI | eq->eqn, ci & (eq->nent - 1), in tavor_set_eq_ci()
189 static inline void arbel_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci) in arbel_set_eq_ci() argument
194 dev->eq_regs.arbel.eq_set_ci_base + eq->eqn * 8); in arbel_set_eq_ci()
199 static inline void set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci) in set_eq_ci() argument
202 arbel_set_eq_ci(dev, eq, ci); in set_eq_ci()
204 tavor_set_eq_ci(dev, eq, ci); in set_eq_ci()
228 static inline struct mthca_eqe *get_eqe(struct mthca_eq *eq, u32 entry) in get_eqe() argument
230 unsigned long off = (entry & (eq->nent - 1)) * MTHCA_EQ_ENTRY_SIZE; in get_eqe()
231 return eq->page_list[off / PAGE_SIZE].buf + off % PAGE_SIZE; in get_eqe()
234 static inline struct mthca_eqe *next_eqe_sw(struct mthca_eq *eq) in next_eqe_sw() argument
237 eqe = get_eqe(eq, eq->cons_index); in next_eqe_sw()
260 static int mthca_eq_int(struct mthca_dev *dev, struct mthca_eq *eq) in mthca_eq_int() argument
267 while ((eqe = next_eqe_sw(eq))) { in mthca_eq_int()
269 * Make sure we read EQ entry contents after we've in mthca_eq_int()
277 disarm_cq(dev, eq->eqn, disarm_cqn); in mthca_eq_int()
349 mthca_warn(dev, "EQ overrun on EQN %d\n", eq->eqn); in mthca_eq_int()
357 mthca_warn(dev, "Unhandled event %02x(%02x) on EQ %d\n", in mthca_eq_int()
358 eqe->type, eqe->subtype, eq->eqn); in mthca_eq_int()
363 ++eq->cons_index; in mthca_eq_int()
379 set_eq_ci(dev, eq, eq->cons_index); in mthca_eq_int()
408 if (ecr & dev->eq_table.eq[i].eqn_mask) { in mthca_tavor_interrupt()
409 if (mthca_eq_int(dev, &dev->eq_table.eq[i])) in mthca_tavor_interrupt()
410 tavor_set_eq_ci(dev, &dev->eq_table.eq[i], in mthca_tavor_interrupt()
411 dev->eq_table.eq[i].cons_index); in mthca_tavor_interrupt()
412 tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn); in mthca_tavor_interrupt()
420 struct mthca_eq *eq = eq_ptr; in mthca_tavor_msi_x_interrupt() local
421 struct mthca_dev *dev = eq->dev; in mthca_tavor_msi_x_interrupt()
423 mthca_eq_int(dev, eq); in mthca_tavor_msi_x_interrupt()
424 tavor_set_eq_ci(dev, eq, eq->cons_index); in mthca_tavor_msi_x_interrupt()
425 tavor_eq_req_not(dev, eq->eqn); in mthca_tavor_msi_x_interrupt()
441 if (mthca_eq_int(dev, &dev->eq_table.eq[i])) { in mthca_arbel_interrupt()
443 arbel_set_eq_ci(dev, &dev->eq_table.eq[i], in mthca_arbel_interrupt()
444 dev->eq_table.eq[i].cons_index); in mthca_arbel_interrupt()
454 struct mthca_eq *eq = eq_ptr; in mthca_arbel_msi_x_interrupt() local
455 struct mthca_dev *dev = eq->dev; in mthca_arbel_msi_x_interrupt()
457 mthca_eq_int(dev, eq); in mthca_arbel_msi_x_interrupt()
458 arbel_set_eq_ci(dev, eq, eq->cons_index); in mthca_arbel_msi_x_interrupt()
459 arbel_eq_req_not(dev, eq->eqn_mask); in mthca_arbel_msi_x_interrupt()
468 struct mthca_eq *eq) in mthca_create_eq() argument
478 eq->dev = dev; in mthca_create_eq()
479 eq->nent = roundup_pow_of_two(max(nent, 2)); in mthca_create_eq()
480 npages = ALIGN(eq->nent * MTHCA_EQ_ENTRY_SIZE, PAGE_SIZE) / PAGE_SIZE; in mthca_create_eq()
482 eq->page_list = kmalloc_array(npages, sizeof(*eq->page_list), in mthca_create_eq()
484 if (!eq->page_list) in mthca_create_eq()
488 eq->page_list[i].buf = NULL; in mthca_create_eq()
500 eq->page_list[i].buf = dma_alloc_coherent(&dev->pdev->dev, in mthca_create_eq()
502 if (!eq->page_list[i].buf) in mthca_create_eq()
506 dma_unmap_addr_set(&eq->page_list[i], mapping, t); in mthca_create_eq()
508 clear_page(eq->page_list[i].buf); in mthca_create_eq()
511 for (i = 0; i < eq->nent; ++i) in mthca_create_eq()
512 set_eqe_hw(get_eqe(eq, i)); in mthca_create_eq()
514 eq->eqn = mthca_alloc(&dev->eq_table.alloc); in mthca_create_eq()
515 if (eq->eqn == -1) in mthca_create_eq()
523 &eq->mr); in mthca_create_eq()
535 eq_context->logsize_usrpage = cpu_to_be32((ffs(eq->nent) - 1) << 24); in mthca_create_eq()
543 eq_context->lkey = cpu_to_be32(eq->mr.ibmr.lkey); in mthca_create_eq()
545 err = mthca_SW2HW_EQ(dev, mailbox, eq->eqn); in mthca_create_eq()
554 eq->eqn_mask = swab32(1 << eq->eqn); in mthca_create_eq()
555 eq->cons_index = 0; in mthca_create_eq()
557 dev->eq_table.arm_mask |= eq->eqn_mask; in mthca_create_eq()
559 mthca_dbg(dev, "Allocated EQ %d with %d entries\n", in mthca_create_eq()
560 eq->eqn, eq->nent); in mthca_create_eq()
565 mthca_free_mr(dev, &eq->mr); in mthca_create_eq()
568 mthca_free(&dev->eq_table.alloc, eq->eqn); in mthca_create_eq()
572 if (eq->page_list[i].buf) in mthca_create_eq()
574 eq->page_list[i].buf, in mthca_create_eq()
575 dma_unmap_addr(&eq->page_list[i], in mthca_create_eq()
581 kfree(eq->page_list); in mthca_create_eq()
589 struct mthca_eq *eq) in mthca_free_eq() argument
593 int npages = (eq->nent * MTHCA_EQ_ENTRY_SIZE + PAGE_SIZE - 1) / in mthca_free_eq()
601 err = mthca_HW2SW_EQ(dev, mailbox, eq->eqn); in mthca_free_eq()
605 dev->eq_table.arm_mask &= ~eq->eqn_mask; in mthca_free_eq()
608 mthca_dbg(dev, "Dumping EQ context %02x:\n", eq->eqn); in mthca_free_eq()
618 mthca_free_mr(dev, &eq->mr); in mthca_free_eq()
621 eq->page_list[i].buf, in mthca_free_eq()
622 dma_unmap_addr(&eq->page_list[i], mapping)); in mthca_free_eq()
624 kfree(eq->page_list); in mthca_free_eq()
635 if (dev->eq_table.eq[i].have_irq) { in mthca_free_irqs()
636 free_irq(dev->eq_table.eq[i].msi_x_vector, in mthca_free_irqs()
637 dev->eq_table.eq + i); in mthca_free_irqs()
638 dev->eq_table.eq[i].have_irq = 0; in mthca_free_irqs()
659 * We assume that the EQ arm and EQ set CI registers in mthca_map_eq_regs()
680 mthca_err(dev, "Couldn't map EQ arm register, aborting.\n"); in mthca_map_eq_regs()
689 mthca_err(dev, "Couldn't map EQ CI register, aborting.\n"); in mthca_map_eq_regs()
733 * We assume that mapping one page is enough for the whole EQ in mthca_map_eq_icm()
735 * we only use 32 EQs and each EQ uses 32 bytes of context in mthca_map_eq_icm()
800 &dev->eq_table.eq[MTHCA_EQ_COMP]); in mthca_init_eq_table()
806 &dev->eq_table.eq[MTHCA_EQ_ASYNC]); in mthca_init_eq_table()
812 &dev->eq_table.eq[MTHCA_EQ_CMD]); in mthca_init_eq_table()
824 snprintf(dev->eq_table.eq[i].irq_name, in mthca_init_eq_table()
828 err = request_irq(dev->eq_table.eq[i].msi_x_vector, in mthca_init_eq_table()
832 0, dev->eq_table.eq[i].irq_name, in mthca_init_eq_table()
833 dev->eq_table.eq + i); in mthca_init_eq_table()
836 dev->eq_table.eq[i].have_irq = 1; in mthca_init_eq_table()
839 snprintf(dev->eq_table.eq[0].irq_name, IB_DEVICE_NAME_MAX, in mthca_init_eq_table()
845 IRQF_SHARED, dev->eq_table.eq[0].irq_name, dev); in mthca_init_eq_table()
852 0, dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn); in mthca_init_eq_table()
854 mthca_warn(dev, "MAP_EQ for async EQ %d failed (%d)\n", in mthca_init_eq_table()
855 dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn, err); in mthca_init_eq_table()
858 0, dev->eq_table.eq[MTHCA_EQ_CMD].eqn); in mthca_init_eq_table()
860 mthca_warn(dev, "MAP_EQ for cmd EQ %d failed (%d)\n", in mthca_init_eq_table()
861 dev->eq_table.eq[MTHCA_EQ_CMD].eqn, err); in mthca_init_eq_table()
865 arbel_eq_req_not(dev, dev->eq_table.eq[i].eqn_mask); in mthca_init_eq_table()
867 tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn); in mthca_init_eq_table()
873 mthca_free_eq(dev, &dev->eq_table.eq[MTHCA_EQ_CMD]); in mthca_init_eq_table()
876 mthca_free_eq(dev, &dev->eq_table.eq[MTHCA_EQ_ASYNC]); in mthca_init_eq_table()
879 mthca_free_eq(dev, &dev->eq_table.eq[MTHCA_EQ_COMP]); in mthca_init_eq_table()
896 1, dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn); in mthca_cleanup_eq_table()
898 1, dev->eq_table.eq[MTHCA_EQ_CMD].eqn); in mthca_cleanup_eq_table()
901 mthca_free_eq(dev, &dev->eq_table.eq[i]); in mthca_cleanup_eq_table()