4021 			      u32 step_idx, u8 *mbox_cmd)  in get_op_for_set_hem()  argument
4052 	*mbox_cmd = cmd + step_idx;  in get_op_for_set_hem()
4075 			 dma_addr_t base_addr, u32 hem_type, u32 step_idx)  in set_hem_to_hw()  argument
4083 	if (unlikely(hem_type == HEM_TYPE_SCCC && step_idx))  in set_hem_to_hw()
4086 	ret = get_op_for_set_hem(hr_dev, hem_type, step_idx, &cmd);  in set_hem_to_hw()
4095 			       u32 step_idx)  in hns_roce_v2_set_hem()  argument
4131 	if (check_whether_last_step(hop_num, step_idx)) {  in hns_roce_v2_set_hem()
4134 		ret = set_hem_to_hw(hr_dev, obj, hem->dma, table->type, step_idx);  in hns_roce_v2_set_hem()
4136 		if (step_idx == 0)  in hns_roce_v2_set_hem()
4138 		else if (step_idx == 1 && hop_num == 2)  in hns_roce_v2_set_hem()
4141 		ret = set_hem_to_hw(hr_dev, obj, bt_ba, table->type, step_idx);  in hns_roce_v2_set_hem()
4149 				 int tag, u32 step_idx)  in hns_roce_v2_clear_hem()  argument
4183 	cmd += step_idx;  in hns_roce_v2_clear_hem()