Lines Matching +full:4 +full:- +full:wire
1 // SPDX-License-Identifier: GPL-2.0-only
6 * max31865.c - Maxim MAX31865 RTD-to-Digital Converter sensor driver
32 #define MAX31865_3WIRE_RTD BIT(4)
64 return spi_write_then_read(data->spi, ®, 1, data->buf, read_size); in max31865_read()
69 return spi_write(data->spi, data->buf, len); in max31865_write()
81 cfg = data->buf[0]; in enable_bias()
83 data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT; in enable_bias()
84 data->buf[1] = cfg | MAX31865_CFG_VBIAS; in enable_bias()
98 cfg = data->buf[0]; in disable_bias()
101 data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT; in disable_bias()
102 data->buf[1] = cfg; in disable_bias()
124 reg = data->buf[0]; in max31865_rtd_read()
126 data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT; in max31865_rtd_read()
127 data->buf[1] = reg; in max31865_rtd_read()
133 if (data->filter_50hz) { in max31865_rtd_read()
145 *val = get_unaligned_be16(&data->buf) >> 1; in max31865_rtd_read()
159 mutex_lock(&data->lock); in max31865_read_raw()
161 mutex_unlock(&data->lock); in max31865_read_raw()
171 return -EINVAL; in max31865_read_raw()
184 cfg = data->buf[0]; in max31865_init()
186 if (data->three_wire) in max31865_init()
187 /* 3-wire RTD connection */ in max31865_init()
190 if (data->filter_50hz) in max31865_init()
194 data->buf[0] = MAX31865_CFG_REG | MAX31865_RD_WR_BIT; in max31865_init()
195 data->buf[1] = cfg; in max31865_init()
211 fault = data->buf[0] & faultbit; in show_fault()
230 return sysfs_emit(buf, "%d\n", data->filter_50hz ? 50 : 60); in show_filter()
249 data->filter_50hz = true; in set_filter()
252 data->filter_50hz = false; in set_filter()
255 return -EINVAL; in set_filter()
258 mutex_lock(&data->lock); in set_filter()
260 mutex_unlock(&data->lock); in set_filter()
295 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*data)); in max31865_probe()
297 return -ENOMEM; in max31865_probe()
300 data->spi = spi; in max31865_probe()
301 data->filter_50hz = false; in max31865_probe()
302 mutex_init(&data->lock); in max31865_probe()
304 indio_dev->info = &max31865_info; in max31865_probe()
305 indio_dev->name = id->name; in max31865_probe()
306 indio_dev->modes = INDIO_DIRECT_MODE; in max31865_probe()
307 indio_dev->channels = max31865_channels; in max31865_probe()
308 indio_dev->num_channels = ARRAY_SIZE(max31865_channels); in max31865_probe()
310 if (device_property_read_bool(&spi->dev, "maxim,3-wire")) { in max31865_probe()
311 /* select 3 wire */ in max31865_probe()
312 data->three_wire = 1; in max31865_probe()
314 /* select 2 or 4 wire */ in max31865_probe()
315 data->three_wire = 0; in max31865_probe()
320 dev_err(&spi->dev, "error: Failed to configure max31865\n"); in max31865_probe()
324 return devm_iio_device_register(&spi->dev, indio_dev); in max31865_probe()
350 MODULE_DESCRIPTION("Maxim MAX31865 RTD-to-Digital Converter sensor driver");