Lines Matching +full:ext +full:- +full:clk +full:- +full:freq +full:- +full:hz
1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk.h>
116 ADIS16480_REG((page) + 1, (x) - 60 + 8))
176 struct clk *ext_clk;
194 … "Allow IMU rates below the minimum advisable when external clk is used in PPS mode (default: N)");
199 struct adis16480 *adis16480 = file->private_data; in adis16480_show_firmware_revision()
205 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_REV, &rev); in adis16480_show_firmware_revision()
224 struct adis16480 *adis16480 = file->private_data; in adis16480_show_firmware_date()
230 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_Y, &year); in adis16480_show_firmware_date()
234 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_FIRM_DM, &md); in adis16480_show_firmware_date()
238 len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", in adis16480_show_firmware_date()
257 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_SERIAL_NUM, in adis16480_show_serial_number()
275 ret = adis_read_reg_16(&adis16480->adis, ADIS16480_REG_PROD_ID, in adis16480_show_product_id()
293 ret = adis_read_reg_32(&adis16480->adis, ADIS16480_REG_FLASH_CNT, in adis16480_show_flash_count()
328 unsigned int t, sample_rate = st->clk_freq; in adis16480_set_freq()
332 return -EINVAL; in adis16480_set_freq()
336 return -EINVAL; in adis16480_set_freq()
338 adis_dev_auto_lock(&st->adis); in adis16480_set_freq()
351 if (st->clk_mode == ADIS16480_CLK_PPS) { in adis16480_set_freq()
352 unsigned long scaled_rate = lcm(st->clk_freq, t); in adis16480_set_freq()
360 if (scaled_rate > st->chip_info->int_clk) in adis16480_set_freq()
361 scaled_rate = st->chip_info->int_clk / st->clk_freq * st->clk_freq; in adis16480_set_freq()
363 scaled_rate = st->chip_info->int_clk / scaled_rate * scaled_rate; in adis16480_set_freq()
367 * with a sample rate lower than 4000Hz due to possible undersampling in adis16480_set_freq()
376 scaled_rate = roundup(4000000, st->clk_freq); in adis16480_set_freq()
378 sync_scale = scaled_rate / st->clk_freq; in adis16480_set_freq()
379 ret = __adis_write_reg_16(&st->adis, ADIS16495_REG_SYNC_SCALE, sync_scale); in adis16480_set_freq()
388 t--; in adis16480_set_freq()
390 if (t > st->chip_info->max_dec_rate) in adis16480_set_freq()
391 t = st->chip_info->max_dec_rate; in adis16480_set_freq()
393 return __adis_write_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, t); in adis16480_set_freq()
401 unsigned int freq, sample_rate = st->clk_freq; in adis16480_get_freq() local
403 adis_dev_auto_lock(&st->adis); in adis16480_get_freq()
405 if (st->clk_mode == ADIS16480_CLK_PPS) { in adis16480_get_freq()
408 ret = __adis_read_reg_16(&st->adis, ADIS16495_REG_SYNC_SCALE, &sync_scale); in adis16480_get_freq()
412 sample_rate = st->clk_freq * sync_scale; in adis16480_get_freq()
415 ret = __adis_read_reg_16(&st->adis, ADIS16480_REG_DEC_RATE, &t); in adis16480_get_freq()
419 freq = DIV_ROUND_CLOSEST(sample_rate, (t + 1)); in adis16480_get_freq()
421 *val = freq / 1000; in adis16480_get_freq()
422 *val2 = (freq % 1000) * 1000; in adis16480_get_freq()
472 unsigned int reg = adis16480_calibbias_regs[chan->scan_index]; in adis16480_set_calibbias()
475 switch (chan->type) { in adis16480_set_calibbias()
478 if (bias < -0x8000 || bias >= 0x8000) in adis16480_set_calibbias()
479 return -EINVAL; in adis16480_set_calibbias()
480 return adis_write_reg_16(&st->adis, reg, bias); in adis16480_set_calibbias()
483 return adis_write_reg_32(&st->adis, reg, bias); in adis16480_set_calibbias()
488 return -EINVAL; in adis16480_set_calibbias()
494 unsigned int reg = adis16480_calibbias_regs[chan->scan_index]; in adis16480_get_calibbias()
500 switch (chan->type) { in adis16480_get_calibbias()
503 ret = adis_read_reg_16(&st->adis, reg, &val16); in adis16480_get_calibbias()
509 ret = adis_read_reg_32(&st->adis, reg, &val32); in adis16480_get_calibbias()
514 ret = -EINVAL; in adis16480_get_calibbias()
526 unsigned int reg = adis16480_calibscale_regs[chan->scan_index]; in adis16480_set_calibscale()
529 if (scale < -0x8000 || scale >= 0x8000) in adis16480_set_calibscale()
530 return -EINVAL; in adis16480_set_calibscale()
532 return adis_write_reg_16(&st->adis, reg, scale); in adis16480_set_calibscale()
538 unsigned int reg = adis16480_calibscale_regs[chan->scan_index]; in adis16480_get_calibscale()
543 ret = adis_read_reg_16(&st->adis, reg, &val16); in adis16480_get_calibscale()
578 const struct iio_chan_spec *chan, int *freq) in adis16480_get_filter_freq() argument
585 reg = ad16480_filter_data[chan->scan_index][0]; in adis16480_get_filter_freq()
586 offset = ad16480_filter_data[chan->scan_index][1]; in adis16480_get_filter_freq()
589 ret = adis_read_reg_16(&st->adis, reg, &val); in adis16480_get_filter_freq()
594 *freq = 0; in adis16480_get_filter_freq()
596 *freq = st->chip_info->filter_freqs[(val >> offset) & 0x3]; in adis16480_get_filter_freq()
602 const struct iio_chan_spec *chan, unsigned int freq) in adis16480_set_filter_freq() argument
611 reg = ad16480_filter_data[chan->scan_index][0]; in adis16480_set_filter_freq()
612 offset = ad16480_filter_data[chan->scan_index][1]; in adis16480_set_filter_freq()
615 adis_dev_auto_lock(&st->adis); in adis16480_set_filter_freq()
617 ret = __adis_read_reg_16(&st->adis, reg, &val); in adis16480_set_filter_freq()
621 if (freq == 0) { in adis16480_set_filter_freq()
625 best_diff = st->chip_info->filter_freqs[0]; in adis16480_set_filter_freq()
627 if (st->chip_info->filter_freqs[i] >= freq) { in adis16480_set_filter_freq()
628 diff = st->chip_info->filter_freqs[i] - freq; in adis16480_set_filter_freq()
641 return __adis_write_reg_16(&st->adis, reg, val); in adis16480_set_filter_freq()
654 switch (chan->type) { in adis16480_read_raw()
656 *val = st->chip_info->gyro_max_scale; in adis16480_read_raw()
657 *val2 = st->chip_info->gyro_max_val; in adis16480_read_raw()
660 *val = st->chip_info->accel_max_scale; in adis16480_read_raw()
661 *val2 = st->chip_info->accel_max_val; in adis16480_read_raw()
673 *val = st->chip_info->temp_scale / 1000; in adis16480_read_raw()
674 *val2 = (st->chip_info->temp_scale % 1000) * 1000; in adis16480_read_raw()
685 *val = st->chip_info->deltang_max_val; in adis16480_read_raw()
689 *val = st->chip_info->deltvel_max_val; in adis16480_read_raw()
693 return -EINVAL; in adis16480_read_raw()
698 *val = DIV_ROUND_CLOSEST_ULL(temp, st->chip_info->temp_scale); in adis16480_read_raw()
709 return -EINVAL; in adis16480_read_raw()
727 return -EINVAL; in adis16480_write_raw()
772 ADIS16480_REG_ ## _mod ## _DELTAANG_OUT, -1, 0, 32)
781 ADIS16480_REG_ ## _mod ## _DELTAVEL_OUT, -1, 0, 32)
913 [ADIS16480_DIAG_STAT_XGYRO_FAIL] = "X-axis gyroscope self-test failure",
914 [ADIS16480_DIAG_STAT_YGYRO_FAIL] = "Y-axis gyroscope self-test failure",
915 [ADIS16480_DIAG_STAT_ZGYRO_FAIL] = "Z-axis gyroscope self-test failure",
916 [ADIS16480_DIAG_STAT_XACCL_FAIL] = "X-axis accelerometer self-test failure",
917 [ADIS16480_DIAG_STAT_YACCL_FAIL] = "Y-axis accelerometer self-test failure",
918 [ADIS16480_DIAG_STAT_ZACCL_FAIL] = "Z-axis accelerometer self-test failure",
919 [ADIS16480_DIAG_STAT_XMAGN_FAIL] = "X-axis magnetometer self-test failure",
920 [ADIS16480_DIAG_STAT_YMAGN_FAIL] = "Y-axis magnetometer self-test failure",
921 [ADIS16480_DIAG_STAT_ZMAGN_FAIL] = "Z-axis magnetometer self-test failure",
922 [ADIS16480_DIAG_STAT_BARO_FAIL] = "Barometer self-test failure",
1327 struct iio_dev *indio_dev = pf->indio_dev; in adis16480_trigger_handler()
1329 struct adis *adis = &st->adis; in adis16480_trigger_handler()
1330 struct device *dev = &adis->spi->dev; in adis16480_trigger_handler()
1337 if (adis->current_page != 0) { in adis16480_trigger_handler()
1338 adis->tx[0] = ADIS_WRITE_REG(ADIS_REG_PAGE_ID); in adis16480_trigger_handler()
1339 adis->tx[1] = 0; in adis16480_trigger_handler()
1340 ret = spi_write(adis->spi, adis->tx, 2); in adis16480_trigger_handler()
1346 adis->current_page = 0; in adis16480_trigger_handler()
1349 ret = spi_sync(adis->spi, &adis->msg); in adis16480_trigger_handler()
1358 * 16-bit responses containing the BURST_ID depending on the sclk. If in adis16480_trigger_handler()
1359 * clk > 3.6MHz, then we will have two BURST_ID in a row. If clk < 3MHZ, in adis16480_trigger_handler()
1365 buffer = adis->buffer; in adis16480_trigger_handler()
1370 if (curr == st->burst_id && next != st->burst_id) { in adis16480_trigger_handler()
1396 st->data[i++] = buffer[offset + 1]; in adis16480_trigger_handler()
1398 * The temperature channel has 16-bit storage size. in adis16480_trigger_handler()
1401 * 32-bit storage size channels enabled which are added in adis16480_trigger_handler()
1406 st->data[i++] = 0; in adis16480_trigger_handler()
1413 st->data[i++] = buffer[2 * (bit - buff_offset) + offset + 3]; in adis16480_trigger_handler()
1414 st->data[i++] = buffer[2 * (bit - buff_offset) + offset + 2]; in adis16480_trigger_handler()
1419 iio_push_to_buffers_with_timestamp(indio_dev, st->data, pf->timestamp); in adis16480_trigger_handler()
1421 iio_trigger_notify_done(indio_dev->trig); in adis16480_trigger_handler()
1439 if (st->chip_info->has_burst_delta_data) { in adis16480_update_scan_mode()
1442 st->burst_id = ADIS16495_GYRO_ACCEL_BURST_ID; in adis16480_update_scan_mode()
1445 st->burst_id = ADIS16545_DELTA_ANG_VEL_BURST_ID; in adis16480_update_scan_mode()
1448 ret = __adis_update_bits(&st->adis, ADIS16480_REG_CONFIG, in adis16480_update_scan_mode()
1467 struct device *dev = &st->adis.spi->dev; in adis16480_stop_device()
1470 ret = adis_write_reg_16(&st->adis, ADIS16480_REG_SLP_CNT, BIT(9)); in adis16480_stop_device()
1494 struct device *dev = &st->adis.spi->dev; in adis16480_config_irq_pin()
1505 * Get the interrupt from the devicetre by reading the interrupt-names in adis16480_config_irq_pin()
1528 irq_type = irq_get_trigger_type(st->adis.spi->irq); in adis16480_config_irq_pin()
1535 return -EINVAL; in adis16480_config_irq_pin()
1538 return adis_write_reg_16(&st->adis, ADIS16480_REG_FNCTIO_CTRL, val); in adis16480_config_irq_pin()
1543 struct device *dev = &st->adis.spi->dev; in adis16480_fw_get_ext_clk_pin()
1549 if (device_property_read_string(dev, "adi,ext-clk-pin", &ext_clk_pin)) in adis16480_fw_get_ext_clk_pin()
1558 dev_info(dev, "clk input line not specified, using DIO2\n"); in adis16480_fw_get_ext_clk_pin()
1564 struct device *dev = &st->adis.spi->dev; in adis16480_ext_clk_config()
1570 ret = adis_read_reg_16(&st->adis, ADIS16480_REG_FNCTIO_CTRL, &val); in adis16480_ext_clk_config()
1585 /* Only ADIS1649x devices support pps ext clock mode */ in adis16480_ext_clk_config()
1586 if (st->chip_info->has_pps_clk_mode) { in adis16480_ext_clk_config()
1587 mode |= ADIS16480_SYNC_MODE(st->clk_mode); in adis16480_ext_clk_config()
1594 ret = adis_write_reg_16(&st->adis, ADIS16480_REG_FNCTIO_CTRL, val); in adis16480_ext_clk_config()
1598 return clk_prepare_enable(st->ext_clk); in adis16480_ext_clk_config()
1603 struct device *dev = &st->adis.spi->dev; in adis16480_get_ext_clocks()
1605 st->ext_clk = devm_clk_get_optional(dev, "sync"); in adis16480_get_ext_clocks()
1606 if (IS_ERR(st->ext_clk)) in adis16480_get_ext_clocks()
1607 return dev_err_probe(dev, PTR_ERR(st->ext_clk), "failed to get ext clk\n"); in adis16480_get_ext_clocks()
1608 if (st->ext_clk) { in adis16480_get_ext_clocks()
1609 st->clk_mode = ADIS16480_CLK_SYNC; in adis16480_get_ext_clocks()
1613 if (st->chip_info->has_pps_clk_mode) { in adis16480_get_ext_clocks()
1614 st->ext_clk = devm_clk_get_optional(dev, "pps"); in adis16480_get_ext_clocks()
1615 if (IS_ERR(st->ext_clk)) in adis16480_get_ext_clocks()
1616 return dev_err_probe(dev, PTR_ERR(st->ext_clk), "failed to get ext clk\n"); in adis16480_get_ext_clocks()
1617 if (st->ext_clk) { in adis16480_get_ext_clocks()
1618 st->clk_mode = ADIS16480_CLK_PPS; in adis16480_get_ext_clocks()
1623 st->clk_mode = ADIS16480_CLK_INT; in adis16480_get_ext_clocks()
1642 struct device *dev = &spi->dev; in adis16480_probe()
1649 return -ENOMEM; in adis16480_probe()
1653 st->chip_info = &adis16480_chip_info[id->driver_data]; in adis16480_probe()
1654 indio_dev->name = spi_get_device_id(spi)->name; in adis16480_probe()
1655 indio_dev->channels = st->chip_info->channels; in adis16480_probe()
1656 indio_dev->num_channels = st->chip_info->num_channels; in adis16480_probe()
1657 if (st->chip_info->has_burst_delta_data) in adis16480_probe()
1658 indio_dev->available_scan_masks = adis16545_channel_masks; in adis16480_probe()
1659 indio_dev->info = &adis16480_info; in adis16480_probe()
1660 indio_dev->modes = INDIO_DIRECT_MODE; in adis16480_probe()
1662 adis16480_data = &st->chip_info->adis_data; in adis16480_probe()
1664 ret = adis_init(&st->adis, indio_dev, spi, adis16480_data); in adis16480_probe()
1668 ret = __adis_initial_startup(&st->adis); in adis16480_probe()
1677 st->burst_id = ADIS16495_GYRO_ACCEL_BURST_ID; in adis16480_probe()
1679 if (st->chip_info->has_sleep_cnt) { in adis16480_probe()
1693 if (st->ext_clk) { in adis16480_probe()
1698 ret = devm_add_action_or_reset(dev, adis16480_clk_disable, st->ext_clk); in adis16480_probe()
1702 st->clk_freq = clk_get_rate(st->ext_clk); in adis16480_probe()
1703 st->clk_freq *= 1000; /* micro */ in adis16480_probe()
1704 if (st->clk_mode == ADIS16480_CLK_PPS) { in adis16480_probe()
1713 sync_scale = st->chip_info->int_clk / st->clk_freq; in adis16480_probe()
1714 ret = __adis_write_reg_16(&st->adis, ADIS16495_REG_SYNC_SCALE, sync_scale); in adis16480_probe()
1719 st->clk_freq = st->chip_info->int_clk; in adis16480_probe()
1723 if (adis16480_data->burst_len) in adis16480_probe()
1726 ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, in adis16480_probe()
1746 { "adis16495-1", ADIS16495_1 },
1747 { "adis16495-2", ADIS16495_2 },
1748 { "adis16495-3", ADIS16495_3 },
1749 { "adis16497-1", ADIS16497_1 },
1750 { "adis16497-2", ADIS16497_2 },
1751 { "adis16497-3", ADIS16497_3 },
1752 { "adis16545-1", ADIS16545_1 },
1753 { "adis16545-2", ADIS16545_2 },
1754 { "adis16545-3", ADIS16545_3 },
1755 { "adis16547-1", ADIS16547_1 },
1756 { "adis16547-2", ADIS16547_2 },
1757 { "adis16547-3", ADIS16547_3 },
1768 { .compatible = "adi,adis16495-1" },
1769 { .compatible = "adi,adis16495-2" },
1770 { .compatible = "adi,adis16495-3" },
1771 { .compatible = "adi,adis16497-1" },
1772 { .compatible = "adi,adis16497-2" },
1773 { .compatible = "adi,adis16497-3" },
1774 { .compatible = "adi,adis16545-1" },
1775 { .compatible = "adi,adis16545-2" },
1776 { .compatible = "adi,adis16545-3" },
1777 { .compatible = "adi,adis16547-1" },
1778 { .compatible = "adi,adis16547-2" },
1779 { .compatible = "adi,adis16547-3" },
1794 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");