Lines Matching +full:clk +full:- +full:csr
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
8 * Inspired from: fsl-imx25-tsadc
13 #include <linux/clk.h>
30 #include "stm32-adc-core.h"
46 * struct stm32_adc_common_regs - stm32 common registers
47 * @csr: common status register offset
49 * @eoc_msk: array of eoc (end of conversion flag) masks in csr for adc1..n
50 * @ovr_msk: array of ovr (overrun flag) masks in csr for adc1..n
55 u32 csr; member
66 * struct stm32_adc_priv_cfg - stm32 core compatible configuration data
86 * struct stm32_adc_priv - stm32 ADC core private data
108 struct clk *aclk;
109 struct clk *bclk;
132 * stm32f4_adc_clk_sel() - Select stm32f4 ADC common clock prescaler
144 /* stm32f4 has one clk input for analog (mandatory), enforce it here */ in stm32f4_adc_clk_sel()
145 if (!priv->aclk) { in stm32f4_adc_clk_sel()
146 dev_err(&pdev->dev, "No 'adc' clock found\n"); in stm32f4_adc_clk_sel()
147 return -ENOENT; in stm32f4_adc_clk_sel()
150 rate = clk_get_rate(priv->aclk); in stm32f4_adc_clk_sel()
152 dev_err(&pdev->dev, "Invalid clock rate: 0\n"); in stm32f4_adc_clk_sel()
153 return -EINVAL; in stm32f4_adc_clk_sel()
157 if ((rate / stm32f4_pclk_div[i]) <= priv->max_clk_rate) in stm32f4_adc_clk_sel()
161 dev_err(&pdev->dev, "adc clk selection failed\n"); in stm32f4_adc_clk_sel()
162 return -EINVAL; in stm32f4_adc_clk_sel()
165 priv->common.rate = rate / stm32f4_pclk_div[i]; in stm32f4_adc_clk_sel()
166 val = readl_relaxed(priv->common.base + STM32F4_ADC_CCR); in stm32f4_adc_clk_sel()
169 writel_relaxed(val, priv->common.base + STM32F4_ADC_CCR); in stm32f4_adc_clk_sel()
171 dev_dbg(&pdev->dev, "Using analog clock source at %ld kHz\n", in stm32f4_adc_clk_sel()
172 priv->common.rate / 1000); in stm32f4_adc_clk_sel()
178 * struct stm32h7_adc_ck_spec - specification for stm32h7 adc clock
217 if (!priv->bclk) { in stm32h7_adc_clk_sel()
218 dev_err(&pdev->dev, "No 'bus' clock found\n"); in stm32h7_adc_clk_sel()
219 return -ENOENT; in stm32h7_adc_clk_sel()
227 if (priv->aclk) { in stm32h7_adc_clk_sel()
232 rate = clk_get_rate(priv->aclk); in stm32h7_adc_clk_sel()
234 dev_err(&pdev->dev, "Invalid adc clock rate: 0\n"); in stm32h7_adc_clk_sel()
235 return -EINVAL; in stm32h7_adc_clk_sel()
239 duty = clk_get_scaled_duty_cycle(priv->aclk, 100); in stm32h7_adc_clk_sel()
241 dev_warn(&pdev->dev, "adc clock duty: %d\n", duty); in stm32h7_adc_clk_sel()
258 if ((rate / div) <= priv->max_clk_rate) in stm32h7_adc_clk_sel()
264 rate = clk_get_rate(priv->bclk); in stm32h7_adc_clk_sel()
266 dev_err(&pdev->dev, "Invalid bus clock rate: 0\n"); in stm32h7_adc_clk_sel()
267 return -EINVAL; in stm32h7_adc_clk_sel()
270 duty = clk_get_scaled_duty_cycle(priv->bclk, 100); in stm32h7_adc_clk_sel()
272 dev_warn(&pdev->dev, "bus clock duty: %d\n", duty); in stm32h7_adc_clk_sel()
285 if ((rate / div) <= priv->max_clk_rate) in stm32h7_adc_clk_sel()
289 dev_err(&pdev->dev, "adc clk selection failed\n"); in stm32h7_adc_clk_sel()
290 return -EINVAL; in stm32h7_adc_clk_sel()
294 priv->common.rate = rate / div; in stm32h7_adc_clk_sel()
297 val = readl_relaxed(priv->common.base + STM32H7_ADC_CCR); in stm32h7_adc_clk_sel()
301 writel_relaxed(val, priv->common.base + STM32H7_ADC_CCR); in stm32h7_adc_clk_sel()
303 dev_dbg(&pdev->dev, "Using %s clock/%d source at %ld kHz\n", in stm32h7_adc_clk_sel()
304 ckmode ? "bus" : "adc", div, priv->common.rate / 1000); in stm32h7_adc_clk_sel()
311 .csr = STM32F4_ADC_CSR,
321 .csr = STM32H7_ADC_CSR,
331 .csr = STM32H7_ADC_CSR,
348 ier = readl_relaxed(priv->common.base + offset + priv->cfg->regs->ier); in stm32_adc_eoc_enabled()
350 return ier & priv->cfg->regs->eocie_msk; in stm32_adc_eoc_enabled()
362 status = readl_relaxed(priv->common.base + priv->cfg->regs->csr); in stm32_adc_irq_handler()
368 * - an ADC configured to use DMA (EOC triggers the DMA request, and in stm32_adc_irq_handler()
370 * - an ADC configured to use IRQs (EOCIE bit is set. The handler must in stm32_adc_irq_handler()
372 * So both EOC status bit in CSR and EOCIE control bit must be checked in stm32_adc_irq_handler()
374 * IRQ-enabled ADCs). in stm32_adc_irq_handler()
376 for (i = 0; i < priv->nb_adc_max; i++) { in stm32_adc_irq_handler()
377 if ((status & priv->cfg->regs->eoc_msk[i] && in stm32_adc_irq_handler()
379 (status & priv->cfg->regs->ovr_msk[i])) in stm32_adc_irq_handler()
380 generic_handle_domain_irq(priv->domain, i); in stm32_adc_irq_handler()
389 irq_set_chip_data(irq, d->host_data); in stm32_adc_domain_map()
410 struct device_node *np = pdev->dev.of_node; in stm32_adc_irq_probe()
415 * - stm32f4/h7 shares a common interrupt line. in stm32_adc_irq_probe()
416 * - stm32mp1, has one line per ADC in stm32_adc_irq_probe()
418 for (i = 0; i < priv->cfg->num_irqs; i++) { in stm32_adc_irq_probe()
419 priv->irq[i] = platform_get_irq(pdev, i); in stm32_adc_irq_probe()
420 if (priv->irq[i] < 0) in stm32_adc_irq_probe()
421 return priv->irq[i]; in stm32_adc_irq_probe()
424 priv->domain = irq_domain_add_simple(np, STM32_ADC_MAX_ADCS, 0, in stm32_adc_irq_probe()
427 if (!priv->domain) { in stm32_adc_irq_probe()
428 dev_err(&pdev->dev, "Failed to add irq domain\n"); in stm32_adc_irq_probe()
429 return -ENOMEM; in stm32_adc_irq_probe()
432 for (i = 0; i < priv->cfg->num_irqs; i++) { in stm32_adc_irq_probe()
433 irq_set_chained_handler(priv->irq[i], stm32_adc_irq_handler); in stm32_adc_irq_probe()
434 irq_set_handler_data(priv->irq[i], priv); in stm32_adc_irq_probe()
446 for (hwirq = 0; hwirq < priv->nb_adc_max; hwirq++) in stm32_adc_irq_remove()
447 irq_dispose_mapping(irq_find_mapping(priv->domain, hwirq)); in stm32_adc_irq_remove()
448 irq_domain_remove(priv->domain); in stm32_adc_irq_remove()
450 for (i = 0; i < priv->cfg->num_irqs; i++) in stm32_adc_irq_remove()
451 irq_set_chained_handler(priv->irq[i], NULL); in stm32_adc_irq_remove()
463 * - Voltage booster can be used, to get full ADC performances in stm32_adc_core_switches_supply_en()
465 * - Vdd can be used to supply them, if above 2.7V (STM32MP1 only). in stm32_adc_core_switches_supply_en()
468 * - vdda < 2.7V but vdd > 2.7V: ANASWVDD = 1, EN_BOOSTER = 0 (stm32mp1) in stm32_adc_core_switches_supply_en()
469 * - vdda < 2.7V and vdd < 2.7V: ANASWVDD = 0, EN_BOOSTER = 1 in stm32_adc_core_switches_supply_en()
470 * - vdda >= 2.7V: ANASWVDD = 0, EN_BOOSTER = 0 (default) in stm32_adc_core_switches_supply_en()
472 if (priv->vdda_uv < 2700000) { in stm32_adc_core_switches_supply_en()
473 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_en()
474 ret = regulator_enable(priv->vdd); in stm32_adc_core_switches_supply_en()
480 ret = regmap_write(priv->syscfg, in stm32_adc_core_switches_supply_en()
484 regulator_disable(priv->vdd); in stm32_adc_core_switches_supply_en()
493 if (priv->booster) { in stm32_adc_core_switches_supply_en()
495 * This is optional, as this is a trade-off between in stm32_adc_core_switches_supply_en()
498 ret = regulator_enable(priv->booster); in stm32_adc_core_switches_supply_en()
511 priv->vdda_uv); in stm32_adc_core_switches_supply_en()
518 if (priv->vdda_uv < 2700000) { in stm32_adc_core_switches_supply_dis()
519 if (priv->syscfg && priv->vdd_uv > 2700000) { in stm32_adc_core_switches_supply_dis()
520 regmap_write(priv->syscfg, STM32MP1_SYSCFG_PMCCLRR, in stm32_adc_core_switches_supply_dis()
522 regulator_disable(priv->vdd); in stm32_adc_core_switches_supply_dis()
525 if (priv->booster) in stm32_adc_core_switches_supply_dis()
526 regulator_disable(priv->booster); in stm32_adc_core_switches_supply_dis()
536 ret = regulator_enable(priv->vdda); in stm32_adc_core_hw_start()
542 ret = regulator_get_voltage(priv->vdda); in stm32_adc_core_hw_start()
547 priv->vdda_uv = ret; in stm32_adc_core_hw_start()
553 ret = regulator_enable(priv->vref); in stm32_adc_core_hw_start()
559 ret = clk_prepare_enable(priv->bclk); in stm32_adc_core_hw_start()
561 dev_err(dev, "bus clk enable failed\n"); in stm32_adc_core_hw_start()
565 ret = clk_prepare_enable(priv->aclk); in stm32_adc_core_hw_start()
567 dev_err(dev, "adc clk enable failed\n"); in stm32_adc_core_hw_start()
571 writel_relaxed(priv->ccr_bak, priv->common.base + priv->cfg->regs->ccr); in stm32_adc_core_hw_start()
576 clk_disable_unprepare(priv->bclk); in stm32_adc_core_hw_start()
578 regulator_disable(priv->vref); in stm32_adc_core_hw_start()
582 regulator_disable(priv->vdda); in stm32_adc_core_hw_start()
593 priv->ccr_bak = readl_relaxed(priv->common.base + priv->cfg->regs->ccr); in stm32_adc_core_hw_stop()
594 clk_disable_unprepare(priv->aclk); in stm32_adc_core_hw_stop()
595 clk_disable_unprepare(priv->bclk); in stm32_adc_core_hw_stop()
596 regulator_disable(priv->vref); in stm32_adc_core_hw_stop()
598 regulator_disable(priv->vdda); in stm32_adc_core_hw_stop()
604 struct device_node *np = dev->of_node; in stm32_adc_core_switches_probe()
608 priv->syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg"); in stm32_adc_core_switches_probe()
609 if (IS_ERR(priv->syscfg)) { in stm32_adc_core_switches_probe()
610 ret = PTR_ERR(priv->syscfg); in stm32_adc_core_switches_probe()
611 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
614 priv->syscfg = NULL; in stm32_adc_core_switches_probe()
618 if (priv->cfg->has_syscfg & HAS_VBOOSTER && in stm32_adc_core_switches_probe()
619 of_property_read_bool(np, "booster-supply")) { in stm32_adc_core_switches_probe()
620 priv->booster = devm_regulator_get_optional(dev, "booster"); in stm32_adc_core_switches_probe()
621 if (IS_ERR(priv->booster)) { in stm32_adc_core_switches_probe()
622 ret = PTR_ERR(priv->booster); in stm32_adc_core_switches_probe()
623 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
626 priv->booster = NULL; in stm32_adc_core_switches_probe()
631 if (priv->cfg->has_syscfg & HAS_ANASWVDD && in stm32_adc_core_switches_probe()
632 of_property_read_bool(np, "vdd-supply")) { in stm32_adc_core_switches_probe()
633 priv->vdd = devm_regulator_get_optional(dev, "vdd"); in stm32_adc_core_switches_probe()
634 if (IS_ERR(priv->vdd)) { in stm32_adc_core_switches_probe()
635 ret = PTR_ERR(priv->vdd); in stm32_adc_core_switches_probe()
636 if (ret != -ENODEV) in stm32_adc_core_switches_probe()
639 priv->vdd = NULL; in stm32_adc_core_switches_probe()
643 if (priv->vdd) { in stm32_adc_core_switches_probe()
644 ret = regulator_enable(priv->vdd); in stm32_adc_core_switches_probe()
650 ret = regulator_get_voltage(priv->vdd); in stm32_adc_core_switches_probe()
653 regulator_disable(priv->vdd); in stm32_adc_core_switches_probe()
656 priv->vdd_uv = ret; in stm32_adc_core_switches_probe()
658 regulator_disable(priv->vdd); in stm32_adc_core_switches_probe()
667 struct device_node *np = pdev->dev.of_node; in stm32_adc_probe_identification()
673 if (!priv->cfg->ipid) in stm32_adc_probe_identification()
677 readl_relaxed(priv->common.base + STM32MP1_ADC_IPDR)); in stm32_adc_probe_identification()
678 if (id != priv->cfg->ipid) { in stm32_adc_probe_identification()
679 dev_err(&pdev->dev, "Unexpected IP version: 0x%x", id); in stm32_adc_probe_identification()
680 return -EINVAL; in stm32_adc_probe_identification()
692 val = readl_relaxed(priv->common.base + STM32MP1_ADC_HWCFGR0); in stm32_adc_probe_identification()
693 priv->nb_adc_max = FIELD_GET(STM32MP1_ADCNUM_MASK, val); in stm32_adc_probe_identification()
694 if (count > priv->nb_adc_max) { in stm32_adc_probe_identification()
695 dev_err(&pdev->dev, "Unexpected child number: %d", count); in stm32_adc_probe_identification()
696 return -EINVAL; in stm32_adc_probe_identification()
699 val = readl_relaxed(priv->common.base + STM32MP1_ADC_VERR); in stm32_adc_probe_identification()
700 dev_dbg(&pdev->dev, "ADC version: %lu.%lu\n", in stm32_adc_probe_identification()
710 struct device *dev = &pdev->dev; in stm32_adc_probe()
711 struct device_node *np = pdev->dev.of_node; in stm32_adc_probe()
716 if (!pdev->dev.of_node) in stm32_adc_probe()
717 return -ENODEV; in stm32_adc_probe()
719 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in stm32_adc_probe()
721 return -ENOMEM; in stm32_adc_probe()
722 platform_set_drvdata(pdev, &priv->common); in stm32_adc_probe()
724 priv->cfg = device_get_match_data(dev); in stm32_adc_probe()
725 priv->nb_adc_max = priv->cfg->num_adcs; in stm32_adc_probe()
726 spin_lock_init(&priv->common.lock); in stm32_adc_probe()
728 priv->common.base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in stm32_adc_probe()
729 if (IS_ERR(priv->common.base)) in stm32_adc_probe()
730 return PTR_ERR(priv->common.base); in stm32_adc_probe()
731 priv->common.phys_base = res->start; in stm32_adc_probe()
733 priv->vdda = devm_regulator_get(&pdev->dev, "vdda"); in stm32_adc_probe()
734 if (IS_ERR(priv->vdda)) in stm32_adc_probe()
735 return dev_err_probe(&pdev->dev, PTR_ERR(priv->vdda), in stm32_adc_probe()
738 priv->vref = devm_regulator_get(&pdev->dev, "vref"); in stm32_adc_probe()
739 if (IS_ERR(priv->vref)) in stm32_adc_probe()
740 return dev_err_probe(&pdev->dev, PTR_ERR(priv->vref), in stm32_adc_probe()
743 priv->aclk = devm_clk_get_optional(&pdev->dev, "adc"); in stm32_adc_probe()
744 if (IS_ERR(priv->aclk)) in stm32_adc_probe()
745 return dev_err_probe(&pdev->dev, PTR_ERR(priv->aclk), in stm32_adc_probe()
748 priv->bclk = devm_clk_get_optional(&pdev->dev, "bus"); in stm32_adc_probe()
749 if (IS_ERR(priv->bclk)) in stm32_adc_probe()
750 return dev_err_probe(&pdev->dev, PTR_ERR(priv->bclk), in stm32_adc_probe()
771 ret = regulator_get_voltage(priv->vref); in stm32_adc_probe()
773 dev_err(&pdev->dev, "vref get voltage failed, %d\n", ret); in stm32_adc_probe()
776 priv->common.vref_mv = ret / 1000; in stm32_adc_probe()
777 dev_dbg(&pdev->dev, "vref+=%dmV\n", priv->common.vref_mv); in stm32_adc_probe()
779 ret = of_property_read_u32(pdev->dev.of_node, "st,max-clk-rate-hz", in stm32_adc_probe()
782 priv->max_clk_rate = min(max_rate, priv->cfg->max_clk_rate_hz); in stm32_adc_probe()
784 priv->max_clk_rate = priv->cfg->max_clk_rate_hz; in stm32_adc_probe()
786 ret = priv->cfg->clk_sel(pdev, priv); in stm32_adc_probe()
794 ret = of_platform_populate(np, NULL, NULL, &pdev->dev); in stm32_adc_probe()
796 dev_err(&pdev->dev, "failed to populate DT children\n"); in stm32_adc_probe()
822 pm_runtime_get_sync(&pdev->dev); in stm32_adc_remove()
823 of_platform_depopulate(&pdev->dev); in stm32_adc_remove()
825 stm32_adc_core_hw_stop(&pdev->dev); in stm32_adc_remove()
826 pm_runtime_disable(&pdev->dev); in stm32_adc_remove()
827 pm_runtime_set_suspended(&pdev->dev); in stm32_adc_remove()
828 pm_runtime_put_noidle(&pdev->dev); in stm32_adc_remove()
891 .compatible = "st,stm32f4-adc-core",
894 .compatible = "st,stm32h7-adc-core",
897 .compatible = "st,stm32mp1-adc-core",
900 .compatible = "st,stm32mp13-adc-core",
911 .name = "stm32-adc-core",
921 MODULE_ALIAS("platform:stm32-adc-core");