102 	int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
116 	struct ingenic_adc *adc = iio_priv(iio_dev);  in ingenic_adc_set_adcmd()  local
118 	mutex_lock(&adc->lock);  in ingenic_adc_set_adcmd()
121 	readl(adc->base + JZ_ADC_REG_ADCMD);  in ingenic_adc_set_adcmd()
128 		       adc->base + JZ_ADC_REG_ADCMD);  in ingenic_adc_set_adcmd()
134 		       adc->base + JZ_ADC_REG_ADCMD);  in ingenic_adc_set_adcmd()
142 		       adc->base + JZ_ADC_REG_ADCMD);  in ingenic_adc_set_adcmd()
148 		       adc->base + JZ_ADC_REG_ADCMD);  in ingenic_adc_set_adcmd()
155 		       adc->base + JZ_ADC_REG_ADCMD);  in ingenic_adc_set_adcmd()
160 		       adc->base + JZ_ADC_REG_ADCMD);  in ingenic_adc_set_adcmd()
164 	writel(0, adc->base + JZ_ADC_REG_ADCMD);  in ingenic_adc_set_adcmd()
166 	mutex_unlock(&adc->lock);  in ingenic_adc_set_adcmd()
169 static void ingenic_adc_set_config(struct ingenic_adc *adc,  in ingenic_adc_set_config()  argument
175 	mutex_lock(&adc->lock);  in ingenic_adc_set_config()
177 	cfg = readl(adc->base + JZ_ADC_REG_CFG) & ~mask;  in ingenic_adc_set_config()
179 	writel(cfg, adc->base + JZ_ADC_REG_CFG);  in ingenic_adc_set_config()
181 	mutex_unlock(&adc->lock);  in ingenic_adc_set_config()
184 static void ingenic_adc_enable_unlocked(struct ingenic_adc *adc,  in ingenic_adc_enable_unlocked()  argument
190 	val = readb(adc->base + JZ_ADC_REG_ENABLE);  in ingenic_adc_enable_unlocked()
197 	writeb(val, adc->base + JZ_ADC_REG_ENABLE);  in ingenic_adc_enable_unlocked()
200 static void ingenic_adc_enable(struct ingenic_adc *adc,  in ingenic_adc_enable()  argument
204 	mutex_lock(&adc->lock);  in ingenic_adc_enable()
205 	ingenic_adc_enable_unlocked(adc, engine, enabled);  in ingenic_adc_enable()
206 	mutex_unlock(&adc->lock);  in ingenic_adc_enable()
209 static int ingenic_adc_capture(struct ingenic_adc *adc,  in ingenic_adc_capture()  argument
221 	mutex_lock(&adc->lock);  in ingenic_adc_capture()
222 	cfg = readl(adc->base + JZ_ADC_REG_CFG);  in ingenic_adc_capture()
223 	writel(cfg & ~JZ_ADC_REG_CFG_CMD_SEL, adc->base + JZ_ADC_REG_CFG);  in ingenic_adc_capture()
225 	ingenic_adc_enable_unlocked(adc, engine, true);  in ingenic_adc_capture()
226 	ret = readb_poll_timeout(adc->base + JZ_ADC_REG_ENABLE, val,  in ingenic_adc_capture()
229 		ingenic_adc_enable_unlocked(adc, engine, false);  in ingenic_adc_capture()
231 	writel(cfg, adc->base + JZ_ADC_REG_CFG);  in ingenic_adc_capture()
232 	mutex_unlock(&adc->lock);  in ingenic_adc_capture()
243 	struct ingenic_adc *adc = iio_priv(iio_dev);  in ingenic_adc_write_raw()  local
251 			if (!adc->soc_data->battery_vref_mode)  in ingenic_adc_write_raw()
254 			ret = clk_enable(adc->clk);  in ingenic_adc_write_raw()
262 				ingenic_adc_set_config(adc,  in ingenic_adc_write_raw()
265 				adc->low_vref_mode = false;  in ingenic_adc_write_raw()
267 				ingenic_adc_set_config(adc,  in ingenic_adc_write_raw()
270 				adc->low_vref_mode = true;  in ingenic_adc_write_raw()
273 			clk_disable(adc->clk);  in ingenic_adc_write_raw()
314 static int jz4725b_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc)  in jz4725b_adc_init_clk_div()  argument
320 	parent_clk = clk_get_parent(adc->clk);  in jz4725b_adc_init_clk_div()
345 	       adc->base + JZ_ADC_REG_ADCLK);  in jz4725b_adc_init_clk_div()
350 static int jz4770_adc_init_clk_div(struct device *dev, struct ingenic_adc *adc)  in jz4770_adc_init_clk_div()  argument
356 	parent_clk = clk_get_parent(adc->clk);  in jz4770_adc_init_clk_div()
383 	       adc->base + JZ_ADC_REG_ADCLK);  in jz4770_adc_init_clk_div()
613 	struct ingenic_adc *adc = iio_priv(iio_dev);  in ingenic_adc_read_avail()  local
618 		*length = adc->soc_data->battery_raw_avail_size;  in ingenic_adc_read_avail()
619 		*vals = adc->soc_data->battery_raw_avail;  in ingenic_adc_read_avail()
623 		*length = adc->soc_data->battery_scale_avail_size;  in ingenic_adc_read_avail()
624 		*vals = adc->soc_data->battery_scale_avail;  in ingenic_adc_read_avail()
636 	struct ingenic_adc *adc = iio_priv(iio_dev);  in ingenic_adc_read_chan_info_raw()  local
638 	ret = clk_enable(adc->clk);  in ingenic_adc_read_chan_info_raw()
646 	mutex_lock(&adc->aux_lock);  in ingenic_adc_read_chan_info_raw()
647 	if (adc->soc_data->has_aux_md && engine == 0) {  in ingenic_adc_read_chan_info_raw()
660 		ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_AUX_MD, cmd);  in ingenic_adc_read_chan_info_raw()
663 	ret = ingenic_adc_capture(adc, engine);  in ingenic_adc_read_chan_info_raw()
671 		*val = readw(adc->base + JZ_ADC_REG_ADSDAT);  in ingenic_adc_read_chan_info_raw()
674 		*val = readw(adc->base + JZ_ADC_REG_ADBDAT);  in ingenic_adc_read_chan_info_raw()
680 	mutex_unlock(&adc->aux_lock);  in ingenic_adc_read_chan_info_raw()
681 	clk_disable(adc->clk);  in ingenic_adc_read_chan_info_raw()
692 	struct ingenic_adc *adc = iio_priv(iio_dev);  in ingenic_adc_read_raw()  local
706 			if (adc->low_vref_mode) {  in ingenic_adc_read_raw()
710 				*val = adc->soc_data->battery_high_vref;  in ingenic_adc_read_raw()
711 				*val2 = adc->soc_data->battery_high_vref_bits;  in ingenic_adc_read_raw()
746 	struct ingenic_adc *adc = iio_priv(iio_dev);  in ingenic_adc_buffer_enable()  local
749 	ret = clk_enable(adc->clk);  in ingenic_adc_buffer_enable()
758 	ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_TOUCH_OPS_MASK,  in ingenic_adc_buffer_enable()
762 	writew(80, adc->base + JZ_ADC_REG_ADWAIT);  in ingenic_adc_buffer_enable()
763 	writew(2, adc->base + JZ_ADC_REG_ADSAME);  in ingenic_adc_buffer_enable()
764 	writeb((u8)~JZ_ADC_IRQ_TOUCH, adc->base + JZ_ADC_REG_CTRL);  in ingenic_adc_buffer_enable()
765 	writel(0, adc->base + JZ_ADC_REG_ADTCH);  in ingenic_adc_buffer_enable()
767 	ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_CMD_SEL,  in ingenic_adc_buffer_enable()
771 	ingenic_adc_enable(adc, 2, true);  in ingenic_adc_buffer_enable()
778 	struct ingenic_adc *adc = iio_priv(iio_dev);  in ingenic_adc_buffer_disable()  local
780 	ingenic_adc_enable(adc, 2, false);  in ingenic_adc_buffer_disable()
782 	ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_CMD_SEL, 0);  in ingenic_adc_buffer_disable()
784 	writeb(0xff, adc->base + JZ_ADC_REG_CTRL);  in ingenic_adc_buffer_disable()
785 	writeb(0xff, adc->base + JZ_ADC_REG_STATUS);  in ingenic_adc_buffer_disable()
786 	ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_TOUCH_OPS_MASK, 0);  in ingenic_adc_buffer_disable()
787 	writew(0, adc->base + JZ_ADC_REG_ADSAME);  in ingenic_adc_buffer_disable()
788 	writew(0, adc->base + JZ_ADC_REG_ADWAIT);  in ingenic_adc_buffer_disable()
789 	clk_disable(adc->clk);  in ingenic_adc_buffer_disable()
802 	struct ingenic_adc *adc = iio_priv(iio_dev);  in ingenic_adc_irq()  local
809 			tdat[i] = readl(adc->base + JZ_ADC_REG_ADTCH);  in ingenic_adc_irq()
815 	writeb(JZ_ADC_IRQ_TOUCH, adc->base + JZ_ADC_REG_STATUS);  in ingenic_adc_irq()
824 	struct ingenic_adc *adc;  in ingenic_adc_probe()  local
832 	iio_dev = devm_iio_device_alloc(dev, sizeof(*adc));  in ingenic_adc_probe()
836 	adc = iio_priv(iio_dev);  in ingenic_adc_probe()
837 	mutex_init(&adc->lock);  in ingenic_adc_probe()
838 	mutex_init(&adc->aux_lock);  in ingenic_adc_probe()
839 	adc->soc_data = soc_data;  in ingenic_adc_probe()
852 	adc->base = devm_platform_ioremap_resource(pdev, 0);  in ingenic_adc_probe()
853 	if (IS_ERR(adc->base))  in ingenic_adc_probe()
854 		return PTR_ERR(adc->base);  in ingenic_adc_probe()
856 	adc->clk = devm_clk_get_prepared(dev, "adc");  in ingenic_adc_probe()
857 	if (IS_ERR(adc->clk)) {  in ingenic_adc_probe()
859 		return PTR_ERR(adc->clk);  in ingenic_adc_probe()
862 	ret = clk_enable(adc->clk);  in ingenic_adc_probe()
870 		ret = soc_data->init_clk_div(dev, adc);  in ingenic_adc_probe()
872 			clk_disable_unprepare(adc->clk);  in ingenic_adc_probe()
878 	writeb(0x00, adc->base + JZ_ADC_REG_ENABLE);  in ingenic_adc_probe()
879 	writeb(0xff, adc->base + JZ_ADC_REG_CTRL);  in ingenic_adc_probe()
883 		ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL,  in ingenic_adc_probe()
886 		ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, 0);  in ingenic_adc_probe()
889 	clk_disable(adc->clk);  in ingenic_adc_probe()