Lines Matching +full:aina +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
9 * ad7380/1 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7380-7381.pdf
10 * ad7383/4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-7384.pdf
11 …* ad7386/7/8 : https://www.analog.com/media/en/technical-documentation/data-sheets/AD7386-7387-738…
12 * ad7380-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7380-4.pdf
13 * ad7381-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7381-4.pdf
14 …* ad7383/4-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7383-4-ad7384…
15 …* ad7386/7/8-4 : https://www.analog.com/media/en/technical-documentation/data-sheets/ad7386-4-7387…
104 /* Extended scan types for 12-bit unsigned chips. */
120 /* Extended scan types for 14-bit signed chips. */
136 /* Extended scan types for 14-bit unsigned chips. */
152 /* Extended scan types for 16-bit signed_chips. */
168 /* Extended scan types for 16-bit unsigned chips. */
255 "aina", "ainb",
259 "aina", "ainb", "ainc", "aind",
277 * export 4 channels and ad7386-4/7-4/8-4 export 8 channels.
280 * (i.e 0-1 or 0-3) and inputs AinX1 correspond to second half (i.e 2-3 or
281 * 4-7). Example for AD7386/7/8 (2 channels parts):
284 * | +----------------------------
287 * voltage0 | AinA0 --|--->| | | |
288 * | | | mux |----->| ADCA |---
289 * voltage2 | AinA1 --|--->| | | |
293 * voltage1 | AinB0 --|--->| | | |
294 * | | | mux |----->| ADCB |---
295 * voltage3 | AinB1 --|--->| | | |
298 * | +----------------------------
429 .name = "ad7380-4",
441 .name = "ad7381-4",
452 .name = "ad7383-4",
465 .name = "ad7384-4",
478 .name = "ad7386-4",
490 .name = "ad7387-4",
502 .name = "ad7388-4",
532 * Make the buffer large enough for MAX_NUM_CHANNELS 32-bit samples and
533 * one 64-bit aligned 64-bit timestamp.
550 .tx_buf = &st->tx, in ad7380_regmap_reg_write()
553 st->tx = FIELD_PREP(AD7380_REG_WR, 1) | in ad7380_regmap_reg_write()
557 return spi_sync_transfer(st->spi, &xfer, 1); in ad7380_regmap_reg_write()
569 .tx_buf = &st->tx, in ad7380_regmap_reg_read()
572 .value = st->chip_info->timing_specs->t_csh_ns, in ad7380_regmap_reg_read()
579 .rx_buf = &st->rx, in ad7380_regmap_reg_read()
584 st->tx = FIELD_PREP(AD7380_REG_WR, 0) | in ad7380_regmap_reg_read()
588 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); in ad7380_regmap_reg_read()
592 *val = FIELD_GET(AD7380_REG_DATA, st->rx); in ad7380_regmap_reg_read()
609 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad7380_debugfs_reg_access()
613 return regmap_read(st->regmap, reg, readval); in ad7380_debugfs_reg_access()
615 return regmap_write(st->regmap, reg, writeval); in ad7380_debugfs_reg_access()
637 if (st->ch == ch) in ad7380_set_ch()
640 ret = regmap_update_bits(st->regmap, in ad7380_set_ch()
648 st->ch = ch; in ad7380_set_ch()
650 if (st->oversampling_ratio > 1) in ad7380_set_ch()
652 T_CONVERT_X_NS * (st->oversampling_ratio - 1); in ad7380_set_ch()
654 return spi_sync_transfer(st->spi, &xfer, 1); in ad7380_set_ch()
658 * ad7380_update_xfers - update the SPI transfers base on the current scan type
665 struct spi_transfer *xfer = st->seq ? st->seq_xfer : st->normal_xfer; in ad7380_update_xfers()
673 if (st->oversampling_ratio > 1) in ad7380_update_xfers()
675 (st->oversampling_ratio - 1); in ad7380_update_xfers()
677 if (st->seq) { in ad7380_update_xfers()
681 scan_type->realbits; in ad7380_update_xfers()
683 BITS_TO_BYTES(scan_type->storagebits) * in ad7380_update_xfers()
684 st->chip_info->num_simult_channels; in ad7380_update_xfers()
687 if (st->oversampling_ratio > 1) in ad7380_update_xfers()
695 xfer[1].bits_per_word = scan_type->realbits; in ad7380_update_xfers()
696 xfer[1].len = BITS_TO_BYTES(scan_type->storagebits) * in ad7380_update_xfers()
697 st->chip_info->num_simult_channels; in ad7380_update_xfers()
705 struct spi_message *msg = &st->normal_msg; in ad7380_triggered_buffer_preenable()
711 scan_type = iio_get_current_scan_type(indio_dev, &indio_dev->channels[0]); in ad7380_triggered_buffer_preenable()
715 if (st->chip_info->has_mux) { in ad7380_triggered_buffer_preenable()
732 ret = regmap_update_bits(st->regmap, in ad7380_triggered_buffer_preenable()
738 msg = &st->seq_msg; in ad7380_triggered_buffer_preenable()
739 st->seq = true; in ad7380_triggered_buffer_preenable()
750 return spi_optimize_message(st->spi, msg); in ad7380_triggered_buffer_preenable()
756 struct spi_message *msg = &st->normal_msg; in ad7380_triggered_buffer_postdisable()
759 if (st->seq) { in ad7380_triggered_buffer_postdisable()
760 ret = regmap_update_bits(st->regmap, in ad7380_triggered_buffer_postdisable()
767 msg = &st->seq_msg; in ad7380_triggered_buffer_postdisable()
768 st->seq = false; in ad7380_triggered_buffer_postdisable()
784 struct iio_dev *indio_dev = pf->indio_dev; in ad7380_trigger_handler()
786 struct spi_message *msg = st->seq ? &st->seq_msg : &st->normal_msg; in ad7380_trigger_handler()
789 ret = spi_sync(st->spi, msg); in ad7380_trigger_handler()
793 iio_push_to_buffers_with_timestamp(indio_dev, &st->scan_data, in ad7380_trigger_handler()
794 pf->timestamp); in ad7380_trigger_handler()
797 iio_trigger_notify_done(indio_dev->trig); in ad7380_trigger_handler()
808 if (st->chip_info->has_mux) { in ad7380_read_direct()
811 if (index >= st->chip_info->num_simult_channels) { in ad7380_read_direct()
812 index -= st->chip_info->num_simult_channels; in ad7380_read_direct()
823 ret = spi_sync(st->spi, &st->normal_msg); in ad7380_read_direct()
827 if (scan_type->storagebits > 16) { in ad7380_read_direct()
828 if (scan_type->sign == 's') in ad7380_read_direct()
829 *val = sign_extend32(*(u32 *)(st->scan_data + 4 * index), in ad7380_read_direct()
830 scan_type->realbits - 1); in ad7380_read_direct()
832 *val = *(u32 *)(st->scan_data + 4 * index) & in ad7380_read_direct()
833 GENMASK(scan_type->realbits - 1, 0); in ad7380_read_direct()
835 if (scan_type->sign == 's') in ad7380_read_direct()
836 *val = sign_extend32(*(u16 *)(st->scan_data + 2 * index), in ad7380_read_direct()
837 scan_type->realbits - 1); in ad7380_read_direct()
839 *val = *(u16 *)(st->scan_data + 2 * index) & in ad7380_read_direct()
840 GENMASK(scan_type->realbits - 1, 0); in ad7380_read_direct()
860 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad7380_read_raw()
861 return ad7380_read_direct(st, chan->scan_index, in ad7380_read_raw()
869 * * VREF / 2^N, for pseudo-differential chips in ad7380_read_raw()
872 *val = st->vref_mv; in ad7380_read_raw()
873 *val2 = scan_type->realbits - chan->differential; in ad7380_read_raw()
881 *val = st->vcm_mv[chan->channel] * (1 << scan_type->realbits) in ad7380_read_raw()
882 / st->vref_mv; in ad7380_read_raw()
886 *val = st->oversampling_ratio; in ad7380_read_raw()
890 return -EINVAL; in ad7380_read_raw()
907 return -EINVAL; in ad7380_read_avail()
912 * ad7380_osr_to_regval - convert ratio to OSR register value
919 * Returns: register value (0 to 7) or -EINVAL if there is not an exact match
930 return -EINVAL; in ad7380_osr_to_regval()
949 iio_device_claim_direct_scoped(return -EBUSY, indio_dev) { in ad7380_write_raw()
950 ret = regmap_update_bits(st->regmap, in ad7380_write_raw()
959 st->oversampling_ratio = val; in ad7380_write_raw()
960 st->resolution_boost_enabled = boost; in ad7380_write_raw()
967 return regmap_update_bits(st->regmap, in ad7380_write_raw()
975 return -EINVAL; in ad7380_write_raw()
984 return st->resolution_boost_enabled ? AD7380_SCAN_TYPE_RESOLUTION_BOOST in ad7380_get_current_scan_type()
1001 ret = regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG2, in ad7380_init()
1010 ret = regmap_set_bits(st->regmap, AD7380_REG_ADDR_CONFIG1, in ad7380_init()
1017 st->oversampling_ratio = 1; in ad7380_init()
1018 st->ch = 0; in ad7380_init()
1019 st->seq = false; in ad7380_init()
1021 /* SPI 1-wire mode */ in ad7380_init()
1022 return regmap_update_bits(st->regmap, AD7380_REG_ADDR_CONFIG2, in ad7380_init()
1034 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); in ad7380_probe()
1036 return -ENOMEM; in ad7380_probe()
1039 st->spi = spi; in ad7380_probe()
1040 st->chip_info = spi_get_device_match_data(spi); in ad7380_probe()
1041 if (!st->chip_info) in ad7380_probe()
1042 return dev_err_probe(&spi->dev, -EINVAL, "missing match data\n"); in ad7380_probe()
1044 ret = devm_regulator_bulk_get_enable(&spi->dev, st->chip_info->num_supplies, in ad7380_probe()
1045 st->chip_info->supplies); in ad7380_probe()
1048 return dev_err_probe(&spi->dev, ret, in ad7380_probe()
1052 if (st->chip_info->external_ref_only) { in ad7380_probe()
1053 ret = devm_regulator_get_enable_read_voltage(&spi->dev, in ad7380_probe()
1056 return dev_err_probe(&spi->dev, ret, in ad7380_probe()
1059 st->vref_mv = ret / 1000; in ad7380_probe()
1068 ret = devm_regulator_get_enable_read_voltage(&spi->dev, in ad7380_probe()
1070 if (ret < 0 && ret != -ENODEV) in ad7380_probe()
1071 return dev_err_probe(&spi->dev, ret, in ad7380_probe()
1074 external_ref_en = ret != -ENODEV; in ad7380_probe()
1075 st->vref_mv = external_ref_en ? ret / 1000 : AD7380_INTERNAL_REF_MV; in ad7380_probe()
1078 if (st->chip_info->num_vcm_supplies > ARRAY_SIZE(st->vcm_mv)) in ad7380_probe()
1079 return dev_err_probe(&spi->dev, -EINVAL, in ad7380_probe()
1083 * pseudo-differential chips have common mode supplies for the negative in ad7380_probe()
1086 for (i = 0; i < st->chip_info->num_vcm_supplies; i++) { in ad7380_probe()
1087 const char *vcm = st->chip_info->vcm_supplies[i]; in ad7380_probe()
1089 ret = devm_regulator_get_enable_read_voltage(&spi->dev, vcm); in ad7380_probe()
1091 return dev_err_probe(&spi->dev, ret, in ad7380_probe()
1095 st->vcm_mv[i] = ret / 1000; in ad7380_probe()
1098 st->regmap = devm_regmap_init(&spi->dev, NULL, st, &ad7380_regmap_config); in ad7380_probe()
1099 if (IS_ERR(st->regmap)) in ad7380_probe()
1100 return dev_err_probe(&spi->dev, PTR_ERR(st->regmap), in ad7380_probe()
1112 * - first, toggle CS (no data xfer) to trigger a conversion in ad7380_probe()
1113 * - then, read data in ad7380_probe()
1115 st->normal_xfer[0].cs_change = 1; in ad7380_probe()
1116 st->normal_xfer[0].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
1117 st->normal_xfer[0].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
1118 st->normal_xfer[1].rx_buf = st->scan_data; in ad7380_probe()
1120 spi_message_init_with_transfers(&st->normal_msg, st->normal_xfer, in ad7380_probe()
1121 ARRAY_SIZE(st->normal_xfer)); in ad7380_probe()
1124 * - CS toggle (no data xfer) to get the right point in the sequence in ad7380_probe()
1125 * - CS toggle (no data xfer) to trigger a conversion of AinX0 and in ad7380_probe()
1127 * - 2 data reads, to read AinX0 and AinX1 in ad7380_probe()
1129 st->seq_xfer[0].cs_change = 1; in ad7380_probe()
1130 st->seq_xfer[0].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
1131 st->seq_xfer[0].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
1132 st->seq_xfer[1].cs_change = 1; in ad7380_probe()
1133 st->seq_xfer[1].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
1134 st->seq_xfer[1].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
1136 st->seq_xfer[2].rx_buf = st->scan_data; in ad7380_probe()
1137 st->seq_xfer[2].cs_change = 1; in ad7380_probe()
1138 st->seq_xfer[2].cs_change_delay.value = st->chip_info->timing_specs->t_csh_ns; in ad7380_probe()
1139 st->seq_xfer[2].cs_change_delay.unit = SPI_DELAY_UNIT_NSECS; in ad7380_probe()
1141 spi_message_init_with_transfers(&st->seq_msg, st->seq_xfer, in ad7380_probe()
1142 ARRAY_SIZE(st->seq_xfer)); in ad7380_probe()
1144 indio_dev->channels = st->chip_info->channels; in ad7380_probe()
1145 indio_dev->num_channels = st->chip_info->num_channels; in ad7380_probe()
1146 indio_dev->name = st->chip_info->name; in ad7380_probe()
1147 indio_dev->info = &ad7380_info; in ad7380_probe()
1148 indio_dev->modes = INDIO_DIRECT_MODE; in ad7380_probe()
1149 indio_dev->available_scan_masks = st->chip_info->available_scan_masks; in ad7380_probe()
1151 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, in ad7380_probe()
1162 return devm_iio_device_register(&spi->dev, indio_dev); in ad7380_probe()
1173 { .compatible = "adi,ad7380-4", .data = &ad7380_4_chip_info },
1174 { .compatible = "adi,ad7381-4", .data = &ad7381_4_chip_info },
1175 { .compatible = "adi,ad7383-4", .data = &ad7383_4_chip_info },
1176 { .compatible = "adi,ad7384-4", .data = &ad7384_4_chip_info },
1177 { .compatible = "adi,ad7386-4", .data = &ad7386_4_chip_info },
1178 { .compatible = "adi,ad7387-4", .data = &ad7387_4_chip_info },
1179 { .compatible = "adi,ad7388-4", .data = &ad7388_4_chip_info },
1191 { "ad7380-4", (kernel_ulong_t)&ad7380_4_chip_info },
1192 { "ad7381-4", (kernel_ulong_t)&ad7381_4_chip_info },
1193 { "ad7383-4", (kernel_ulong_t)&ad7383_4_chip_info },
1194 { "ad7384-4", (kernel_ulong_t)&ad7384_4_chip_info },
1195 { "ad7386-4", (kernel_ulong_t)&ad7386_4_chip_info },
1196 { "ad7387-4", (kernel_ulong_t)&ad7387_4_chip_info },
1197 { "ad7388-4", (kernel_ulong_t)&ad7388_4_chip_info },