Lines Matching refs:mclk_sel
289 u32 mclk_sel; member
1657 st->mclk_sel = AD4130_MCLK_153_6KHZ_EXT; in ad4310_parse_fw()
1659 st->mclk_sel = AD4130_MCLK_76_8KHZ_EXT; in ad4310_parse_fw()
1661 st->mclk_sel = AD4130_MCLK_76_8KHZ; in ad4310_parse_fw()
1664 st->mclk_sel != AD4130_MCLK_76_8KHZ) in ad4310_parse_fw()
1667 st->mclk_sel, st->int_pin_sel); in ad4310_parse_fw()
1736 enum ad4130_mclk_sel mclk_sel) in ad4130_set_mclk_sel() argument
1741 mclk_sel)); in ad4130_set_mclk_sel()
1754 return st->mclk_sel == AD4130_MCLK_76_8KHZ_OUT; in ad4130_int_clk_is_enabled()
1766 st->mclk_sel = AD4130_MCLK_76_8KHZ_OUT; in ad4130_int_clk_prepare()
1780 st->mclk_sel = AD4130_MCLK_76_8KHZ; in ad4130_int_clk_unprepare()
1799 st->mclk_sel != AD4130_MCLK_76_8KHZ) in ad4130_setup_int_clk()
1830 if (st->mclk_sel == AD4130_MCLK_153_6KHZ_EXT) in ad4130_setup()
1856 val |= FIELD_PREP(AD4130_ADC_CONTROL_MCLK_SEL_MASK, st->mclk_sel); in ad4130_setup()