Lines Matching full:ref_sel
232 u32 ref_sel; member
687 FIELD_PREP(AD4130_CONFIG_REF_SEL_MASK, setup_info->ref_sel) | in ad4130_write_slot_setup()
974 if (val == st->scale_tbls[setup_info->ref_sel][pga][0] && in ad4130_set_channel_pga()
975 val2 == st->scale_tbls[setup_info->ref_sel][pga][1]) in ad4130_set_channel_pga()
1085 *val = st->scale_tbls[setup_info->ref_sel][setup_info->pga][0]; in ad4130_read_raw()
1086 *val2 = st->scale_tbls[setup_info->ref_sel][setup_info->pga][1]; in ad4130_read_raw()
1118 *vals = (int *)st->scale_tbls[setup_info->ref_sel]; in ad4130_read_avail()
1119 *length = ARRAY_SIZE(st->scale_tbls[setup_info->ref_sel]) * 2; in ad4130_read_avail()
1380 enum ad4130_ref_sel ref_sel) in ad4130_get_ref_voltage() argument
1382 switch (ref_sel) { in ad4130_get_ref_voltage()
1431 setup_info->ref_sel = AD4130_REF_REFIN1; in ad4130_parse_fw_setup()
1433 &setup_info->ref_sel); in ad4130_parse_fw_setup()
1434 if (setup_info->ref_sel >= AD4130_REF_SEL_MAX) in ad4130_parse_fw_setup()
1437 setup_info->ref_sel); in ad4130_parse_fw_setup()
1439 if (setup_info->ref_sel == AD4130_REF_REFOUT_AVSS) in ad4130_parse_fw_setup()
1442 ret = ad4130_get_ref_voltage(st, setup_info->ref_sel); in ad4130_parse_fw_setup()
1445 setup_info->ref_sel); in ad4130_parse_fw_setup()