Lines Matching full:st
271 static int adxl367_set_measure_en(struct adxl367_state *st, bool en) in adxl367_set_measure_en() argument
277 ret = regmap_update_bits(st->regmap, ADXL367_REG_POWER_CTL, in adxl367_set_measure_en()
294 static void adxl367_scale_act_thresholds(struct adxl367_state *st, in adxl367_scale_act_thresholds() argument
298 st->act_threshold = st->act_threshold in adxl367_scale_act_thresholds()
301 st->inact_threshold = st->inact_threshold in adxl367_scale_act_thresholds()
306 static int _adxl367_set_act_threshold(struct adxl367_state *st, in _adxl367_set_act_threshold() argument
316 st->act_threshold_buf[0] = FIELD_PREP(ADXL367_THRESH_H_MASK, in _adxl367_set_act_threshold()
319 st->act_threshold_buf[1] = FIELD_PREP(ADXL367_THRESH_L_MASK, in _adxl367_set_act_threshold()
323 ret = regmap_bulk_write(st->regmap, reg, st->act_threshold_buf, in _adxl367_set_act_threshold()
324 sizeof(st->act_threshold_buf)); in _adxl367_set_act_threshold()
329 st->act_threshold = threshold; in _adxl367_set_act_threshold()
331 st->inact_threshold = threshold; in _adxl367_set_act_threshold()
336 static int adxl367_set_act_threshold(struct adxl367_state *st, in adxl367_set_act_threshold() argument
342 guard(mutex)(&st->lock); in adxl367_set_act_threshold()
344 ret = adxl367_set_measure_en(st, false); in adxl367_set_act_threshold()
348 ret = _adxl367_set_act_threshold(st, act, threshold); in adxl367_set_act_threshold()
352 return adxl367_set_measure_en(st, true); in adxl367_set_act_threshold()
355 static int adxl367_set_act_proc_mode(struct adxl367_state *st, in adxl367_set_act_proc_mode() argument
358 return regmap_update_bits(st->regmap, ADXL367_REG_ACT_INACT_CTL, in adxl367_set_act_proc_mode()
364 static int adxl367_set_act_interrupt_en(struct adxl367_state *st, in adxl367_set_act_interrupt_en() argument
370 return regmap_update_bits(st->regmap, ADXL367_REG_INT1_MAP, in adxl367_set_act_interrupt_en()
374 static int adxl367_get_act_interrupt_en(struct adxl367_state *st, in adxl367_get_act_interrupt_en() argument
382 ret = regmap_read(st->regmap, ADXL367_REG_INT1_MAP, &val); in adxl367_get_act_interrupt_en()
391 static int adxl367_set_act_en(struct adxl367_state *st, in adxl367_set_act_en() argument
397 return regmap_update_bits(st->regmap, ADXL367_REG_ACT_INACT_CTL, in adxl367_set_act_en()
402 static int adxl367_set_fifo_watermark_interrupt_en(struct adxl367_state *st, in adxl367_set_fifo_watermark_interrupt_en() argument
405 return regmap_update_bits(st->regmap, ADXL367_REG_INT1_MAP, in adxl367_set_fifo_watermark_interrupt_en()
410 static int adxl367_get_fifo_mode(struct adxl367_state *st, in adxl367_get_fifo_mode() argument
416 ret = regmap_read(st->regmap, ADXL367_REG_FIFO_CTL, &val); in adxl367_get_fifo_mode()
425 static int adxl367_set_fifo_mode(struct adxl367_state *st, in adxl367_set_fifo_mode() argument
428 return regmap_update_bits(st->regmap, ADXL367_REG_FIFO_CTL, in adxl367_set_fifo_mode()
434 static int adxl367_set_fifo_format(struct adxl367_state *st, in adxl367_set_fifo_format() argument
437 return regmap_update_bits(st->regmap, ADXL367_REG_FIFO_CTL, in adxl367_set_fifo_format()
443 static int adxl367_set_fifo_watermark(struct adxl367_state *st, in adxl367_set_fifo_watermark() argument
446 unsigned int fifo_samples = fifo_watermark * st->fifo_set_size; in adxl367_set_fifo_watermark()
453 fifo_samples /= st->fifo_set_size; in adxl367_set_fifo_watermark()
462 ret = regmap_update_bits(st->regmap, ADXL367_REG_FIFO_CTL, in adxl367_set_fifo_watermark()
467 ret = regmap_update_bits(st->regmap, ADXL367_REG_FIFO_SAMPLES, in adxl367_set_fifo_watermark()
472 st->fifo_watermark = fifo_watermark; in adxl367_set_fifo_watermark()
481 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_set_range() local
484 guard(mutex)(&st->lock); in adxl367_set_range()
486 ret = adxl367_set_measure_en(st, false); in adxl367_set_range()
490 ret = regmap_update_bits(st->regmap, ADXL367_REG_FILTER_CTL, in adxl367_set_range()
497 adxl367_scale_act_thresholds(st, st->range, range); in adxl367_set_range()
500 ret = _adxl367_set_act_threshold(st, ADXL367_ACTIVITY, in adxl367_set_range()
501 st->act_threshold); in adxl367_set_range()
505 ret = _adxl367_set_act_threshold(st, ADXL367_INACTIVITY, in adxl367_set_range()
506 st->inact_threshold); in adxl367_set_range()
510 ret = adxl367_set_measure_en(st, true); in adxl367_set_range()
514 st->range = range; in adxl367_set_range()
521 static int adxl367_time_ms_to_samples(struct adxl367_state *st, unsigned int ms) in adxl367_time_ms_to_samples() argument
523 int freq_hz = adxl367_samp_freq_tbl[st->odr][0]; in adxl367_time_ms_to_samples()
524 int freq_microhz = adxl367_samp_freq_tbl[st->odr][1]; in adxl367_time_ms_to_samples()
531 static int _adxl367_set_act_time_ms(struct adxl367_state *st, unsigned int ms) in _adxl367_set_act_time_ms() argument
533 unsigned int val = adxl367_time_ms_to_samples(st, ms); in _adxl367_set_act_time_ms()
539 ret = regmap_write(st->regmap, ADXL367_REG_TIME_ACT, val); in _adxl367_set_act_time_ms()
543 st->act_time_ms = ms; in _adxl367_set_act_time_ms()
548 static int _adxl367_set_inact_time_ms(struct adxl367_state *st, unsigned int ms) in _adxl367_set_inact_time_ms() argument
550 unsigned int val = adxl367_time_ms_to_samples(st, ms); in _adxl367_set_inact_time_ms()
556 st->inact_time_buf[0] = FIELD_PREP(ADXL367_TIME_INACT_H_MASK, in _adxl367_set_inact_time_ms()
559 st->inact_time_buf[1] = FIELD_PREP(ADXL367_TIME_INACT_L_MASK, in _adxl367_set_inact_time_ms()
563 ret = regmap_bulk_write(st->regmap, ADXL367_REG_TIME_INACT_H, in _adxl367_set_inact_time_ms()
564 st->inact_time_buf, sizeof(st->inact_time_buf)); in _adxl367_set_inact_time_ms()
568 st->inact_time_ms = ms; in _adxl367_set_inact_time_ms()
573 static int adxl367_set_act_time_ms(struct adxl367_state *st, in adxl367_set_act_time_ms() argument
579 guard(mutex)(&st->lock); in adxl367_set_act_time_ms()
581 ret = adxl367_set_measure_en(st, false); in adxl367_set_act_time_ms()
586 ret = _adxl367_set_act_time_ms(st, ms); in adxl367_set_act_time_ms()
588 ret = _adxl367_set_inact_time_ms(st, ms); in adxl367_set_act_time_ms()
593 return adxl367_set_measure_en(st, true); in adxl367_set_act_time_ms()
596 static int _adxl367_set_odr(struct adxl367_state *st, enum adxl367_odr odr) in _adxl367_set_odr() argument
600 ret = regmap_update_bits(st->regmap, ADXL367_REG_FILTER_CTL, in _adxl367_set_odr()
608 ret = _adxl367_set_act_time_ms(st, st->act_time_ms); in _adxl367_set_odr()
612 ret = _adxl367_set_inact_time_ms(st, st->inact_time_ms); in _adxl367_set_odr()
616 st->odr = odr; in _adxl367_set_odr()
624 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_set_odr() local
627 guard(mutex)(&st->lock); in adxl367_set_odr()
629 ret = adxl367_set_measure_en(st, false); in adxl367_set_odr()
633 ret = _adxl367_set_odr(st, odr); in adxl367_set_odr()
637 return adxl367_set_measure_en(st, true); in adxl367_set_odr()
642 static int adxl367_set_temp_adc_en(struct adxl367_state *st, unsigned int reg, in adxl367_set_temp_adc_en() argument
645 return regmap_update_bits(st->regmap, reg, ADXL367_ADC_EN_MASK, in adxl367_set_temp_adc_en()
649 static int adxl367_set_temp_adc_reg_en(struct adxl367_state *st, in adxl367_set_temp_adc_reg_en() argument
656 ret = adxl367_set_temp_adc_en(st, ADXL367_REG_TEMP_CTL, en); in adxl367_set_temp_adc_reg_en()
659 ret = adxl367_set_temp_adc_en(st, ADXL367_REG_ADC_CTL, en); in adxl367_set_temp_adc_reg_en()
674 static int adxl367_set_temp_adc_mask_en(struct adxl367_state *st, in adxl367_set_temp_adc_mask_en() argument
679 return adxl367_set_temp_adc_en(st, ADXL367_REG_TEMP_CTL, en); in adxl367_set_temp_adc_mask_en()
681 return adxl367_set_temp_adc_en(st, ADXL367_REG_ADC_CTL, en); in adxl367_set_temp_adc_mask_en()
686 static int adxl367_find_odr(struct adxl367_state *st, int val, int val2, in adxl367_find_odr() argument
705 static int adxl367_find_range(struct adxl367_state *st, int val, int val2, in adxl367_find_range() argument
729 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_read_sample() local
733 guard(mutex)(&st->lock); in adxl367_read_sample()
735 ret = adxl367_set_temp_adc_reg_en(st, chan->address, true); in adxl367_read_sample()
739 ret = regmap_bulk_read(st->regmap, chan->address, &st->sample_buf, in adxl367_read_sample()
740 sizeof(st->sample_buf)); in adxl367_read_sample()
744 sample = FIELD_GET(ADXL367_DATA_MASK, be16_to_cpu(st->sample_buf)); in adxl367_read_sample()
747 ret = adxl367_set_temp_adc_reg_en(st, chan->address, false); in adxl367_read_sample()
756 static int adxl367_get_status(struct adxl367_state *st, u8 *status, in adxl367_get_status() argument
762 ret = regmap_bulk_read(st->regmap, ADXL367_REG_STATUS, in adxl367_get_status()
763 st->status_buf, sizeof(st->status_buf)); in adxl367_get_status()
767 st->status_buf[2] &= ADXL367_FIFO_ENT_H_MASK; in adxl367_get_status()
769 *status = st->status_buf[0]; in adxl367_get_status()
770 *fifo_entries = get_unaligned_le16(&st->status_buf[1]); in adxl367_get_status()
797 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_push_fifo_data() local
804 fifo_entries -= fifo_entries % st->fifo_set_size; in adxl367_push_fifo_data()
806 ret = st->ops->read_fifo(st->context, st->fifo_buf, fifo_entries); in adxl367_push_fifo_data()
808 dev_err(st->dev, "Failed to read FIFO: %d\n", ret); in adxl367_push_fifo_data()
812 for (i = 0; i < fifo_entries; i += st->fifo_set_size) in adxl367_push_fifo_data()
813 iio_push_to_buffers(indio_dev, &st->fifo_buf[i]); in adxl367_push_fifo_data()
821 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_irq_handler() local
827 ret = adxl367_get_status(st, &status, &fifo_entries); in adxl367_irq_handler()
842 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_reg_access() local
845 return regmap_read(st->regmap, reg, readval); in adxl367_reg_access()
847 return regmap_write(st->regmap, reg, writeval); in adxl367_reg_access()
854 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_read_raw() local
862 guard(mutex)(&st->lock); in adxl367_read_raw()
863 *val = adxl367_range_scale_tbl[st->range][0]; in adxl367_read_raw()
864 *val2 = adxl367_range_scale_tbl[st->range][1]; in adxl367_read_raw()
890 guard(mutex)(&st->lock); in adxl367_read_raw()
891 *val = adxl367_samp_freq_tbl[st->odr][0]; in adxl367_read_raw()
892 *val2 = adxl367_samp_freq_tbl[st->odr][1]; in adxl367_read_raw()
904 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_write_raw() local
911 ret = adxl367_find_odr(st, val, val2, &odr); in adxl367_write_raw()
920 ret = adxl367_find_range(st, val, val2, &range); in adxl367_write_raw()
977 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_read_event_value() local
979 guard(mutex)(&st->lock); in adxl367_read_event_value()
984 *val = st->act_threshold; in adxl367_read_event_value()
987 *val = st->inact_threshold; in adxl367_read_event_value()
996 *val = st->act_time_ms; in adxl367_read_event_value()
1000 *val = st->inact_time_ms; in adxl367_read_event_value()
1018 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_write_event_value() local
1027 return adxl367_set_act_threshold(st, ADXL367_ACTIVITY, val); in adxl367_write_event_value()
1029 return adxl367_set_act_threshold(st, ADXL367_INACTIVITY, val); in adxl367_write_event_value()
1040 return adxl367_set_act_time_ms(st, ADXL367_ACTIVITY, val); in adxl367_write_event_value()
1042 return adxl367_set_act_time_ms(st, ADXL367_INACTIVITY, val); in adxl367_write_event_value()
1056 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_read_event_config() local
1062 ret = adxl367_get_act_interrupt_en(st, ADXL367_ACTIVITY, &en); in adxl367_read_event_config()
1065 ret = adxl367_get_act_interrupt_en(st, ADXL367_INACTIVITY, &en); in adxl367_read_event_config()
1092 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_write_event_config() local
1095 guard(mutex)(&st->lock); in adxl367_write_event_config()
1097 ret = adxl367_set_measure_en(st, false); in adxl367_write_event_config()
1101 ret = adxl367_set_act_interrupt_en(st, act, state); in adxl367_write_event_config()
1105 ret = adxl367_set_act_en(st, act, state ? ADCL367_ACT_REF_ENABLED in adxl367_write_event_config()
1110 return adxl367_set_measure_en(st, true); in adxl367_write_event_config()
1119 struct adxl367_state *st = iio_priv(dev_to_iio_dev(dev)); in adxl367_get_fifo_enabled() local
1123 ret = adxl367_get_fifo_mode(st, &fifo_mode); in adxl367_get_fifo_enabled()
1134 struct adxl367_state *st = iio_priv(dev_to_iio_dev(dev)); in adxl367_get_fifo_watermark() local
1137 guard(mutex)(&st->lock); in adxl367_get_fifo_watermark()
1138 fifo_watermark = st->fifo_watermark; in adxl367_get_fifo_watermark()
1161 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_set_watermark() local
1167 guard(mutex)(&st->lock); in adxl367_set_watermark()
1169 ret = adxl367_set_measure_en(st, false); in adxl367_set_watermark()
1173 ret = adxl367_set_fifo_watermark(st, val); in adxl367_set_watermark()
1177 return adxl367_set_measure_en(st, true); in adxl367_set_watermark()
1201 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_update_scan_mode() local
1208 guard(mutex)(&st->lock); in adxl367_update_scan_mode()
1210 ret = adxl367_set_measure_en(st, false); in adxl367_update_scan_mode()
1214 ret = adxl367_set_fifo_format(st, fifo_format); in adxl367_update_scan_mode()
1218 ret = adxl367_set_measure_en(st, true); in adxl367_update_scan_mode()
1222 st->fifo_set_size = bitmap_weight(active_scan_mask, in adxl367_update_scan_mode()
1230 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_buffer_postenable() local
1233 guard(mutex)(&st->lock); in adxl367_buffer_postenable()
1235 ret = adxl367_set_temp_adc_mask_en(st, indio_dev->active_scan_mask, in adxl367_buffer_postenable()
1240 ret = adxl367_set_measure_en(st, false); in adxl367_buffer_postenable()
1244 ret = adxl367_set_fifo_watermark_interrupt_en(st, true); in adxl367_buffer_postenable()
1248 ret = adxl367_set_fifo_mode(st, ADXL367_FIFO_MODE_STREAM); in adxl367_buffer_postenable()
1252 return adxl367_set_measure_en(st, true); in adxl367_buffer_postenable()
1257 struct adxl367_state *st = iio_priv(indio_dev); in adxl367_buffer_predisable() local
1260 guard(mutex)(&st->lock); in adxl367_buffer_predisable()
1262 ret = adxl367_set_measure_en(st, false); in adxl367_buffer_predisable()
1266 ret = adxl367_set_fifo_mode(st, ADXL367_FIFO_MODE_DISABLED); in adxl367_buffer_predisable()
1270 ret = adxl367_set_fifo_watermark_interrupt_en(st, false); in adxl367_buffer_predisable()
1274 ret = adxl367_set_measure_en(st, true); in adxl367_buffer_predisable()
1278 return adxl367_set_temp_adc_mask_en(st, indio_dev->active_scan_mask, in adxl367_buffer_predisable()
1366 static int adxl367_verify_devid(struct adxl367_state *st) in adxl367_verify_devid() argument
1371 ret = regmap_read(st->regmap, ADXL367_REG_DEVID, &val); in adxl367_verify_devid()
1373 return dev_err_probe(st->dev, ret, "Failed to read dev id\n"); in adxl367_verify_devid()
1376 return dev_err_probe(st->dev, -ENODEV, in adxl367_verify_devid()
1383 static int adxl367_setup(struct adxl367_state *st) in adxl367_setup() argument
1387 ret = _adxl367_set_act_threshold(st, ADXL367_ACTIVITY, in adxl367_setup()
1392 ret = _adxl367_set_act_threshold(st, ADXL367_INACTIVITY, in adxl367_setup()
1397 ret = adxl367_set_act_proc_mode(st, ADXL367_LOOPED); in adxl367_setup()
1401 ret = _adxl367_set_odr(st, ADXL367_ODR_400HZ); in adxl367_setup()
1405 ret = _adxl367_set_act_time_ms(st, 10); in adxl367_setup()
1409 ret = _adxl367_set_inact_time_ms(st, 10000); in adxl367_setup()
1413 return adxl367_set_measure_en(st, true); in adxl367_setup()
1421 struct adxl367_state *st; in adxl367_probe() local
1424 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); in adxl367_probe()
1428 st = iio_priv(indio_dev); in adxl367_probe()
1429 st->dev = dev; in adxl367_probe()
1430 st->regmap = regmap; in adxl367_probe()
1431 st->context = context; in adxl367_probe()
1432 st->ops = ops; in adxl367_probe()
1434 mutex_init(&st->lock); in adxl367_probe()
1443 ret = devm_regulator_bulk_get_enable(st->dev, in adxl367_probe()
1447 return dev_err_probe(st->dev, ret, in adxl367_probe()
1450 ret = regmap_write(st->regmap, ADXL367_REG_RESET, ADXL367_RESET_CODE); in adxl367_probe()
1456 ret = adxl367_verify_devid(st); in adxl367_probe()
1460 ret = adxl367_setup(st); in adxl367_probe()
1464 ret = devm_iio_kfifo_buffer_setup_ext(st->dev, indio_dev, in adxl367_probe()
1470 ret = devm_request_threaded_irq(st->dev, irq, NULL, in adxl367_probe()
1474 return dev_err_probe(st->dev, ret, "Failed to request irq\n"); in adxl367_probe()