Lines Matching +full:stop +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-or-later
15 #define UNIPHIER_FI2C_CR_MST BIT(3) /* controller mode */
17 #define UNIPHIER_FI2C_CR_STO BIT(1) /* stop condition */
26 #define UNIPHIER_FI2C_SSUT 0x18 /* restart/stop setup time control */
33 #define UNIPHIER_FI2C_INT_TC BIT(7) /* send complete (STOP) */
34 #define UNIPHIER_FI2C_INT_RC BIT(6) /* receive complete (STOP) */
41 #define UNIPHIER_FI2C_SR_STS BIT(11) /* stop condition detected */
99 * TX-FIFO stores target address in it for the first access. in uniphier_fi2c_fill_txfifo()
103 fifo_space--; in uniphier_fi2c_fill_txfifo()
105 while (priv->len) { in uniphier_fi2c_fill_txfifo()
106 if (fifo_space-- <= 0) in uniphier_fi2c_fill_txfifo()
109 writel(*priv->buf++, priv->membase + UNIPHIER_FI2C_DTTX); in uniphier_fi2c_fill_txfifo()
110 priv->len--; in uniphier_fi2c_fill_txfifo()
116 int fifo_left = priv->flags & UNIPHIER_FI2C_BYTE_WISE ? in uniphier_fi2c_drain_rxfifo()
119 while (priv->len) { in uniphier_fi2c_drain_rxfifo()
120 if (fifo_left-- <= 0) in uniphier_fi2c_drain_rxfifo()
123 *priv->buf++ = readl(priv->membase + UNIPHIER_FI2C_DTRX); in uniphier_fi2c_drain_rxfifo()
124 priv->len--; in uniphier_fi2c_drain_rxfifo()
130 writel(priv->enabled_irqs, priv->membase + UNIPHIER_FI2C_IE); in uniphier_fi2c_set_irqs()
136 writel(mask, priv->membase + UNIPHIER_FI2C_IC); in uniphier_fi2c_clear_irqs()
141 priv->enabled_irqs |= UNIPHIER_FI2C_INT_STOP; in uniphier_fi2c_stop()
144 priv->membase + UNIPHIER_FI2C_CR); in uniphier_fi2c_stop()
152 spin_lock(&priv->lock); in uniphier_fi2c_interrupt()
154 irq_status = readl(priv->membase + UNIPHIER_FI2C_INT); in uniphier_fi2c_interrupt()
155 irq_status &= priv->enabled_irqs; in uniphier_fi2c_interrupt()
161 priv->error = -EAGAIN; in uniphier_fi2c_interrupt()
166 priv->error = -ENXIO; in uniphier_fi2c_interrupt()
167 if (priv->flags & UNIPHIER_FI2C_RD) { in uniphier_fi2c_interrupt()
170 * The receive-completed interrupt is never set even if in uniphier_fi2c_interrupt()
171 * STOP condition is detected after the address phase in uniphier_fi2c_interrupt()
173 * To avoid time-out error, we issue STOP here, in uniphier_fi2c_interrupt()
178 priv->flags |= UNIPHIER_FI2C_DEFER_STOP_COMP; in uniphier_fi2c_interrupt()
181 goto stop; in uniphier_fi2c_interrupt()
185 if (!priv->len) in uniphier_fi2c_interrupt()
196 * (msg->len == 8, 16, 24, ...), the INT_RF bit is set a little in uniphier_fi2c_interrupt()
200 if (!priv->len && (irq_status & UNIPHIER_FI2C_INT_RB)) in uniphier_fi2c_interrupt()
203 if (unlikely(priv->flags & UNIPHIER_FI2C_MANUAL_NACK)) { in uniphier_fi2c_interrupt()
204 if (priv->len <= UNIPHIER_FI2C_FIFO_SIZE && in uniphier_fi2c_interrupt()
205 !(priv->flags & UNIPHIER_FI2C_BYTE_WISE)) { in uniphier_fi2c_interrupt()
206 priv->enabled_irqs |= UNIPHIER_FI2C_INT_RB; in uniphier_fi2c_interrupt()
208 priv->flags |= UNIPHIER_FI2C_BYTE_WISE; in uniphier_fi2c_interrupt()
210 if (priv->len <= 1) in uniphier_fi2c_interrupt()
213 priv->membase + UNIPHIER_FI2C_CR); in uniphier_fi2c_interrupt()
219 spin_unlock(&priv->lock); in uniphier_fi2c_interrupt()
224 if (priv->flags & UNIPHIER_FI2C_STOP) { in uniphier_fi2c_interrupt()
225 stop: in uniphier_fi2c_interrupt()
229 priv->enabled_irqs = 0; in uniphier_fi2c_interrupt()
231 complete(&priv->comp); in uniphier_fi2c_interrupt()
242 spin_unlock(&priv->lock); in uniphier_fi2c_interrupt()
250 priv->enabled_irqs |= UNIPHIER_FI2C_INT_TE; in uniphier_fi2c_tx_init()
254 writel(0, priv->membase + UNIPHIER_FI2C_TBC); in uniphier_fi2c_tx_init()
257 priv->membase + UNIPHIER_FI2C_DTTX); in uniphier_fi2c_tx_init()
268 priv->flags |= UNIPHIER_FI2C_RD; in uniphier_fi2c_rx_init()
270 if (likely(priv->len < 256)) { in uniphier_fi2c_rx_init()
275 writel(priv->len, priv->membase + UNIPHIER_FI2C_RBC); in uniphier_fi2c_rx_init()
276 priv->enabled_irqs |= UNIPHIER_FI2C_INT_RF | in uniphier_fi2c_rx_init()
284 writel(0, priv->membase + UNIPHIER_FI2C_RBC); in uniphier_fi2c_rx_init()
285 priv->flags |= UNIPHIER_FI2C_MANUAL_NACK; in uniphier_fi2c_rx_init()
286 priv->enabled_irqs |= UNIPHIER_FI2C_INT_RF; in uniphier_fi2c_rx_init()
293 priv->membase + UNIPHIER_FI2C_DTTX); in uniphier_fi2c_rx_init()
298 writel(UNIPHIER_FI2C_RST_RST, priv->membase + UNIPHIER_FI2C_RST); in uniphier_fi2c_reset()
304 priv->membase + UNIPHIER_FI2C_BRST); in uniphier_fi2c_prepare_operation()
310 i2c_recover_bus(&priv->adap); in uniphier_fi2c_recover()
314 bool repeat, bool stop) in uniphier_fi2c_xfer_one() argument
317 bool is_read = msg->flags & I2C_M_RD; in uniphier_fi2c_xfer_one()
320 priv->len = msg->len; in uniphier_fi2c_xfer_one()
321 priv->buf = msg->buf; in uniphier_fi2c_xfer_one()
322 priv->enabled_irqs = UNIPHIER_FI2C_INT_FAULTS; in uniphier_fi2c_xfer_one()
323 priv->error = 0; in uniphier_fi2c_xfer_one()
324 priv->flags = 0; in uniphier_fi2c_xfer_one()
326 if (stop) in uniphier_fi2c_xfer_one()
327 priv->flags |= UNIPHIER_FI2C_STOP; in uniphier_fi2c_xfer_one()
329 reinit_completion(&priv->comp); in uniphier_fi2c_xfer_one()
332 priv->membase + UNIPHIER_FI2C_RST); /* reset TX/RX FIFO */ in uniphier_fi2c_xfer_one()
334 spin_lock_irqsave(&priv->lock, flags); in uniphier_fi2c_xfer_one()
337 uniphier_fi2c_rx_init(priv, msg->addr); in uniphier_fi2c_xfer_one()
339 uniphier_fi2c_tx_init(priv, msg->addr, repeat); in uniphier_fi2c_xfer_one()
344 * written only for a non-repeated START condition. in uniphier_fi2c_xfer_one()
348 priv->membase + UNIPHIER_FI2C_CR); in uniphier_fi2c_xfer_one()
350 spin_unlock_irqrestore(&priv->lock, flags); in uniphier_fi2c_xfer_one()
352 time_left = wait_for_completion_timeout(&priv->comp, adap->timeout); in uniphier_fi2c_xfer_one()
354 spin_lock_irqsave(&priv->lock, flags); in uniphier_fi2c_xfer_one()
355 priv->enabled_irqs = 0; in uniphier_fi2c_xfer_one()
357 spin_unlock_irqrestore(&priv->lock, flags); in uniphier_fi2c_xfer_one()
361 return -ETIMEDOUT; in uniphier_fi2c_xfer_one()
364 if (unlikely(priv->flags & UNIPHIER_FI2C_DEFER_STOP_COMP)) { in uniphier_fi2c_xfer_one()
368 ret = readl_poll_timeout(priv->membase + UNIPHIER_FI2C_SR, in uniphier_fi2c_xfer_one()
374 dev_err(&adap->dev, in uniphier_fi2c_xfer_one()
375 "stop condition was not completed.\n"); in uniphier_fi2c_xfer_one()
381 return priv->error; in uniphier_fi2c_xfer_one()
388 if (readl(priv->membase + UNIPHIER_FI2C_SR) & UNIPHIER_FI2C_SR_DB) { in uniphier_fi2c_check_bus_busy()
389 if (priv->busy_cnt++ > 3) { in uniphier_fi2c_check_bus_busy()
395 priv->busy_cnt = 0; in uniphier_fi2c_check_bus_busy()
398 return -EAGAIN; in uniphier_fi2c_check_bus_busy()
401 priv->busy_cnt = 0; in uniphier_fi2c_check_bus_busy()
416 /* Emit STOP if it is the last message or I2C_M_STOP is set. */ in uniphier_fi2c_xfer()
417 bool stop = (msg + 1 == emsg) || (msg->flags & I2C_M_STOP); in uniphier_fi2c_xfer() local
419 ret = uniphier_fi2c_xfer_one(adap, msg, repeat, stop); in uniphier_fi2c_xfer()
423 repeat = !stop; in uniphier_fi2c_xfer()
443 return !!(readl(priv->membase + UNIPHIER_FI2C_BM) & in uniphier_fi2c_get_scl()
452 priv->membase + UNIPHIER_FI2C_BRST); in uniphier_fi2c_set_scl()
459 return !!(readl(priv->membase + UNIPHIER_FI2C_BM) & in uniphier_fi2c_get_sda()
478 unsigned int cyc = priv->clk_cycle; in uniphier_fi2c_hw_init()
481 tmp = readl(priv->membase + UNIPHIER_FI2C_CR); in uniphier_fi2c_hw_init()
483 writel(tmp, priv->membase + UNIPHIER_FI2C_CR); in uniphier_fi2c_hw_init()
488 * Standard-mode: tLOW + tHIGH = 10 us in uniphier_fi2c_hw_init()
489 * Fast-mode: tLOW + tHIGH = 2.5 us in uniphier_fi2c_hw_init()
491 writel(cyc, priv->membase + UNIPHIER_FI2C_CYC); in uniphier_fi2c_hw_init()
493 * Standard-mode: tLOW = 4.7 us, tHIGH = 4.0 us, tBUF = 4.7 us in uniphier_fi2c_hw_init()
494 * Fast-mode: tLOW = 1.3 us, tHIGH = 0.6 us, tBUF = 1.3 us in uniphier_fi2c_hw_init()
497 writel(cyc * 5 / 9, priv->membase + UNIPHIER_FI2C_LCTL); in uniphier_fi2c_hw_init()
499 * Standard-mode: tHD;STA = 4.0 us, tSU;STA = 4.7 us, tSU;STO = 4.0 us in uniphier_fi2c_hw_init()
500 * Fast-mode: tHD;STA = 0.6 us, tSU;STA = 0.6 us, tSU;STO = 0.6 us in uniphier_fi2c_hw_init()
502 writel(cyc / 2, priv->membase + UNIPHIER_FI2C_SSUT); in uniphier_fi2c_hw_init()
504 * Standard-mode: tSU;DAT = 250 ns in uniphier_fi2c_hw_init()
505 * Fast-mode: tSU;DAT = 100 ns in uniphier_fi2c_hw_init()
507 writel(cyc / 16, priv->membase + UNIPHIER_FI2C_DSUT); in uniphier_fi2c_hw_init()
514 struct device *dev = &pdev->dev; in uniphier_fi2c_probe()
522 return -ENOMEM; in uniphier_fi2c_probe()
524 priv->membase = devm_platform_ioremap_resource(pdev, 0); in uniphier_fi2c_probe()
525 if (IS_ERR(priv->membase)) in uniphier_fi2c_probe()
526 return PTR_ERR(priv->membase); in uniphier_fi2c_probe()
532 if (of_property_read_u32(dev->of_node, "clock-frequency", &bus_speed)) in uniphier_fi2c_probe()
536 dev_err(dev, "invalid clock-frequency %d\n", bus_speed); in uniphier_fi2c_probe()
537 return -EINVAL; in uniphier_fi2c_probe()
540 priv->clk = devm_clk_get_enabled(dev, NULL); in uniphier_fi2c_probe()
541 if (IS_ERR(priv->clk)) { in uniphier_fi2c_probe()
543 return PTR_ERR(priv->clk); in uniphier_fi2c_probe()
546 clk_rate = clk_get_rate(priv->clk); in uniphier_fi2c_probe()
549 return -EINVAL; in uniphier_fi2c_probe()
552 priv->clk_cycle = clk_rate / bus_speed; in uniphier_fi2c_probe()
553 init_completion(&priv->comp); in uniphier_fi2c_probe()
554 spin_lock_init(&priv->lock); in uniphier_fi2c_probe()
555 priv->adap.owner = THIS_MODULE; in uniphier_fi2c_probe()
556 priv->adap.algo = &uniphier_fi2c_algo; in uniphier_fi2c_probe()
557 priv->adap.dev.parent = dev; in uniphier_fi2c_probe()
558 priv->adap.dev.of_node = dev->of_node; in uniphier_fi2c_probe()
559 strscpy(priv->adap.name, "UniPhier FI2C", sizeof(priv->adap.name)); in uniphier_fi2c_probe()
560 priv->adap.bus_recovery_info = &uniphier_fi2c_bus_recovery_info; in uniphier_fi2c_probe()
561 i2c_set_adapdata(&priv->adap, priv); in uniphier_fi2c_probe()
567 pdev->name, priv); in uniphier_fi2c_probe()
573 return i2c_add_adapter(&priv->adap); in uniphier_fi2c_probe()
580 i2c_del_adapter(&priv->adap); in uniphier_fi2c_remove()
587 clk_disable_unprepare(priv->clk); in uniphier_fi2c_suspend()
597 ret = clk_prepare_enable(priv->clk); in uniphier_fi2c_resume()
611 { .compatible = "socionext,uniphier-fi2c" },
620 .name = "uniphier-fi2c",
628 MODULE_DESCRIPTION("UniPhier FIFO-builtin I2C bus driver");