Lines Matching +full:comms +full:- +full:ssc4 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0-only
5 * I2C controller driver, used in STMicroelectronics devices.
13 #include <linux/i2c.h>
93 /* SSC I2C Control */
130 * struct st_i2c_timings - per-Mode tuning parameters
131 * @rate: I2C bus rate
132 * @rep_start_hold: I2C repeated start hold time requirement
133 * @rep_start_setup: I2C repeated start set up time requirement
134 * @start_hold: I2C start hold time requirement
135 * @data_setup_time: I2C data set up time requirement
136 * @stop_setup_time: I2C stop set up time requirement
137 * @bus_free_time: I2C bus free time requirement
138 * @sda_pulse_min_limit: I2C SDA pulse mini width limit
152 * struct st_i2c_client - client specific data
153 * @addr: 8-bit target addr, including r/w bit
158 * @stop: last I2C msg to be sent, i.e. STOP to be generated
170 * struct st_i2c_dev - private data of the controller
171 * @adap: I2C adapter for this controller
174 * @complete: completion of I2C message
177 * @mode: I2C mode of the controller. Standard or Fast only supported
180 * @client: I2C transfert information
181 * @busy: I2C transfer on-going
208 * From I2C Specifications v0.5.
211 * compatible with some out-of-spec devices,
244 if (readl_relaxed(i2c_dev->base + SSC_STA) & SSC_STA_RIR) in st_i2c_flush_rx_fifo()
247 count = readl_relaxed(i2c_dev->base + SSC_RX_FSTAT) & in st_i2c_flush_rx_fifo()
251 readl_relaxed(i2c_dev->base + SSC_RBUF); in st_i2c_flush_rx_fifo()
262 st_i2c_set_bits(i2c_dev->base + SSC_CTL, SSC_CTL_SR); in st_i2c_soft_reset()
263 st_i2c_clr_bits(i2c_dev->base + SSC_CTL, SSC_CTL_SR); in st_i2c_soft_reset()
267 * st_i2c_hw_config() - Prepare SSC block, calculate and apply tuning timings
274 struct st_i2c_timings *t = &i2c_timings[i2c_dev->mode]; in st_i2c_hw_config()
280 writel_relaxed(val, i2c_dev->base + SSC_CLR); in st_i2c_hw_config()
284 writel_relaxed(val, i2c_dev->base + SSC_CTL); in st_i2c_hw_config()
286 rate = clk_get_rate(i2c_dev->clk); in st_i2c_hw_config()
290 val = rate / (2 * t->rate); in st_i2c_hw_config()
291 writel_relaxed(val, i2c_dev->base + SSC_BRG); in st_i2c_hw_config()
293 /* Pre-scaler baudrate */ in st_i2c_hw_config()
294 writel_relaxed(1, i2c_dev->base + SSC_PRE_SCALER_BRG); in st_i2c_hw_config()
296 /* Enable I2C mode */ in st_i2c_hw_config()
297 writel_relaxed(SSC_I2C_I2CM, i2c_dev->base + SSC_I2C); in st_i2c_hw_config()
300 val = t->rep_start_hold / ns_per_clk; in st_i2c_hw_config()
301 writel_relaxed(val, i2c_dev->base + SSC_REP_START_HOLD); in st_i2c_hw_config()
304 val = t->rep_start_setup / ns_per_clk; in st_i2c_hw_config()
305 writel_relaxed(val, i2c_dev->base + SSC_REP_START_SETUP); in st_i2c_hw_config()
308 val = t->start_hold / ns_per_clk; in st_i2c_hw_config()
309 writel_relaxed(val, i2c_dev->base + SSC_START_HOLD); in st_i2c_hw_config()
312 val = t->data_setup_time / ns_per_clk; in st_i2c_hw_config()
313 writel_relaxed(val, i2c_dev->base + SSC_DATA_SETUP); in st_i2c_hw_config()
316 val = t->stop_setup_time / ns_per_clk; in st_i2c_hw_config()
317 writel_relaxed(val, i2c_dev->base + SSC_STOP_SETUP); in st_i2c_hw_config()
320 val = t->bus_free_time / ns_per_clk; in st_i2c_hw_config()
321 writel_relaxed(val, i2c_dev->base + SSC_BUS_FREE); in st_i2c_hw_config()
325 writel_relaxed(val, i2c_dev->base + SSC_PRSCALER); in st_i2c_hw_config()
326 writel_relaxed(val, i2c_dev->base + SSC_PRSCALER_DATAOUT); in st_i2c_hw_config()
329 val = i2c_dev->scl_min_width_us * rate / 100000000; in st_i2c_hw_config()
330 writel_relaxed(val, i2c_dev->base + SSC_NOISE_SUPP_WIDTH); in st_i2c_hw_config()
333 val = i2c_dev->sda_min_width_us * rate / 100000000; in st_i2c_hw_config()
334 writel_relaxed(val, i2c_dev->base + SSC_NOISE_SUPP_WIDTH_DATAOUT); in st_i2c_hw_config()
342 dev_dbg(i2c_dev->dev, "Trying to recover bus\n"); in st_i2c_recover_bus()
345 * SSP IP is dual role SPI/I2C to generate 9 clock pulses in st_i2c_recover_bus()
352 writel_relaxed(0, i2c_dev->base + SSC_IEN); in st_i2c_recover_bus()
357 st_i2c_set_bits(i2c_dev->base + SSC_CTL, ctl); in st_i2c_recover_bus()
359 st_i2c_clr_bits(i2c_dev->base + SSC_I2C, SSC_I2C_I2CM); in st_i2c_recover_bus()
362 writel_relaxed(0, i2c_dev->base + SSC_TBUF); in st_i2c_recover_bus()
364 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_I2CM); in st_i2c_recover_bus()
375 sta = readl_relaxed(i2c_dev->base + SSC_STA); in st_i2c_wait_free_bus()
382 dev_err(i2c_dev->dev, "bus not free (status = 0x%08x)\n", sta); in st_i2c_wait_free_bus()
384 ret = i2c_recover_bus(&i2c_dev->adap); in st_i2c_wait_free_bus()
386 dev_err(i2c_dev->dev, "Failed to recover the bus (%d)\n", ret); in st_i2c_wait_free_bus()
390 return -EBUSY; in st_i2c_wait_free_bus()
394 * st_i2c_write_tx_fifo() - Write a byte in the Tx FIFO
402 writel_relaxed(tbuf | 1, i2c_dev->base + SSC_TBUF); in st_i2c_write_tx_fifo()
406 * st_i2c_wr_fill_tx_fifo() - Fill the Tx FIFO in write mode
409 * This functions fills the Tx FIFO with I2C transfert buffer when
414 struct st_i2c_client *c = &i2c_dev->client; in st_i2c_wr_fill_tx_fifo()
418 sta = readl_relaxed(i2c_dev->base + SSC_STA); in st_i2c_wr_fill_tx_fifo()
422 tx_fstat = readl_relaxed(i2c_dev->base + SSC_TX_FSTAT); in st_i2c_wr_fill_tx_fifo()
425 if (c->count < (SSC_TXFIFO_SIZE - tx_fstat)) in st_i2c_wr_fill_tx_fifo()
426 i = c->count; in st_i2c_wr_fill_tx_fifo()
428 i = SSC_TXFIFO_SIZE - tx_fstat; in st_i2c_wr_fill_tx_fifo()
430 for (; i > 0; i--, c->count--, c->buf++) in st_i2c_wr_fill_tx_fifo()
431 st_i2c_write_tx_fifo(i2c_dev, *c->buf); in st_i2c_wr_fill_tx_fifo()
435 * st_i2c_rd_fill_tx_fifo() - Fill the Tx FIFO in read mode
444 struct st_i2c_client *c = &i2c_dev->client; in st_i2c_rd_fill_tx_fifo()
448 sta = readl_relaxed(i2c_dev->base + SSC_STA); in st_i2c_rd_fill_tx_fifo()
452 tx_fstat = readl_relaxed(i2c_dev->base + SSC_TX_FSTAT); in st_i2c_rd_fill_tx_fifo()
455 if (max < (SSC_TXFIFO_SIZE - tx_fstat)) in st_i2c_rd_fill_tx_fifo()
458 i = SSC_TXFIFO_SIZE - tx_fstat; in st_i2c_rd_fill_tx_fifo()
460 for (; i > 0; i--, c->xfered++) in st_i2c_rd_fill_tx_fifo()
466 struct st_i2c_client *c = &i2c_dev->client; in st_i2c_read_rx_fifo()
470 sta = readl_relaxed(i2c_dev->base + SSC_STA); in st_i2c_read_rx_fifo()
474 i = readl_relaxed(i2c_dev->base + SSC_RX_FSTAT); in st_i2c_read_rx_fifo()
478 for (; (i > 0) && (c->count > 0); i--, c->count--) { in st_i2c_read_rx_fifo()
479 rbuf = readl_relaxed(i2c_dev->base + SSC_RBUF) >> 1; in st_i2c_read_rx_fifo()
480 *c->buf++ = (u8)rbuf & 0xff; in st_i2c_read_rx_fifo()
484 dev_err(i2c_dev->dev, "Unexpected %d bytes in rx fifo\n", i); in st_i2c_read_rx_fifo()
490 * st_i2c_terminate_xfer() - Send either STOP or REPSTART condition
495 struct st_i2c_client *c = &i2c_dev->client; in st_i2c_terminate_xfer()
497 st_i2c_clr_bits(i2c_dev->base + SSC_IEN, SSC_IEN_TEEN); in st_i2c_terminate_xfer()
498 st_i2c_clr_bits(i2c_dev->base + SSC_I2C, SSC_I2C_STRTG); in st_i2c_terminate_xfer()
500 if (c->stop) { in st_i2c_terminate_xfer()
501 st_i2c_set_bits(i2c_dev->base + SSC_IEN, SSC_IEN_STOPEN); in st_i2c_terminate_xfer()
502 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_STOPG); in st_i2c_terminate_xfer()
504 st_i2c_set_bits(i2c_dev->base + SSC_IEN, SSC_IEN_REPSTRTEN); in st_i2c_terminate_xfer()
505 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_REPSTRTG); in st_i2c_terminate_xfer()
510 * st_i2c_handle_write() - Handle FIFO empty interrupt in case of write
515 struct st_i2c_client *c = &i2c_dev->client; in st_i2c_handle_write()
519 if (!c->count) in st_i2c_handle_write()
527 * st_i2c_handle_read() - Handle FIFO empty interrupt in case of read
532 struct st_i2c_client *c = &i2c_dev->client; in st_i2c_handle_read()
536 if (!c->xfered) { in st_i2c_handle_read()
537 readl_relaxed(i2c_dev->base + SSC_RBUF); in st_i2c_handle_read()
538 st_i2c_clr_bits(i2c_dev->base + SSC_I2C, SSC_I2C_TXENB); in st_i2c_handle_read()
543 if (!c->count) { in st_i2c_handle_read()
546 } else if (c->count == 1) { in st_i2c_handle_read()
548 st_i2c_clr_bits(i2c_dev->base + SSC_I2C, SSC_I2C_ACKG); in st_i2c_handle_read()
552 writel_relaxed(ien, i2c_dev->base + SSC_IEN); in st_i2c_handle_read()
554 st_i2c_rd_fill_tx_fifo(i2c_dev, c->count); in st_i2c_handle_read()
556 st_i2c_rd_fill_tx_fifo(i2c_dev, c->count - 1); in st_i2c_handle_read()
561 * st_i2c_isr_thread() - Interrupt routine
568 struct st_i2c_client *c = &i2c_dev->client; in st_i2c_isr_thread()
572 ien = readl_relaxed(i2c_dev->base + SSC_IEN); in st_i2c_isr_thread()
573 sta = readl_relaxed(i2c_dev->base + SSC_STA); in st_i2c_isr_thread()
578 dev_dbg(i2c_dev->dev, "spurious it (sta=0x%04x, ien=0x%04x)\n", in st_i2c_isr_thread()
585 if (c->addr & I2C_M_RD) in st_i2c_isr_thread()
593 writel_relaxed(0, i2c_dev->base + SSC_IEN); in st_i2c_isr_thread()
594 complete(&i2c_dev->complete); in st_i2c_isr_thread()
598 writel_relaxed(SSC_CLR_NACK, i2c_dev->base + SSC_CLR); in st_i2c_isr_thread()
601 if ((c->addr & I2C_M_RD) && (c->count == 1) && (c->xfered)) { in st_i2c_isr_thread()
607 writel_relaxed(it, i2c_dev->base + SSC_IEN); in st_i2c_isr_thread()
609 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_STOPG); in st_i2c_isr_thread()
610 c->result = -EIO; in st_i2c_isr_thread()
614 writel_relaxed(SSC_CLR_SSCARBL, i2c_dev->base + SSC_CLR); in st_i2c_isr_thread()
617 writel_relaxed(it, i2c_dev->base + SSC_IEN); in st_i2c_isr_thread()
619 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_STOPG); in st_i2c_isr_thread()
620 c->result = -EAGAIN; in st_i2c_isr_thread()
624 dev_err(i2c_dev->dev, in st_i2c_isr_thread()
630 * before re-enabling interrupt at GIC level, and thus avoid spurious in st_i2c_isr_thread()
633 readl(i2c_dev->base + SSC_IEN); in st_i2c_isr_thread()
639 * st_i2c_xfer_msg() - Transfer a single I2C message
641 * @msg: I2C message to transfer
648 struct st_i2c_client *c = &i2c_dev->client; in st_i2c_xfer_msg()
649 u32 ctl, i2c, it; in st_i2c_xfer_msg() local
653 c->addr = i2c_8bit_addr_from_msg(msg); in st_i2c_xfer_msg()
654 c->buf = msg->buf; in st_i2c_xfer_msg()
655 c->count = msg->len; in st_i2c_xfer_msg()
656 c->xfered = 0; in st_i2c_xfer_msg()
657 c->result = 0; in st_i2c_xfer_msg()
658 c->stop = is_last; in st_i2c_xfer_msg()
660 reinit_completion(&i2c_dev->complete); in st_i2c_xfer_msg()
663 st_i2c_set_bits(i2c_dev->base + SSC_CTL, ctl); in st_i2c_xfer_msg()
665 i2c = SSC_I2C_TXENB; in st_i2c_xfer_msg()
666 if (c->addr & I2C_M_RD) in st_i2c_xfer_msg()
667 i2c |= SSC_I2C_ACKG; in st_i2c_xfer_msg()
668 st_i2c_set_bits(i2c_dev->base + SSC_I2C, i2c); in st_i2c_xfer_msg()
671 st_i2c_write_tx_fifo(i2c_dev, c->addr); in st_i2c_xfer_msg()
673 /* Pre-fill Tx fifo with data in case of write */ in st_i2c_xfer_msg()
674 if (!(c->addr & I2C_M_RD)) in st_i2c_xfer_msg()
678 writel_relaxed(it, i2c_dev->base + SSC_IEN); in st_i2c_xfer_msg()
685 st_i2c_set_bits(i2c_dev->base + SSC_I2C, SSC_I2C_STRTG); in st_i2c_xfer_msg()
688 time_left = wait_for_completion_timeout(&i2c_dev->complete, in st_i2c_xfer_msg()
689 i2c_dev->adap.timeout); in st_i2c_xfer_msg()
690 ret = c->result; in st_i2c_xfer_msg()
693 ret = -ETIMEDOUT; in st_i2c_xfer_msg()
695 i2c = SSC_I2C_STOPG | SSC_I2C_REPSTRTG; in st_i2c_xfer_msg()
696 st_i2c_clr_bits(i2c_dev->base + SSC_I2C, i2c); in st_i2c_xfer_msg()
699 i2c_dev->base + SSC_CLR); in st_i2c_xfer_msg()
705 * st_i2c_xfer() - Transfer a single I2C message
716 i2c_dev->busy = true; in st_i2c_xfer()
718 ret = clk_prepare_enable(i2c_dev->clk); in st_i2c_xfer()
720 dev_err(i2c_dev->dev, "Failed to prepare_enable clock\n"); in st_i2c_xfer()
724 pinctrl_pm_select_default_state(i2c_dev->dev); in st_i2c_xfer()
729 ret = st_i2c_xfer_msg(i2c_dev, &msgs[i], i == 0, i == num - 1); in st_i2c_xfer()
731 pinctrl_pm_select_idle_state(i2c_dev->dev); in st_i2c_xfer()
733 clk_disable_unprepare(i2c_dev->clk); in st_i2c_xfer()
735 i2c_dev->busy = false; in st_i2c_xfer()
744 if (i2c_dev->busy) in st_i2c_suspend()
745 return -EBUSY; in st_i2c_suspend()
782 ret = of_property_read_u32(np, "st,i2c-min-scl-pulse-width-us", in st_i2c_of_get_deglitch()
783 &i2c_dev->scl_min_width_us); in st_i2c_of_get_deglitch()
784 if ((ret == -ENODATA) || (ret == -EOVERFLOW)) { in st_i2c_of_get_deglitch()
785 dev_err(i2c_dev->dev, "st,i2c-min-scl-pulse-width-us invalid\n"); in st_i2c_of_get_deglitch()
789 ret = of_property_read_u32(np, "st,i2c-min-sda-pulse-width-us", in st_i2c_of_get_deglitch()
790 &i2c_dev->sda_min_width_us); in st_i2c_of_get_deglitch()
791 if ((ret == -ENODATA) || (ret == -EOVERFLOW)) { in st_i2c_of_get_deglitch()
792 dev_err(i2c_dev->dev, "st,i2c-min-sda-pulse-width-us invalid\n"); in st_i2c_of_get_deglitch()
801 struct device_node *np = pdev->dev.of_node; in st_i2c_probe()
808 i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL); in st_i2c_probe()
810 return -ENOMEM; in st_i2c_probe()
812 i2c_dev->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in st_i2c_probe()
813 if (IS_ERR(i2c_dev->base)) in st_i2c_probe()
814 return PTR_ERR(i2c_dev->base); in st_i2c_probe()
816 i2c_dev->irq = irq_of_parse_and_map(np, 0); in st_i2c_probe()
817 if (!i2c_dev->irq) { in st_i2c_probe()
818 dev_err(&pdev->dev, "IRQ missing or invalid\n"); in st_i2c_probe()
819 return -EINVAL; in st_i2c_probe()
822 i2c_dev->clk = of_clk_get_by_name(np, "ssc"); in st_i2c_probe()
823 if (IS_ERR(i2c_dev->clk)) { in st_i2c_probe()
824 dev_err(&pdev->dev, "Unable to request clock\n"); in st_i2c_probe()
825 return PTR_ERR(i2c_dev->clk); in st_i2c_probe()
828 i2c_dev->mode = I2C_MODE_STANDARD; in st_i2c_probe()
829 ret = of_property_read_u32(np, "clock-frequency", &clk_rate); in st_i2c_probe()
831 i2c_dev->mode = I2C_MODE_FAST; in st_i2c_probe()
833 i2c_dev->dev = &pdev->dev; in st_i2c_probe()
835 ret = devm_request_threaded_irq(&pdev->dev, i2c_dev->irq, in st_i2c_probe()
837 IRQF_ONESHOT, pdev->name, i2c_dev); in st_i2c_probe()
839 dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq); in st_i2c_probe()
843 pinctrl_pm_select_default_state(i2c_dev->dev); in st_i2c_probe()
845 pinctrl_pm_select_idle_state(i2c_dev->dev); in st_i2c_probe()
851 adap = &i2c_dev->adap; in st_i2c_probe()
853 snprintf(adap->name, sizeof(adap->name), "ST I2C(%pa)", &res->start); in st_i2c_probe()
854 adap->owner = THIS_MODULE; in st_i2c_probe()
855 adap->timeout = 2 * HZ; in st_i2c_probe()
856 adap->retries = 0; in st_i2c_probe()
857 adap->algo = &st_i2c_algo; in st_i2c_probe()
858 adap->bus_recovery_info = &st_i2c_recovery_info; in st_i2c_probe()
859 adap->dev.parent = &pdev->dev; in st_i2c_probe()
860 adap->dev.of_node = pdev->dev.of_node; in st_i2c_probe()
862 init_completion(&i2c_dev->complete); in st_i2c_probe()
870 dev_info(i2c_dev->dev, "%s initialized\n", adap->name); in st_i2c_probe()
879 i2c_del_adapter(&i2c_dev->adap); in st_i2c_remove()
883 { .compatible = "st,comms-ssc-i2c", },
884 { .compatible = "st,comms-ssc4-i2c", },
891 .name = "st-i2c",
902 MODULE_DESCRIPTION("STMicroelectronics I2C driver");