38 #define S3C2410_IICCON			0x00  macro
186 	tmp = readl(i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_disable_ack()
187 	writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_disable_ack()
194 	tmp = readl(i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_enable_ack()
195 	writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_enable_ack()
203 	tmp = readl(i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_disable_irq()
204 	writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_disable_irq()
211 	tmp = readl(i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_enable_irq()
212 	writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_enable_irq()
220 		unsigned long tmp = readl(i2c->regs + S3C2410_IICCON);  in is_ack()
266 	iiccon = readl(i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_message_start()
279 	writel(iiccon, i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_message_start()
542 	tmp = readl(i2c->regs + S3C2410_IICCON);  in i2c_s3c_irq_nextbyte()
544 	writel(tmp, i2c->regs + S3C2410_IICCON);  in i2c_s3c_irq_nextbyte()
568 		tmp = readl(i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_irq()
570 		writel(tmp, i2c->regs +  S3C2410_IICCON);  in s3c24xx_i2c_irq()
603 	tmp = readl(i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_disable_bus()
606 	writel(tmp, i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_disable_bus()
870 	iiccon = readl(i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_clockrate()
880 	writel(iiccon, i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_clockrate()
946 	writel(0, i2c->regs + S3C2410_IICCON);  in s3c24xx_i2c_init()
960 		readl(i2c->regs + S3C2410_IICCON));  in s3c24xx_i2c_init()