Lines Matching +full:fast +full:- +full:clk
1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <linux/clk.h>
83 * struct i2c_spec_values - I2C specification values for various modes
87 * @min_setup_start_ns: min set-up time for a repeated START conditio
89 * @min_data_setup_ns: min data set-up time
90 * @min_setup_stop_ns: min set-up time for STOP condition
139 * struct rk3x_i2c_calced_timings - calculated V1 timings
162 * struct rk3x_i2c_soc_data - SOC-specific data
173 * struct rk3x_i2c - private data of the controller
178 * @clk: function clk for rk3399 or function & Bus clks for others
179 * @pclk: Bus clk for rk3399
180 * @clk_rate_nb: i2c clk rate change notify
201 struct clk *clk; member
202 struct clk *pclk;
229 writel(value, i2c->regs + offset); in i2c_writel()
234 return readl(i2c->regs + offset); in i2c_readl()
244 * rk3x_i2c_start - Generate a START condition, which triggers a REG_INT_START interrupt.
254 val |= REG_CON_EN | REG_CON_MOD(i2c->mode) | REG_CON_START; in rk3x_i2c_start()
257 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) in rk3x_i2c_start()
264 * rk3x_i2c_stop - Generate a STOP condition, which triggers a REG_INT_STOP interrupt.
272 i2c->processed = 0; in rk3x_i2c_stop()
273 i2c->msg = NULL; in rk3x_i2c_stop()
274 i2c->error = error; in rk3x_i2c_stop()
276 if (i2c->is_last_msg) { in rk3x_i2c_stop()
280 i2c->state = STATE_STOP; in rk3x_i2c_stop()
287 i2c->busy = false; in rk3x_i2c_stop()
288 i2c->state = STATE_IDLE; in rk3x_i2c_stop()
299 wake_up(&i2c->wait); in rk3x_i2c_stop()
304 * rk3x_i2c_prepare_read - Setup a read according to i2c->msg
309 unsigned int len = i2c->msg->len - i2c->processed; in rk3x_i2c_prepare_read()
326 if (i2c->processed != 0) { in rk3x_i2c_prepare_read()
336 * rk3x_i2c_fill_transmit_buf - Fill the transmit buffer with data from i2c->msg
349 if ((i2c->processed == i2c->msg->len) && (cnt != 0)) in rk3x_i2c_fill_transmit_buf()
352 if (i2c->processed == 0 && cnt == 0) in rk3x_i2c_fill_transmit_buf()
353 byte = (i2c->addr & 0x7f) << 1; in rk3x_i2c_fill_transmit_buf()
355 byte = i2c->msg->buf[i2c->processed++]; in rk3x_i2c_fill_transmit_buf()
363 if (i2c->processed == i2c->msg->len) in rk3x_i2c_fill_transmit_buf()
376 rk3x_i2c_stop(i2c, -EIO); in rk3x_i2c_handle_start()
377 dev_warn(i2c->dev, "unexpected irq in START: 0x%x\n", ipd); in rk3x_i2c_handle_start()
389 if (i2c->mode == REG_CON_MOD_TX) { in rk3x_i2c_handle_start()
391 i2c->state = STATE_WRITE; in rk3x_i2c_handle_start()
396 i2c->state = STATE_READ; in rk3x_i2c_handle_start()
404 rk3x_i2c_stop(i2c, -EIO); in rk3x_i2c_handle_write()
405 dev_err(i2c->dev, "unexpected irq in WRITE: 0x%x\n", ipd); in rk3x_i2c_handle_write()
414 if (i2c->processed == i2c->msg->len) in rk3x_i2c_handle_write()
415 rk3x_i2c_stop(i2c, i2c->error); in rk3x_i2c_handle_write()
423 unsigned int len = i2c->msg->len - i2c->processed; in rk3x_i2c_handle_read()
444 i2c->msg->buf[i2c->processed++] = byte; in rk3x_i2c_handle_read()
448 if (i2c->processed == i2c->msg->len) in rk3x_i2c_handle_read()
449 rk3x_i2c_stop(i2c, i2c->error); in rk3x_i2c_handle_read()
459 rk3x_i2c_stop(i2c, -EIO); in rk3x_i2c_handle_stop()
460 dev_err(i2c->dev, "unexpected irq in STOP: 0x%x\n", ipd); in rk3x_i2c_handle_stop()
473 i2c->busy = false; in rk3x_i2c_handle_stop()
474 i2c->state = STATE_IDLE; in rk3x_i2c_handle_stop()
477 wake_up(&i2c->wait); in rk3x_i2c_handle_stop()
485 spin_lock(&i2c->lock); in rk3x_i2c_irq()
488 if (i2c->state == STATE_IDLE) { in rk3x_i2c_irq()
489 dev_warn(i2c->dev, "irq in STATE_IDLE, ipd = 0x%x\n", ipd); in rk3x_i2c_irq()
494 dev_dbg(i2c->dev, "IRQ: state %d, ipd: %x\n", i2c->state, ipd); in rk3x_i2c_irq()
509 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) in rk3x_i2c_irq()
510 rk3x_i2c_stop(i2c, -ENXIO); in rk3x_i2c_irq()
517 switch (i2c->state) { in rk3x_i2c_irq()
535 spin_unlock(&i2c->lock); in rk3x_i2c_irq()
540 * rk3x_i2c_get_spec - Get timing values of I2C specification
556 * rk3x_i2c_v0_calc_timings - Calculate divider values for desired SCL frequency
561 * Return: %0 on success, -%EINVAL if the goal SCL rate is too slow. In that case
562 * a best-effort divider value is returned in divs. If the target rate is
584 /* Only support standard-mode and fast-mode */ in rk3x_i2c_v0_calc_timings()
585 if (WARN_ON(t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ)) in rk3x_i2c_v0_calc_timings()
586 t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ; in rk3x_i2c_v0_calc_timings()
589 if (WARN_ON(t->bus_freq_hz < 1000)) in rk3x_i2c_v0_calc_timings()
590 t->bus_freq_hz = 1000; in rk3x_i2c_v0_calc_timings()
600 * Note: max_low_ns should be (maximum data hold time * 2 - buffer) in rk3x_i2c_v0_calc_timings()
604 spec = rk3x_i2c_get_spec(t->bus_freq_hz); in rk3x_i2c_v0_calc_timings()
605 min_high_ns = t->scl_rise_ns + spec->min_high_ns; in rk3x_i2c_v0_calc_timings()
609 * - controller appears to drop SDA at .875x (7/8) programmed clk high. in rk3x_i2c_v0_calc_timings()
610 * - controller appears to keep SCL high for 2x programmed clk high. in rk3x_i2c_v0_calc_timings()
616 (t->scl_rise_ns + spec->min_setup_start_ns) * 1000, 875)); in rk3x_i2c_v0_calc_timings()
618 (t->scl_rise_ns + spec->min_setup_start_ns + t->sda_fall_ns + in rk3x_i2c_v0_calc_timings()
619 spec->min_high_ns), 2)); in rk3x_i2c_v0_calc_timings()
621 min_low_ns = t->scl_fall_ns + spec->min_low_ns; in rk3x_i2c_v0_calc_timings()
622 max_low_ns = spec->max_data_hold_ns * 2 - data_hold_buffer_ns; in rk3x_i2c_v0_calc_timings()
627 scl_rate_khz = t->bus_freq_hz / 1000; in rk3x_i2c_v0_calc_timings()
631 * so we don't clock too fast. in rk3x_i2c_v0_calc_timings()
658 t_calc->div_low = min_low_div; in rk3x_i2c_v0_calc_timings()
659 t_calc->div_high = min_high_div; in rk3x_i2c_v0_calc_timings()
663 * so we don't run too fast. in rk3x_i2c_v0_calc_timings()
665 extra_div = min_total_div - min_div_for_hold; in rk3x_i2c_v0_calc_timings()
687 extra_low_div = ideal_low_div - min_low_div; in rk3x_i2c_v0_calc_timings()
688 t_calc->div_low = ideal_low_div; in rk3x_i2c_v0_calc_timings()
689 t_calc->div_high = min_high_div + (extra_div - extra_low_div); in rk3x_i2c_v0_calc_timings()
696 t_calc->div_low--; in rk3x_i2c_v0_calc_timings()
697 t_calc->div_high--; in rk3x_i2c_v0_calc_timings()
700 t_calc->tuning = 0; in rk3x_i2c_v0_calc_timings()
702 if (t_calc->div_low > 0xffff) { in rk3x_i2c_v0_calc_timings()
703 t_calc->div_low = 0xffff; in rk3x_i2c_v0_calc_timings()
704 ret = -EINVAL; in rk3x_i2c_v0_calc_timings()
707 if (t_calc->div_high > 0xffff) { in rk3x_i2c_v0_calc_timings()
708 t_calc->div_high = 0xffff; in rk3x_i2c_v0_calc_timings()
709 ret = -EINVAL; in rk3x_i2c_v0_calc_timings()
716 * rk3x_i2c_v1_calc_timings - Calculate timing values for desired SCL frequency
721 * Return: %0 on success, -%EINVAL if the goal SCL rate is too slow. In that case
722 * a best-effort divider value is returned in divs. If the target rate is
737 * tSU;sda = [(8 - s) * l + 1] * T;
741 * tHD;sta = [8h * (u + 1) - 1] * T;
763 /* Support standard-mode, fast-mode and fast-mode plus */ in rk3x_i2c_v1_calc_timings()
764 if (WARN_ON(t->bus_freq_hz > I2C_MAX_FAST_MODE_PLUS_FREQ)) in rk3x_i2c_v1_calc_timings()
765 t->bus_freq_hz = I2C_MAX_FAST_MODE_PLUS_FREQ; in rk3x_i2c_v1_calc_timings()
768 if (WARN_ON(t->bus_freq_hz < 1000)) in rk3x_i2c_v1_calc_timings()
769 t->bus_freq_hz = 1000; in rk3x_i2c_v1_calc_timings()
777 spec = rk3x_i2c_get_spec(t->bus_freq_hz); in rk3x_i2c_v1_calc_timings()
779 /* calculate min-divh and min-divl */ in rk3x_i2c_v1_calc_timings()
781 scl_rate_khz = t->bus_freq_hz / 1000; in rk3x_i2c_v1_calc_timings()
784 min_high_ns = t->scl_rise_ns + spec->min_high_ns; in rk3x_i2c_v1_calc_timings()
787 min_low_ns = t->scl_fall_ns + spec->min_low_ns; in rk3x_i2c_v1_calc_timings()
792 * hardware would not output the i2c clk. in rk3x_i2c_v1_calc_timings()
809 t_calc->div_low = min_low_div; in rk3x_i2c_v1_calc_timings()
810 t_calc->div_high = min_high_div; in rk3x_i2c_v1_calc_timings()
814 * so we don't run too fast. in rk3x_i2c_v1_calc_timings()
819 extra_div = min_total_div - min_div_for_hold; in rk3x_i2c_v1_calc_timings()
823 t_calc->div_low = min_low_div + extra_low_div; in rk3x_i2c_v1_calc_timings()
824 t_calc->div_high = min_high_div + (extra_div - extra_low_div); in rk3x_i2c_v1_calc_timings()
831 for (sda_update_cfg = 3; sda_update_cfg > 0; sda_update_cfg--) { in rk3x_i2c_v1_calc_timings()
833 * (t_calc->div_low) + 1) in rk3x_i2c_v1_calc_timings()
835 min_setup_data_ns = DIV_ROUND_UP(((8 - sda_update_cfg) in rk3x_i2c_v1_calc_timings()
836 * (t_calc->div_low) + 1) in rk3x_i2c_v1_calc_timings()
838 if ((max_hold_data_ns < spec->max_data_hold_ns) && in rk3x_i2c_v1_calc_timings()
839 (min_setup_data_ns > spec->min_data_setup_ns)) in rk3x_i2c_v1_calc_timings()
844 min_setup_start_ns = t->scl_rise_ns + spec->min_setup_start_ns; in rk3x_i2c_v1_calc_timings()
846 - 1000000, 8 * 1000000 * (t_calc->div_high)); in rk3x_i2c_v1_calc_timings()
849 min_setup_stop_ns = t->scl_rise_ns + spec->min_setup_stop_ns; in rk3x_i2c_v1_calc_timings()
851 - 1000000, 8 * 1000000 * (t_calc->div_high)); in rk3x_i2c_v1_calc_timings()
853 t_calc->tuning = REG_CON_SDA_CFG(--sda_update_cfg) | in rk3x_i2c_v1_calc_timings()
854 REG_CON_STA_CFG(--stp_sta_cfg) | in rk3x_i2c_v1_calc_timings()
855 REG_CON_STO_CFG(--stp_sto_cfg); in rk3x_i2c_v1_calc_timings()
857 t_calc->div_low--; in rk3x_i2c_v1_calc_timings()
858 t_calc->div_high--; in rk3x_i2c_v1_calc_timings()
861 if (t_calc->div_low > 0xffff) { in rk3x_i2c_v1_calc_timings()
862 t_calc->div_low = 0xffff; in rk3x_i2c_v1_calc_timings()
863 ret = -EINVAL; in rk3x_i2c_v1_calc_timings()
866 if (t_calc->div_high > 0xffff) { in rk3x_i2c_v1_calc_timings()
867 t_calc->div_high = 0xffff; in rk3x_i2c_v1_calc_timings()
868 ret = -EINVAL; in rk3x_i2c_v1_calc_timings()
876 struct i2c_timings *t = &i2c->t; in rk3x_i2c_adapt_div()
883 ret = i2c->soc_data->calc_timings(clk_rate, t, &calc); in rk3x_i2c_adapt_div()
884 WARN_ONCE(ret != 0, "Could not reach SCL freq %u", t->bus_freq_hz); in rk3x_i2c_adapt_div()
886 clk_enable(i2c->pclk); in rk3x_i2c_adapt_div()
888 spin_lock_irqsave(&i2c->lock, flags); in rk3x_i2c_adapt_div()
895 spin_unlock_irqrestore(&i2c->lock, flags); in rk3x_i2c_adapt_div()
897 clk_disable(i2c->pclk); in rk3x_i2c_adapt_div()
902 dev_dbg(i2c->dev, in rk3x_i2c_adapt_div()
903 "CLK %lukhz, Req %uns, Act low %lluns high %lluns\n", in rk3x_i2c_adapt_div()
905 1000000000 / t->bus_freq_hz, in rk3x_i2c_adapt_div()
910 * rk3x_i2c_clk_notifier_cb - Clock rate change callback
917 * New dividers are written to the HW in the pre- or post change notification
920 * Code adapted from i2c-cadence.c.
940 if (i2c->soc_data->calc_timings(ndata->new_rate, &i2c->t, in rk3x_i2c_clk_notifier_cb()
945 if (ndata->new_rate > ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
946 rk3x_i2c_adapt_div(i2c, ndata->new_rate); in rk3x_i2c_clk_notifier_cb()
951 if (ndata->new_rate < ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
952 rk3x_i2c_adapt_div(i2c, ndata->new_rate); in rk3x_i2c_clk_notifier_cb()
956 if (ndata->new_rate > ndata->old_rate) in rk3x_i2c_clk_notifier_cb()
957 rk3x_i2c_adapt_div(i2c, ndata->old_rate); in rk3x_i2c_clk_notifier_cb()
965 * rk3x_i2c_setup - Setup I2C registers for an I2C operation specified by msgs, num.
970 * Must be called with i2c->lock held.
981 * reading. This speeds up SMBus-style register reads. in rk3x_i2c_setup()
991 dev_dbg(i2c->dev, "Combined write/read from addr 0x%x\n", in rk3x_i2c_setup()
1001 i2c->msg = &msgs[1]; in rk3x_i2c_setup()
1003 i2c->mode = REG_CON_MOD_REGISTER_TX; in rk3x_i2c_setup()
1012 * one-by-one. in rk3x_i2c_setup()
1022 i2c->mode = REG_CON_MOD_REGISTER_TX; in rk3x_i2c_setup()
1027 i2c->mode = REG_CON_MOD_TX; in rk3x_i2c_setup()
1030 i2c->msg = &msgs[0]; in rk3x_i2c_setup()
1035 i2c->addr = msgs[0].addr; in rk3x_i2c_setup()
1036 i2c->busy = true; in rk3x_i2c_setup()
1037 i2c->state = STATE_START; in rk3x_i2c_setup()
1038 i2c->processed = 0; in rk3x_i2c_setup()
1039 i2c->error = 0; in rk3x_i2c_setup()
1050 while (READ_ONCE(i2c->busy) && in rk3x_i2c_wait_xfer_poll()
1056 return !i2c->busy; in rk3x_i2c_wait_xfer_poll()
1062 struct rk3x_i2c *i2c = (struct rk3x_i2c *)adap->algo_data; in rk3x_i2c_xfer_common()
1069 spin_lock_irqsave(&i2c->lock, flags); in rk3x_i2c_xfer_common()
1071 clk_enable(i2c->clk); in rk3x_i2c_xfer_common()
1072 clk_enable(i2c->pclk); in rk3x_i2c_xfer_common()
1074 i2c->is_last_msg = false; in rk3x_i2c_xfer_common()
1081 ret = rk3x_i2c_setup(i2c, msgs + i, num - i); in rk3x_i2c_xfer_common()
1084 dev_err(i2c->dev, "rk3x_i2c_setup() failed\n"); in rk3x_i2c_xfer_common()
1089 i2c->is_last_msg = true; in rk3x_i2c_xfer_common()
1091 spin_unlock_irqrestore(&i2c->lock, flags); in rk3x_i2c_xfer_common()
1096 time_left = wait_event_timeout(i2c->wait, !i2c->busy, in rk3x_i2c_xfer_common()
1099 disable_irq(i2c->irq); in rk3x_i2c_xfer_common()
1104 enable_irq(i2c->irq); in rk3x_i2c_xfer_common()
1107 spin_lock_irqsave(&i2c->lock, flags); in rk3x_i2c_xfer_common()
1116 i2c->state = STATE_IDLE; in rk3x_i2c_xfer_common()
1118 ret = -ETIMEDOUT; in rk3x_i2c_xfer_common()
1122 if (i2c->error) { in rk3x_i2c_xfer_common()
1123 ret = i2c->error; in rk3x_i2c_xfer_common()
1128 clk_disable(i2c->pclk); in rk3x_i2c_xfer_common()
1129 clk_disable(i2c->clk); in rk3x_i2c_xfer_common()
1131 spin_unlock_irqrestore(&i2c->lock, flags); in rk3x_i2c_xfer_common()
1152 rk3x_i2c_adapt_div(i2c, clk_get_rate(i2c->clk)); in rk3x_i2c_resume()
1169 .grf_offset = -1,
1189 .grf_offset = -1,
1194 .grf_offset = -1,
1199 .grf_offset = -1,
1205 .compatible = "rockchip,rv1108-i2c",
1209 .compatible = "rockchip,rv1126-i2c",
1213 .compatible = "rockchip,rk3066-i2c",
1217 .compatible = "rockchip,rk3188-i2c",
1221 .compatible = "rockchip,rk3228-i2c",
1225 .compatible = "rockchip,rk3288-i2c",
1229 .compatible = "rockchip,rk3399-i2c",
1238 struct device_node *np = pdev->dev.of_node; in rk3x_i2c_probe()
1247 i2c = devm_kzalloc(&pdev->dev, sizeof(struct rk3x_i2c), GFP_KERNEL); in rk3x_i2c_probe()
1249 return -ENOMEM; in rk3x_i2c_probe()
1252 i2c->soc_data = match->data; in rk3x_i2c_probe()
1255 i2c_parse_fw_timings(&pdev->dev, &i2c->t, true); in rk3x_i2c_probe()
1257 strscpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name)); in rk3x_i2c_probe()
1258 i2c->adap.owner = THIS_MODULE; in rk3x_i2c_probe()
1259 i2c->adap.algo = &rk3x_i2c_algorithm; in rk3x_i2c_probe()
1260 i2c->adap.retries = 3; in rk3x_i2c_probe()
1261 i2c->adap.dev.of_node = np; in rk3x_i2c_probe()
1262 i2c->adap.algo_data = i2c; in rk3x_i2c_probe()
1263 i2c->adap.dev.parent = &pdev->dev; in rk3x_i2c_probe()
1265 i2c->dev = &pdev->dev; in rk3x_i2c_probe()
1267 spin_lock_init(&i2c->lock); in rk3x_i2c_probe()
1268 init_waitqueue_head(&i2c->wait); in rk3x_i2c_probe()
1270 i2c->regs = devm_platform_ioremap_resource(pdev, 0); in rk3x_i2c_probe()
1271 if (IS_ERR(i2c->regs)) in rk3x_i2c_probe()
1272 return PTR_ERR(i2c->regs); in rk3x_i2c_probe()
1281 if (i2c->soc_data->grf_offset >= 0) { in rk3x_i2c_probe()
1286 dev_err(&pdev->dev, in rk3x_i2c_probe()
1287 "rk3x-i2c needs 'rockchip,grf' property\n"); in rk3x_i2c_probe()
1292 dev_err(&pdev->dev, "rk3x-i2c needs i2cX alias"); in rk3x_i2c_probe()
1293 return -EINVAL; in rk3x_i2c_probe()
1296 /* rv1126 i2c2 uses non-sequential write mask 20, value 4 */ in rk3x_i2c_probe()
1297 if (i2c->soc_data == &rv1126_soc_data && bus_nr == 2) in rk3x_i2c_probe()
1303 ret = regmap_write(grf, i2c->soc_data->grf_offset, value); in rk3x_i2c_probe()
1305 dev_err(i2c->dev, "Could not write to GRF: %d\n", ret); in rk3x_i2c_probe()
1315 ret = devm_request_irq(&pdev->dev, irq, rk3x_i2c_irq, in rk3x_i2c_probe()
1316 0, dev_name(&pdev->dev), i2c); in rk3x_i2c_probe()
1318 dev_err(&pdev->dev, "cannot request IRQ\n"); in rk3x_i2c_probe()
1322 i2c->irq = irq; in rk3x_i2c_probe()
1326 if (i2c->soc_data->calc_timings == rk3x_i2c_v0_calc_timings) { in rk3x_i2c_probe()
1328 i2c->clk = devm_clk_get(&pdev->dev, NULL); in rk3x_i2c_probe()
1329 i2c->pclk = i2c->clk; in rk3x_i2c_probe()
1331 i2c->clk = devm_clk_get(&pdev->dev, "i2c"); in rk3x_i2c_probe()
1332 i2c->pclk = devm_clk_get(&pdev->dev, "pclk"); in rk3x_i2c_probe()
1335 if (IS_ERR(i2c->clk)) in rk3x_i2c_probe()
1336 return dev_err_probe(&pdev->dev, PTR_ERR(i2c->clk), in rk3x_i2c_probe()
1337 "Can't get bus clk\n"); in rk3x_i2c_probe()
1339 if (IS_ERR(i2c->pclk)) in rk3x_i2c_probe()
1340 return dev_err_probe(&pdev->dev, PTR_ERR(i2c->pclk), in rk3x_i2c_probe()
1341 "Can't get periph clk\n"); in rk3x_i2c_probe()
1343 ret = clk_prepare(i2c->clk); in rk3x_i2c_probe()
1345 dev_err(&pdev->dev, "Can't prepare bus clk: %d\n", ret); in rk3x_i2c_probe()
1348 ret = clk_prepare(i2c->pclk); in rk3x_i2c_probe()
1350 dev_err(&pdev->dev, "Can't prepare periph clock: %d\n", ret); in rk3x_i2c_probe()
1354 i2c->clk_rate_nb.notifier_call = rk3x_i2c_clk_notifier_cb; in rk3x_i2c_probe()
1355 ret = clk_notifier_register(i2c->clk, &i2c->clk_rate_nb); in rk3x_i2c_probe()
1357 dev_err(&pdev->dev, "Unable to register clock notifier\n"); in rk3x_i2c_probe()
1361 ret = clk_enable(i2c->clk); in rk3x_i2c_probe()
1363 dev_err(&pdev->dev, "Can't enable bus clk: %d\n", ret); in rk3x_i2c_probe()
1367 clk_rate = clk_get_rate(i2c->clk); in rk3x_i2c_probe()
1369 clk_disable(i2c->clk); in rk3x_i2c_probe()
1371 ret = i2c_add_adapter(&i2c->adap); in rk3x_i2c_probe()
1378 clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb); in rk3x_i2c_probe()
1380 clk_unprepare(i2c->pclk); in rk3x_i2c_probe()
1382 clk_unprepare(i2c->clk); in rk3x_i2c_probe()
1390 i2c_del_adapter(&i2c->adap); in rk3x_i2c_remove()
1392 clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb); in rk3x_i2c_remove()
1393 clk_unprepare(i2c->pclk); in rk3x_i2c_remove()
1394 clk_unprepare(i2c->clk); in rk3x_i2c_remove()
1403 .name = "rk3x-i2c",