Lines Matching refs:qup
273 void (*write_tx_fifo)(struct qup_i2c_dev *qup);
275 void (*read_rx_fifo)(struct qup_i2c_dev *qup);
277 void (*write_rx_tags)(struct qup_i2c_dev *qup);
282 struct qup_i2c_dev *qup = dev; in qup_i2c_interrupt() local
283 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_interrupt()
288 bus_err = readl(qup->base + QUP_I2C_STATUS); in qup_i2c_interrupt()
289 qup_err = readl(qup->base + QUP_ERROR_FLAGS); in qup_i2c_interrupt()
290 opflags = readl(qup->base + QUP_OPERATIONAL); in qup_i2c_interrupt()
292 if (!qup->msg) { in qup_i2c_interrupt()
294 writel(QUP_RESET_STATE, qup->base + QUP_STATE); in qup_i2c_interrupt()
303 writel(qup_err, qup->base + QUP_ERROR_FLAGS); in qup_i2c_interrupt()
307 writel(bus_err, qup->base + QUP_I2C_STATUS); in qup_i2c_interrupt()
314 if (qup->use_dma && (qup->qup_err || qup->bus_err)) in qup_i2c_interrupt()
325 if (!qup->use_dma) in qup_i2c_interrupt()
326 writel(QUP_RESET_STATE, qup->base + QUP_STATE); in qup_i2c_interrupt()
331 writel(QUP_OUT_SVC_FLAG, qup->base + QUP_OPERATIONAL); in qup_i2c_interrupt()
334 blk->tx_fifo_free += qup->out_blk_sz; in qup_i2c_interrupt()
335 if (qup->msg->flags & I2C_M_RD) in qup_i2c_interrupt()
336 qup->write_rx_tags(qup); in qup_i2c_interrupt()
338 qup->write_tx_fifo(qup); in qup_i2c_interrupt()
343 writel(QUP_IN_SVC_FLAG, qup->base + QUP_OPERATIONAL); in qup_i2c_interrupt()
346 blk->fifo_available += qup->in_fifo_sz; in qup_i2c_interrupt()
347 qup->read_rx_fifo(qup); in qup_i2c_interrupt()
349 blk->fifo_available += qup->in_blk_sz; in qup_i2c_interrupt()
350 qup->read_rx_fifo(qup); in qup_i2c_interrupt()
354 if (qup->msg->flags & I2C_M_RD) { in qup_i2c_interrupt()
370 qup->qup_err = qup_err; in qup_i2c_interrupt()
371 qup->bus_err = bus_err; in qup_i2c_interrupt()
372 complete(&qup->xfer); in qup_i2c_interrupt()
376 static int qup_i2c_poll_state_mask(struct qup_i2c_dev *qup, in qup_i2c_poll_state_mask() argument
387 state = readl(qup->base + QUP_STATE); in qup_i2c_poll_state_mask()
399 static int qup_i2c_poll_state(struct qup_i2c_dev *qup, u32 req_state) in qup_i2c_poll_state() argument
401 return qup_i2c_poll_state_mask(qup, req_state, QUP_STATE_MASK); in qup_i2c_poll_state()
404 static void qup_i2c_flush(struct qup_i2c_dev *qup) in qup_i2c_flush() argument
406 u32 val = readl(qup->base + QUP_STATE); in qup_i2c_flush()
409 writel(val, qup->base + QUP_STATE); in qup_i2c_flush()
412 static int qup_i2c_poll_state_valid(struct qup_i2c_dev *qup) in qup_i2c_poll_state_valid() argument
414 return qup_i2c_poll_state_mask(qup, 0, 0); in qup_i2c_poll_state_valid()
417 static int qup_i2c_poll_state_i2c_master(struct qup_i2c_dev *qup) in qup_i2c_poll_state_i2c_master() argument
419 return qup_i2c_poll_state_mask(qup, QUP_I2C_MAST_GEN, QUP_I2C_MAST_GEN); in qup_i2c_poll_state_i2c_master()
422 static int qup_i2c_change_state(struct qup_i2c_dev *qup, u32 state) in qup_i2c_change_state() argument
424 if (qup_i2c_poll_state_valid(qup) != 0) in qup_i2c_change_state()
427 writel(state, qup->base + QUP_STATE); in qup_i2c_change_state()
429 if (qup_i2c_poll_state(qup, state) != 0) in qup_i2c_change_state()
435 static int qup_i2c_bus_active(struct qup_i2c_dev *qup, int len) in qup_i2c_bus_active() argument
443 status = readl(qup->base + QUP_I2C_STATUS); in qup_i2c_bus_active()
456 static void qup_i2c_write_tx_fifo_v1(struct qup_i2c_dev *qup) in qup_i2c_write_tx_fifo_v1() argument
458 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_write_tx_fifo_v1()
459 struct i2c_msg *msg = qup->msg; in qup_i2c_write_tx_fifo_v1()
465 if (qup->pos == 0) { in qup_i2c_write_tx_fifo_v1()
474 while (blk->tx_fifo_free && qup->pos < msg->len) { in qup_i2c_write_tx_fifo_v1()
475 if (qup->pos == msg->len - 1) in qup_i2c_write_tx_fifo_v1()
481 val |= (qup_tag | msg->buf[qup->pos]) << QUP_MSW_SHIFT; in qup_i2c_write_tx_fifo_v1()
483 val = qup_tag | msg->buf[qup->pos]; in qup_i2c_write_tx_fifo_v1()
486 if (idx & 1 || qup->pos == msg->len - 1) in qup_i2c_write_tx_fifo_v1()
487 writel(val, qup->base + QUP_OUT_FIFO_BASE); in qup_i2c_write_tx_fifo_v1()
489 qup->pos++; in qup_i2c_write_tx_fifo_v1()
495 static void qup_i2c_set_blk_data(struct qup_i2c_dev *qup, in qup_i2c_set_blk_data() argument
498 qup->blk.pos = 0; in qup_i2c_set_blk_data()
499 qup->blk.data_len = msg->len; in qup_i2c_set_blk_data()
500 qup->blk.count = DIV_ROUND_UP(msg->len, qup->blk_xfer_limit); in qup_i2c_set_blk_data()
503 static int qup_i2c_get_data_len(struct qup_i2c_dev *qup) in qup_i2c_get_data_len() argument
507 if (qup->blk.data_len > qup->blk_xfer_limit) in qup_i2c_get_data_len()
508 data_len = qup->blk_xfer_limit; in qup_i2c_get_data_len()
510 data_len = qup->blk.data_len; in qup_i2c_get_data_len()
520 static int qup_i2c_set_tags_smb(u16 addr, u8 *tags, struct qup_i2c_dev *qup, in qup_i2c_set_tags_smb() argument
525 if (qup->is_smbus_read) { in qup_i2c_set_tags_smb()
527 tags[len++] = qup_i2c_get_data_len(qup); in qup_i2c_set_tags_smb()
542 static int qup_i2c_set_tags(u8 *tags, struct qup_i2c_dev *qup, in qup_i2c_set_tags() argument
549 int last = (qup->blk.pos == (qup->blk.count - 1)) && (qup->is_last); in qup_i2c_set_tags()
553 return qup_i2c_set_tags_smb(addr, tags, qup, msg); in qup_i2c_set_tags()
555 if (qup->blk.pos == 0) { in qup_i2c_set_tags()
571 tags[len++] = qup->blk.pos == (qup->blk.count - 1) ? in qup_i2c_set_tags()
578 data_len = qup_i2c_get_data_len(qup); in qup_i2c_set_tags()
592 struct qup_i2c_dev *qup = data; in qup_i2c_bam_cb() local
594 complete(&qup->xfer); in qup_i2c_bam_cb()
598 unsigned int buflen, struct qup_i2c_dev *qup, in qup_sg_set_buf() argument
604 ret = dma_map_sg(qup->dev, sg, 1, dir); in qup_sg_set_buf()
611 static void qup_i2c_rel_dma(struct qup_i2c_dev *qup) in qup_i2c_rel_dma() argument
613 if (qup->btx.dma) in qup_i2c_rel_dma()
614 dma_release_channel(qup->btx.dma); in qup_i2c_rel_dma()
615 if (qup->brx.dma) in qup_i2c_rel_dma()
616 dma_release_channel(qup->brx.dma); in qup_i2c_rel_dma()
617 qup->btx.dma = NULL; in qup_i2c_rel_dma()
618 qup->brx.dma = NULL; in qup_i2c_rel_dma()
621 static int qup_i2c_req_dma(struct qup_i2c_dev *qup) in qup_i2c_req_dma() argument
625 if (!qup->btx.dma) { in qup_i2c_req_dma()
626 qup->btx.dma = dma_request_chan(qup->dev, "tx"); in qup_i2c_req_dma()
627 if (IS_ERR(qup->btx.dma)) { in qup_i2c_req_dma()
628 err = PTR_ERR(qup->btx.dma); in qup_i2c_req_dma()
629 qup->btx.dma = NULL; in qup_i2c_req_dma()
630 dev_err(qup->dev, "\n tx channel not available"); in qup_i2c_req_dma()
635 if (!qup->brx.dma) { in qup_i2c_req_dma()
636 qup->brx.dma = dma_request_chan(qup->dev, "rx"); in qup_i2c_req_dma()
637 if (IS_ERR(qup->brx.dma)) { in qup_i2c_req_dma()
638 dev_err(qup->dev, "\n rx channel not available"); in qup_i2c_req_dma()
639 err = PTR_ERR(qup->brx.dma); in qup_i2c_req_dma()
640 qup->brx.dma = NULL; in qup_i2c_req_dma()
641 qup_i2c_rel_dma(qup); in qup_i2c_req_dma()
648 static int qup_i2c_bam_make_desc(struct qup_i2c_dev *qup, struct i2c_msg *msg) in qup_i2c_bam_make_desc() argument
655 qup->blk_xfer_limit = QUP_READ_LIMIT; in qup_i2c_bam_make_desc()
656 qup_i2c_set_blk_data(qup, msg); in qup_i2c_bam_make_desc()
658 blocks = qup->blk.count; in qup_i2c_bam_make_desc()
662 while (qup->blk.pos < blocks) { in qup_i2c_bam_make_desc()
664 tags = &qup->start_tag.start[qup->tag_buf_pos + len]; in qup_i2c_bam_make_desc()
665 len += qup_i2c_set_tags(tags, qup, msg); in qup_i2c_bam_make_desc()
666 qup->blk.data_len -= tlen; in qup_i2c_bam_make_desc()
669 ret = qup_sg_set_buf(&qup->brx.sg[qup->brx.sg_cnt++], in qup_i2c_bam_make_desc()
670 &qup->brx.tag.start[0], in qup_i2c_bam_make_desc()
671 2, qup, DMA_FROM_DEVICE); in qup_i2c_bam_make_desc()
676 ret = qup_sg_set_buf(&qup->brx.sg[qup->brx.sg_cnt++], in qup_i2c_bam_make_desc()
678 tlen, qup, in qup_i2c_bam_make_desc()
684 qup->blk.pos = i; in qup_i2c_bam_make_desc()
686 ret = qup_sg_set_buf(&qup->btx.sg[qup->btx.sg_cnt++], in qup_i2c_bam_make_desc()
687 &qup->start_tag.start[qup->tag_buf_pos], in qup_i2c_bam_make_desc()
688 len, qup, DMA_TO_DEVICE); in qup_i2c_bam_make_desc()
692 qup->tag_buf_pos += len; in qup_i2c_bam_make_desc()
694 while (qup->blk.pos < blocks) { in qup_i2c_bam_make_desc()
696 tags = &qup->start_tag.start[qup->tag_buf_pos + tx_len]; in qup_i2c_bam_make_desc()
697 len = qup_i2c_set_tags(tags, qup, msg); in qup_i2c_bam_make_desc()
698 qup->blk.data_len -= tlen; in qup_i2c_bam_make_desc()
700 ret = qup_sg_set_buf(&qup->btx.sg[qup->btx.sg_cnt++], in qup_i2c_bam_make_desc()
702 qup, DMA_TO_DEVICE); in qup_i2c_bam_make_desc()
707 ret = qup_sg_set_buf(&qup->btx.sg[qup->btx.sg_cnt++], in qup_i2c_bam_make_desc()
709 tlen, qup, DMA_TO_DEVICE); in qup_i2c_bam_make_desc()
713 qup->blk.pos = i; in qup_i2c_bam_make_desc()
716 qup->tag_buf_pos += tx_len; in qup_i2c_bam_make_desc()
722 static int qup_i2c_bam_schedule_desc(struct qup_i2c_dev *qup) in qup_i2c_bam_schedule_desc() argument
728 u32 tx_cnt = qup->btx.sg_cnt, rx_cnt = qup->brx.sg_cnt; in qup_i2c_bam_schedule_desc()
733 qup->btx.tag.start[0] = QUP_BAM_INPUT_EOT; in qup_i2c_bam_schedule_desc()
737 ret = qup_sg_set_buf(&qup->brx.sg[rx_cnt++], in qup_i2c_bam_schedule_desc()
738 &qup->brx.tag.start[0], in qup_i2c_bam_schedule_desc()
739 1, qup, DMA_FROM_DEVICE); in qup_i2c_bam_schedule_desc()
744 qup->btx.tag.start[len - 1] = QUP_BAM_FLUSH_STOP; in qup_i2c_bam_schedule_desc()
745 ret = qup_sg_set_buf(&qup->btx.sg[tx_cnt++], &qup->btx.tag.start[0], in qup_i2c_bam_schedule_desc()
746 len, qup, DMA_TO_DEVICE); in qup_i2c_bam_schedule_desc()
750 txd = dmaengine_prep_slave_sg(qup->btx.dma, qup->btx.sg, tx_cnt, in qup_i2c_bam_schedule_desc()
754 dev_err(qup->dev, "failed to get tx desc\n"); in qup_i2c_bam_schedule_desc()
761 txd->callback_param = qup; in qup_i2c_bam_schedule_desc()
770 dma_async_issue_pending(qup->btx.dma); in qup_i2c_bam_schedule_desc()
773 rxd = dmaengine_prep_slave_sg(qup->brx.dma, qup->brx.sg, in qup_i2c_bam_schedule_desc()
777 dev_err(qup->dev, "failed to get rx desc\n"); in qup_i2c_bam_schedule_desc()
781 dmaengine_terminate_sync(qup->btx.dma); in qup_i2c_bam_schedule_desc()
786 rxd->callback_param = qup; in qup_i2c_bam_schedule_desc()
793 dma_async_issue_pending(qup->brx.dma); in qup_i2c_bam_schedule_desc()
796 if (!wait_for_completion_timeout(&qup->xfer, qup->xfer_timeout)) in qup_i2c_bam_schedule_desc()
799 if (ret || qup->bus_err || qup->qup_err) { in qup_i2c_bam_schedule_desc()
800 reinit_completion(&qup->xfer); in qup_i2c_bam_schedule_desc()
802 ret = qup_i2c_change_state(qup, QUP_RUN_STATE); in qup_i2c_bam_schedule_desc()
804 dev_err(qup->dev, "change to run state timed out"); in qup_i2c_bam_schedule_desc()
808 qup_i2c_flush(qup); in qup_i2c_bam_schedule_desc()
811 if (!wait_for_completion_timeout(&qup->xfer, HZ)) in qup_i2c_bam_schedule_desc()
812 dev_err(qup->dev, "flush timed out\n"); in qup_i2c_bam_schedule_desc()
814 ret = (qup->bus_err & QUP_I2C_NACK_FLAG) ? -ENXIO : -EIO; in qup_i2c_bam_schedule_desc()
818 dma_unmap_sg(qup->dev, qup->btx.sg, tx_cnt, DMA_TO_DEVICE); in qup_i2c_bam_schedule_desc()
821 dma_unmap_sg(qup->dev, qup->brx.sg, rx_cnt, in qup_i2c_bam_schedule_desc()
827 static void qup_i2c_bam_clear_tag_buffers(struct qup_i2c_dev *qup) in qup_i2c_bam_clear_tag_buffers() argument
829 qup->btx.sg_cnt = 0; in qup_i2c_bam_clear_tag_buffers()
830 qup->brx.sg_cnt = 0; in qup_i2c_bam_clear_tag_buffers()
831 qup->tag_buf_pos = 0; in qup_i2c_bam_clear_tag_buffers()
837 struct qup_i2c_dev *qup = i2c_get_adapdata(adap); in qup_i2c_bam_xfer() local
841 enable_irq(qup->irq); in qup_i2c_bam_xfer()
842 ret = qup_i2c_req_dma(qup); in qup_i2c_bam_xfer()
847 writel(0, qup->base + QUP_MX_INPUT_CNT); in qup_i2c_bam_xfer()
848 writel(0, qup->base + QUP_MX_OUTPUT_CNT); in qup_i2c_bam_xfer()
851 writel(QUP_REPACK_EN | QUP_BAM_MODE, qup->base + QUP_IO_MODE); in qup_i2c_bam_xfer()
854 writel((0x3 << 8), qup->base + QUP_OPERATIONAL_MASK); in qup_i2c_bam_xfer()
857 ret = qup_i2c_change_state(qup, QUP_RUN_STATE); in qup_i2c_bam_xfer()
861 writel(qup->clk_ctl, qup->base + QUP_I2C_CLK_CTL); in qup_i2c_bam_xfer()
862 qup_i2c_bam_clear_tag_buffers(qup); in qup_i2c_bam_xfer()
865 qup->msg = msg + idx; in qup_i2c_bam_xfer()
866 qup->is_last = idx == (num - 1); in qup_i2c_bam_xfer()
868 ret = qup_i2c_bam_make_desc(qup, qup->msg); in qup_i2c_bam_xfer()
879 if (qup->btx.sg_cnt > qup->max_xfer_sg_len || in qup_i2c_bam_xfer()
880 qup->brx.sg_cnt > qup->max_xfer_sg_len || in qup_i2c_bam_xfer()
881 qup->is_last) { in qup_i2c_bam_xfer()
882 ret = qup_i2c_bam_schedule_desc(qup); in qup_i2c_bam_xfer()
886 qup_i2c_bam_clear_tag_buffers(qup); in qup_i2c_bam_xfer()
891 disable_irq(qup->irq); in qup_i2c_bam_xfer()
893 qup->msg = NULL; in qup_i2c_bam_xfer()
897 static int qup_i2c_wait_for_complete(struct qup_i2c_dev *qup, in qup_i2c_wait_for_complete() argument
903 left = wait_for_completion_timeout(&qup->xfer, qup->xfer_timeout); in qup_i2c_wait_for_complete()
905 writel(1, qup->base + QUP_SW_RESET); in qup_i2c_wait_for_complete()
909 if (qup->bus_err || qup->qup_err) in qup_i2c_wait_for_complete()
910 ret = (qup->bus_err & QUP_I2C_NACK_FLAG) ? -ENXIO : -EIO; in qup_i2c_wait_for_complete()
915 static void qup_i2c_read_rx_fifo_v1(struct qup_i2c_dev *qup) in qup_i2c_read_rx_fifo_v1() argument
917 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_read_rx_fifo_v1()
918 struct i2c_msg *msg = qup->msg; in qup_i2c_read_rx_fifo_v1()
922 while (blk->fifo_available && qup->pos < msg->len) { in qup_i2c_read_rx_fifo_v1()
925 val = readl(qup->base + QUP_IN_FIFO_BASE); in qup_i2c_read_rx_fifo_v1()
926 msg->buf[qup->pos++] = val & 0xFF; in qup_i2c_read_rx_fifo_v1()
928 msg->buf[qup->pos++] = val >> QUP_MSW_SHIFT; in qup_i2c_read_rx_fifo_v1()
934 if (qup->pos == msg->len) in qup_i2c_read_rx_fifo_v1()
938 static void qup_i2c_write_rx_tags_v1(struct qup_i2c_dev *qup) in qup_i2c_write_rx_tags_v1() argument
940 struct i2c_msg *msg = qup->msg; in qup_i2c_write_rx_tags_v1()
949 writel(val, qup->base + QUP_OUT_FIFO_BASE); in qup_i2c_write_rx_tags_v1()
952 static void qup_i2c_conf_v1(struct qup_i2c_dev *qup) in qup_i2c_conf_v1() argument
954 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_conf_v1()
958 blk->is_tx_blk_mode = blk->total_tx_len > qup->out_fifo_sz; in qup_i2c_conf_v1()
959 blk->is_rx_blk_mode = blk->total_rx_len > qup->in_fifo_sz; in qup_i2c_conf_v1()
963 writel(0, qup->base + QUP_MX_WRITE_CNT); in qup_i2c_conf_v1()
964 writel(blk->total_tx_len, qup->base + QUP_MX_OUTPUT_CNT); in qup_i2c_conf_v1()
966 writel(0, qup->base + QUP_MX_OUTPUT_CNT); in qup_i2c_conf_v1()
967 writel(blk->total_tx_len, qup->base + QUP_MX_WRITE_CNT); in qup_i2c_conf_v1()
973 writel(0, qup->base + QUP_MX_READ_CNT); in qup_i2c_conf_v1()
974 writel(blk->total_rx_len, qup->base + QUP_MX_INPUT_CNT); in qup_i2c_conf_v1()
976 writel(0, qup->base + QUP_MX_INPUT_CNT); in qup_i2c_conf_v1()
977 writel(blk->total_rx_len, qup->base + QUP_MX_READ_CNT); in qup_i2c_conf_v1()
983 writel(qup_config, qup->base + QUP_CONFIG); in qup_i2c_conf_v1()
984 writel(io_mode, qup->base + QUP_IO_MODE); in qup_i2c_conf_v1()
994 static int qup_i2c_conf_xfer_v1(struct qup_i2c_dev *qup, bool is_rx) in qup_i2c_conf_xfer_v1() argument
996 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_conf_xfer_v1()
1000 qup_i2c_conf_v1(qup); in qup_i2c_conf_xfer_v1()
1001 ret = qup_i2c_change_state(qup, QUP_RUN_STATE); in qup_i2c_conf_xfer_v1()
1005 writel(qup->clk_ctl, qup->base + QUP_I2C_CLK_CTL); in qup_i2c_conf_xfer_v1()
1007 ret = qup_i2c_change_state(qup, QUP_PAUSE_STATE); in qup_i2c_conf_xfer_v1()
1011 reinit_completion(&qup->xfer); in qup_i2c_conf_xfer_v1()
1012 enable_irq(qup->irq); in qup_i2c_conf_xfer_v1()
1014 blk->tx_fifo_free = qup->out_fifo_sz; in qup_i2c_conf_xfer_v1()
1017 qup_i2c_write_rx_tags_v1(qup); in qup_i2c_conf_xfer_v1()
1019 qup_i2c_write_tx_fifo_v1(qup); in qup_i2c_conf_xfer_v1()
1022 ret = qup_i2c_change_state(qup, QUP_RUN_STATE); in qup_i2c_conf_xfer_v1()
1026 ret = qup_i2c_wait_for_complete(qup, qup->msg); in qup_i2c_conf_xfer_v1()
1030 ret = qup_i2c_bus_active(qup, ONE_BYTE); in qup_i2c_conf_xfer_v1()
1033 disable_irq(qup->irq); in qup_i2c_conf_xfer_v1()
1037 static int qup_i2c_write_one(struct qup_i2c_dev *qup) in qup_i2c_write_one() argument
1039 struct i2c_msg *msg = qup->msg; in qup_i2c_write_one()
1040 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_write_one()
1042 qup->pos = 0; in qup_i2c_write_one()
1046 return qup_i2c_conf_xfer_v1(qup, false); in qup_i2c_write_one()
1049 static int qup_i2c_read_one(struct qup_i2c_dev *qup) in qup_i2c_read_one() argument
1051 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_read_one()
1053 qup->pos = 0; in qup_i2c_read_one()
1055 blk->total_rx_len = qup->msg->len; in qup_i2c_read_one()
1057 return qup_i2c_conf_xfer_v1(qup, true); in qup_i2c_read_one()
1064 struct qup_i2c_dev *qup = i2c_get_adapdata(adap); in qup_i2c_xfer() local
1067 ret = pm_runtime_get_sync(qup->dev); in qup_i2c_xfer()
1071 qup->bus_err = 0; in qup_i2c_xfer()
1072 qup->qup_err = 0; in qup_i2c_xfer()
1074 writel(1, qup->base + QUP_SW_RESET); in qup_i2c_xfer()
1075 ret = qup_i2c_poll_state(qup, QUP_RESET_STATE); in qup_i2c_xfer()
1080 writel(I2C_MINI_CORE | I2C_N_VAL, qup->base + QUP_CONFIG); in qup_i2c_xfer()
1083 if (qup_i2c_poll_state_i2c_master(qup)) { in qup_i2c_xfer()
1093 qup->msg = &msgs[idx]; in qup_i2c_xfer()
1095 ret = qup_i2c_read_one(qup); in qup_i2c_xfer()
1097 ret = qup_i2c_write_one(qup); in qup_i2c_xfer()
1102 ret = qup_i2c_change_state(qup, QUP_RESET_STATE); in qup_i2c_xfer()
1111 pm_runtime_mark_last_busy(qup->dev); in qup_i2c_xfer()
1112 pm_runtime_put_autosuspend(qup->dev); in qup_i2c_xfer()
1121 static void qup_i2c_conf_count_v2(struct qup_i2c_dev *qup) in qup_i2c_conf_count_v2() argument
1123 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_conf_count_v2()
1127 writel(qup->config_run | blk->total_tx_len, in qup_i2c_conf_count_v2()
1128 qup->base + QUP_MX_OUTPUT_CNT); in qup_i2c_conf_count_v2()
1130 writel(qup->config_run | blk->total_tx_len, in qup_i2c_conf_count_v2()
1131 qup->base + QUP_MX_WRITE_CNT); in qup_i2c_conf_count_v2()
1135 writel(qup->config_run | blk->total_rx_len, in qup_i2c_conf_count_v2()
1136 qup->base + QUP_MX_INPUT_CNT); in qup_i2c_conf_count_v2()
1138 writel(qup->config_run | blk->total_rx_len, in qup_i2c_conf_count_v2()
1139 qup->base + QUP_MX_READ_CNT); in qup_i2c_conf_count_v2()
1144 writel(qup_config, qup->base + QUP_CONFIG); in qup_i2c_conf_count_v2()
1152 static void qup_i2c_conf_mode_v2(struct qup_i2c_dev *qup) in qup_i2c_conf_mode_v2() argument
1154 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_conf_mode_v2()
1159 writel(0, qup->base + QUP_MX_WRITE_CNT); in qup_i2c_conf_mode_v2()
1161 writel(0, qup->base + QUP_MX_OUTPUT_CNT); in qup_i2c_conf_mode_v2()
1166 writel(0, qup->base + QUP_MX_READ_CNT); in qup_i2c_conf_mode_v2()
1168 writel(0, qup->base + QUP_MX_INPUT_CNT); in qup_i2c_conf_mode_v2()
1171 writel(io_mode, qup->base + QUP_IO_MODE); in qup_i2c_conf_mode_v2()
1191 static void qup_i2c_recv_data(struct qup_i2c_dev *qup) in qup_i2c_recv_data() argument
1193 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_recv_data()
1200 blk->rx_fifo_data = readl(qup->base + QUP_IN_FIFO_BASE); in qup_i2c_recv_data()
1215 static void qup_i2c_recv_tags(struct qup_i2c_dev *qup) in qup_i2c_recv_tags() argument
1217 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_recv_tags()
1219 blk->rx_fifo_data = readl(qup->base + QUP_IN_FIFO_BASE); in qup_i2c_recv_tags()
1233 static void qup_i2c_read_rx_fifo_v2(struct qup_i2c_dev *qup) in qup_i2c_read_rx_fifo_v2() argument
1235 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_read_rx_fifo_v2()
1238 qup_i2c_recv_tags(qup); in qup_i2c_read_rx_fifo_v2()
1242 qup_i2c_recv_data(qup); in qup_i2c_read_rx_fifo_v2()
1253 qup_i2c_write_blk_data(struct qup_i2c_dev *qup, u8 **data, unsigned int *len) in qup_i2c_write_blk_data() argument
1255 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_write_blk_data()
1263 qup->base + QUP_OUT_FIFO_BASE); in qup_i2c_write_blk_data()
1275 static void qup_i2c_write_rx_tags_v2(struct qup_i2c_dev *qup) in qup_i2c_write_rx_tags_v2() argument
1277 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_write_rx_tags_v2()
1279 qup_i2c_write_blk_data(qup, &blk->cur_tx_tags, &blk->tx_tag_len); in qup_i2c_write_rx_tags_v2()
1281 writel(blk->tx_fifo_data, qup->base + QUP_OUT_FIFO_BASE); in qup_i2c_write_rx_tags_v2()
1306 static void qup_i2c_write_tx_fifo_v2(struct qup_i2c_dev *qup) in qup_i2c_write_tx_fifo_v2() argument
1308 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_write_tx_fifo_v2()
1311 qup_i2c_write_blk_data(qup, &blk->cur_tx_tags, in qup_i2c_write_tx_fifo_v2()
1319 qup_i2c_write_blk_data(qup, &blk->cur_data, &blk->cur_blk_len); in qup_i2c_write_tx_fifo_v2()
1333 writel(blk->tx_fifo_data, qup->base + QUP_OUT_FIFO_BASE); in qup_i2c_write_tx_fifo_v2()
1342 qup_i2c_conf_xfer_v2(struct qup_i2c_dev *qup, bool is_rx, bool is_first, in qup_i2c_conf_xfer_v2() argument
1345 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_conf_xfer_v2()
1346 struct i2c_msg *msg = qup->msg; in qup_i2c_conf_xfer_v2()
1355 if (qup->is_smbus_read) { in qup_i2c_conf_xfer_v2()
1368 qup->config_run = is_first ? 0 : QUP_I2C_MX_CONFIG_DURING_RUN; in qup_i2c_conf_xfer_v2()
1371 qup_i2c_conf_count_v2(qup); in qup_i2c_conf_xfer_v2()
1375 ret = qup_i2c_change_state(qup, QUP_RUN_STATE); in qup_i2c_conf_xfer_v2()
1379 writel(qup->clk_ctl, qup->base + QUP_I2C_CLK_CTL); in qup_i2c_conf_xfer_v2()
1381 ret = qup_i2c_change_state(qup, QUP_PAUSE_STATE); in qup_i2c_conf_xfer_v2()
1386 reinit_completion(&qup->xfer); in qup_i2c_conf_xfer_v2()
1387 enable_irq(qup->irq); in qup_i2c_conf_xfer_v2()
1393 blk->tx_fifo_free = qup->out_fifo_sz; in qup_i2c_conf_xfer_v2()
1396 qup_i2c_write_rx_tags_v2(qup); in qup_i2c_conf_xfer_v2()
1398 qup_i2c_write_tx_fifo_v2(qup); in qup_i2c_conf_xfer_v2()
1401 ret = qup_i2c_change_state(qup, QUP_RUN_STATE); in qup_i2c_conf_xfer_v2()
1405 ret = qup_i2c_wait_for_complete(qup, msg); in qup_i2c_conf_xfer_v2()
1411 ret = qup_i2c_change_state(qup, QUP_PAUSE_STATE); in qup_i2c_conf_xfer_v2()
1417 disable_irq(qup->irq); in qup_i2c_conf_xfer_v2()
1426 static int qup_i2c_xfer_v2_msg(struct qup_i2c_dev *qup, int msg_id, bool is_rx) in qup_i2c_xfer_v2_msg() argument
1430 struct i2c_msg *msg = qup->msg; in qup_i2c_xfer_v2_msg()
1431 struct qup_i2c_block *blk = &qup->blk; in qup_i2c_xfer_v2_msg()
1434 qup->blk_xfer_limit = is_rx ? RECV_MAX_DATA_LEN : QUP_READ_LIMIT; in qup_i2c_xfer_v2_msg()
1435 qup_i2c_set_blk_data(qup, msg); in qup_i2c_xfer_v2_msg()
1438 data_len = qup_i2c_get_data_len(qup); in qup_i2c_xfer_v2_msg()
1443 qup_i2c_set_tags(blk->cur_tx_tags, qup, qup->msg); in qup_i2c_xfer_v2_msg()
1456 ret = qup_i2c_conf_xfer_v2(qup, is_rx, !msg_id && !i, in qup_i2c_xfer_v2_msg()
1457 !qup->is_last || i < blk->count - 1); in qup_i2c_xfer_v2_msg()
1463 !qup->is_smbus_read) { in qup_i2c_xfer_v2_msg()
1468 qup->is_smbus_read = true; in qup_i2c_xfer_v2_msg()
1469 ret = qup_i2c_xfer_v2_msg(qup, msg_id, true); in qup_i2c_xfer_v2_msg()
1470 qup->is_smbus_read = false; in qup_i2c_xfer_v2_msg()
1478 blk->data_len -= qup->blk_xfer_limit; in qup_i2c_xfer_v2_msg()
1501 qup_i2c_determine_mode_v2(struct qup_i2c_dev *qup, in qup_i2c_determine_mode_v2() argument
1523 if (!no_dma && qup->is_dma && in qup_i2c_determine_mode_v2()
1524 (total_len > qup->out_fifo_sz || total_len > qup->in_fifo_sz)) { in qup_i2c_determine_mode_v2()
1525 qup->use_dma = true; in qup_i2c_determine_mode_v2()
1527 qup->blk.is_tx_blk_mode = max_tx_len > qup->out_fifo_sz - in qup_i2c_determine_mode_v2()
1529 qup->blk.is_rx_blk_mode = max_rx_len > qup->in_fifo_sz - in qup_i2c_determine_mode_v2()
1540 struct qup_i2c_dev *qup = i2c_get_adapdata(adap); in qup_i2c_xfer_v2() local
1543 qup->bus_err = 0; in qup_i2c_xfer_v2()
1544 qup->qup_err = 0; in qup_i2c_xfer_v2()
1546 ret = pm_runtime_get_sync(qup->dev); in qup_i2c_xfer_v2()
1550 ret = qup_i2c_determine_mode_v2(qup, msgs, num); in qup_i2c_xfer_v2()
1554 writel(1, qup->base + QUP_SW_RESET); in qup_i2c_xfer_v2()
1555 ret = qup_i2c_poll_state(qup, QUP_RESET_STATE); in qup_i2c_xfer_v2()
1560 writel(I2C_MINI_CORE | I2C_N_VAL_V2, qup->base + QUP_CONFIG); in qup_i2c_xfer_v2()
1561 writel(QUP_V2_TAGS_EN, qup->base + QUP_I2C_MASTER_GEN); in qup_i2c_xfer_v2()
1563 if (qup_i2c_poll_state_i2c_master(qup)) { in qup_i2c_xfer_v2()
1568 if (qup->use_dma) { in qup_i2c_xfer_v2()
1569 reinit_completion(&qup->xfer); in qup_i2c_xfer_v2()
1571 qup->use_dma = false; in qup_i2c_xfer_v2()
1573 qup_i2c_conf_mode_v2(qup); in qup_i2c_xfer_v2()
1576 qup->msg = &msgs[idx]; in qup_i2c_xfer_v2()
1577 qup->is_last = idx == (num - 1); in qup_i2c_xfer_v2()
1579 ret = qup_i2c_xfer_v2_msg(qup, idx, in qup_i2c_xfer_v2()
1584 qup->msg = NULL; in qup_i2c_xfer_v2()
1588 ret = qup_i2c_bus_active(qup, ONE_BYTE); in qup_i2c_xfer_v2()
1591 qup_i2c_change_state(qup, QUP_RESET_STATE); in qup_i2c_xfer_v2()
1596 pm_runtime_mark_last_busy(qup->dev); in qup_i2c_xfer_v2()
1597 pm_runtime_put_autosuspend(qup->dev); in qup_i2c_xfer_v2()
1631 static void qup_i2c_enable_clocks(struct qup_i2c_dev *qup) in qup_i2c_enable_clocks() argument
1633 clk_prepare_enable(qup->clk); in qup_i2c_enable_clocks()
1634 clk_prepare_enable(qup->pclk); in qup_i2c_enable_clocks()
1637 static void qup_i2c_disable_clocks(struct qup_i2c_dev *qup) in qup_i2c_disable_clocks() argument
1641 qup_i2c_change_state(qup, QUP_RESET_STATE); in qup_i2c_disable_clocks()
1642 clk_disable_unprepare(qup->clk); in qup_i2c_disable_clocks()
1643 config = readl(qup->base + QUP_CONFIG); in qup_i2c_disable_clocks()
1645 writel(config, qup->base + QUP_CONFIG); in qup_i2c_disable_clocks()
1646 clk_disable_unprepare(qup->pclk); in qup_i2c_disable_clocks()
1658 struct qup_i2c_dev *qup; in qup_i2c_probe() local
1667 qup = devm_kzalloc(&pdev->dev, sizeof(*qup), GFP_KERNEL); in qup_i2c_probe()
1668 if (!qup) in qup_i2c_probe()
1671 qup->dev = &pdev->dev; in qup_i2c_probe()
1672 init_completion(&qup->xfer); in qup_i2c_probe()
1673 platform_set_drvdata(pdev, qup); in qup_i2c_probe()
1676 dev_notice(qup->dev, "Using override frequency of %u\n", scl_freq); in qup_i2c_probe()
1679 ret = device_property_read_u32(qup->dev, "clock-frequency", &clk_freq); in qup_i2c_probe()
1681 dev_notice(qup->dev, "using default clock-frequency %d", in qup_i2c_probe()
1687 qup->adap.algo = &qup_i2c_algo; in qup_i2c_probe()
1688 qup->adap.quirks = &qup_i2c_quirks; in qup_i2c_probe()
1691 qup->adap.algo = &qup_i2c_algo_v2; in qup_i2c_probe()
1692 qup->adap.quirks = &qup_i2c_quirks_v2; in qup_i2c_probe()
1694 if (acpi_match_device(qup_i2c_acpi_match, qup->dev)) in qup_i2c_probe()
1697 ret = qup_i2c_req_dma(qup); in qup_i2c_probe()
1704 qup->max_xfer_sg_len = (MX_BLOCKS << 1); in qup_i2c_probe()
1706 qup->btx.sg = devm_kcalloc(&pdev->dev, in qup_i2c_probe()
1707 blocks, sizeof(*qup->btx.sg), in qup_i2c_probe()
1709 if (!qup->btx.sg) { in qup_i2c_probe()
1713 sg_init_table(qup->btx.sg, blocks); in qup_i2c_probe()
1715 qup->brx.sg = devm_kcalloc(&pdev->dev, in qup_i2c_probe()
1716 blocks, sizeof(*qup->brx.sg), in qup_i2c_probe()
1718 if (!qup->brx.sg) { in qup_i2c_probe()
1722 sg_init_table(qup->brx.sg, blocks); in qup_i2c_probe()
1727 qup->start_tag.start = devm_kzalloc(&pdev->dev, in qup_i2c_probe()
1729 if (!qup->start_tag.start) { in qup_i2c_probe()
1734 qup->brx.tag.start = devm_kzalloc(&pdev->dev, 2, GFP_KERNEL); in qup_i2c_probe()
1735 if (!qup->brx.tag.start) { in qup_i2c_probe()
1740 qup->btx.tag.start = devm_kzalloc(&pdev->dev, 2, GFP_KERNEL); in qup_i2c_probe()
1741 if (!qup->btx.tag.start) { in qup_i2c_probe()
1745 qup->is_dma = true; in qup_i2c_probe()
1751 dev_err(qup->dev, "clock frequency not supported %d\n", in qup_i2c_probe()
1757 qup->base = devm_platform_ioremap_resource(pdev, 0); in qup_i2c_probe()
1758 if (IS_ERR(qup->base)) { in qup_i2c_probe()
1759 ret = PTR_ERR(qup->base); in qup_i2c_probe()
1763 qup->irq = platform_get_irq(pdev, 0); in qup_i2c_probe()
1764 if (qup->irq < 0) { in qup_i2c_probe()
1765 ret = qup->irq; in qup_i2c_probe()
1769 if (has_acpi_companion(qup->dev)) { in qup_i2c_probe()
1770 ret = device_property_read_u32(qup->dev, in qup_i2c_probe()
1773 dev_notice(qup->dev, "using default src-clock-hz %d", in qup_i2c_probe()
1776 ACPI_COMPANION_SET(&qup->adap.dev, ACPI_COMPANION(qup->dev)); in qup_i2c_probe()
1778 qup->clk = devm_clk_get(qup->dev, "core"); in qup_i2c_probe()
1779 if (IS_ERR(qup->clk)) { in qup_i2c_probe()
1780 dev_err(qup->dev, "Could not get core clock\n"); in qup_i2c_probe()
1781 ret = PTR_ERR(qup->clk); in qup_i2c_probe()
1785 qup->pclk = devm_clk_get(qup->dev, "iface"); in qup_i2c_probe()
1786 if (IS_ERR(qup->pclk)) { in qup_i2c_probe()
1787 dev_err(qup->dev, "Could not get iface clock\n"); in qup_i2c_probe()
1788 ret = PTR_ERR(qup->pclk); in qup_i2c_probe()
1791 qup_i2c_enable_clocks(qup); in qup_i2c_probe()
1792 src_clk_freq = clk_get_rate(qup->clk); in qup_i2c_probe()
1799 writel(1, qup->base + QUP_SW_RESET); in qup_i2c_probe()
1800 ret = qup_i2c_poll_state_valid(qup); in qup_i2c_probe()
1804 ret = devm_request_irq(qup->dev, qup->irq, qup_i2c_interrupt, in qup_i2c_probe()
1806 "i2c_qup", qup); in qup_i2c_probe()
1808 dev_err(qup->dev, "Request %d IRQ failed\n", qup->irq); in qup_i2c_probe()
1812 hw_ver = readl(qup->base + QUP_HW_VERSION); in qup_i2c_probe()
1813 dev_dbg(qup->dev, "Revision %x\n", hw_ver); in qup_i2c_probe()
1815 io_mode = readl(qup->base + QUP_IO_MODE); in qup_i2c_probe()
1826 qup->out_blk_sz = blk_sizes[size]; in qup_i2c_probe()
1833 qup->in_blk_sz = blk_sizes[size]; in qup_i2c_probe()
1841 qup->in_blk_sz /= 2; in qup_i2c_probe()
1842 qup->out_blk_sz /= 2; in qup_i2c_probe()
1843 qup->write_tx_fifo = qup_i2c_write_tx_fifo_v1; in qup_i2c_probe()
1844 qup->read_rx_fifo = qup_i2c_read_rx_fifo_v1; in qup_i2c_probe()
1845 qup->write_rx_tags = qup_i2c_write_rx_tags_v1; in qup_i2c_probe()
1847 qup->write_tx_fifo = qup_i2c_write_tx_fifo_v2; in qup_i2c_probe()
1848 qup->read_rx_fifo = qup_i2c_read_rx_fifo_v2; in qup_i2c_probe()
1849 qup->write_rx_tags = qup_i2c_write_rx_tags_v2; in qup_i2c_probe()
1853 qup->out_fifo_sz = qup->out_blk_sz * (2 << size); in qup_i2c_probe()
1856 qup->in_fifo_sz = qup->in_blk_sz * (2 << size); in qup_i2c_probe()
1861 qup->clk_ctl = (hs_div << 8) | (fs_div & 0xff); in qup_i2c_probe()
1865 qup->clk_ctl = ((fs_div / 2) << 16) | (hs_div << 8) | (fs_div & 0xff); in qup_i2c_probe()
1873 qup->one_byte_t = one_bit_t * 9; in qup_i2c_probe()
1874 qup->xfer_timeout = TOUT_MIN * HZ + in qup_i2c_probe()
1875 usecs_to_jiffies(MX_DMA_TX_RX_LEN * qup->one_byte_t); in qup_i2c_probe()
1877 dev_dbg(qup->dev, "IN:block:%d, fifo:%d, OUT:block:%d, fifo:%d\n", in qup_i2c_probe()
1878 qup->in_blk_sz, qup->in_fifo_sz, in qup_i2c_probe()
1879 qup->out_blk_sz, qup->out_fifo_sz); in qup_i2c_probe()
1881 i2c_set_adapdata(&qup->adap, qup); in qup_i2c_probe()
1882 qup->adap.dev.parent = qup->dev; in qup_i2c_probe()
1883 qup->adap.dev.of_node = pdev->dev.of_node; in qup_i2c_probe()
1884 qup->is_last = true; in qup_i2c_probe()
1886 strscpy(qup->adap.name, "QUP I2C adapter", sizeof(qup->adap.name)); in qup_i2c_probe()
1888 pm_runtime_set_autosuspend_delay(qup->dev, MSEC_PER_SEC); in qup_i2c_probe()
1889 pm_runtime_use_autosuspend(qup->dev); in qup_i2c_probe()
1890 pm_runtime_set_active(qup->dev); in qup_i2c_probe()
1891 pm_runtime_enable(qup->dev); in qup_i2c_probe()
1893 ret = i2c_add_adapter(&qup->adap); in qup_i2c_probe()
1900 pm_runtime_disable(qup->dev); in qup_i2c_probe()
1901 pm_runtime_set_suspended(qup->dev); in qup_i2c_probe()
1903 qup_i2c_disable_clocks(qup); in qup_i2c_probe()
1905 if (qup->btx.dma) in qup_i2c_probe()
1906 dma_release_channel(qup->btx.dma); in qup_i2c_probe()
1907 if (qup->brx.dma) in qup_i2c_probe()
1908 dma_release_channel(qup->brx.dma); in qup_i2c_probe()
1914 struct qup_i2c_dev *qup = platform_get_drvdata(pdev); in qup_i2c_remove() local
1916 if (qup->is_dma) { in qup_i2c_remove()
1917 dma_release_channel(qup->btx.dma); in qup_i2c_remove()
1918 dma_release_channel(qup->brx.dma); in qup_i2c_remove()
1921 disable_irq(qup->irq); in qup_i2c_remove()
1922 qup_i2c_disable_clocks(qup); in qup_i2c_remove()
1923 i2c_del_adapter(&qup->adap); in qup_i2c_remove()
1924 pm_runtime_disable(qup->dev); in qup_i2c_remove()
1925 pm_runtime_set_suspended(qup->dev); in qup_i2c_remove()
1930 struct qup_i2c_dev *qup = dev_get_drvdata(device); in qup_i2c_pm_suspend_runtime() local
1933 qup_i2c_disable_clocks(qup); in qup_i2c_pm_suspend_runtime()
1939 struct qup_i2c_dev *qup = dev_get_drvdata(device); in qup_i2c_pm_resume_runtime() local
1942 qup_i2c_enable_clocks(qup); in qup_i2c_pm_resume_runtime()