Lines Matching +full:i2c +full:- +full:lt +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0
3 * Nuvoton NPCM7xx I2C Controller driver
11 #include <linux/i2c.h>
29 * External I2C Interface driver xfer indication values, which indicate status
58 /* I2C Bank (module had 2 banks of registers) */
64 /* Internal I2C states values (for the I2C module state machine). */
92 /* init register and default value required to enable module */
125 #define NPCM_I2CTXF_CTL 0x12 /* Tx-FIFO Control */
128 #define NPCM_I2CTXF_STS 0x1A /* Tx-FIFO Status */
129 #define NPCM_I2CRXF_STS 0x1C /* Rx-FIFO Status */
130 #define NPCM_I2CRXF_CTL 0x1E /* Rx-FIFO Control */
172 #define NPCM_I2CCTL1_INTEN BIT(2) /* Interrupt enable */
175 #define NPCM_I2CCTL1_GCMEN BIT(5) /* Global call match enable */
176 #define NPCM_I2CCTL1_NMINTE BIT(6) /* New match interrupt enable */
177 #define NPCM_I2CCTL1_STASTRE BIT(7) /* Stall after start enable */
185 #define NPCM_I2CADDR_SAEN BIT(7) /* Slave address enable */
188 #define I2CCTL2_ENABLE BIT(0) /* Module enable */
193 #define I2CCTL3_ARPMEN BIT(2) /* ARP match enable */
290 /* Status of one I2C module */
342 u8 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
348 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_select_bank()
353 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_init_params()
354 bus->rd_size = 0; in npcm_i2c_init_params()
355 bus->wr_size = 0; in npcm_i2c_init_params()
356 bus->rd_ind = 0; in npcm_i2c_init_params()
357 bus->wr_ind = 0; in npcm_i2c_init_params()
358 bus->read_block_use = false; in npcm_i2c_init_params()
359 bus->int_time_stamp = 0; in npcm_i2c_init_params()
360 bus->PEC_use = false; in npcm_i2c_init_params()
361 bus->PEC_mask = 0; in npcm_i2c_init_params()
363 if (bus->slave) in npcm_i2c_init_params()
364 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_init_params()
370 iowrite8(data, bus->reg + NPCM_I2CSDA); in npcm_i2c_wr_byte()
375 return ioread8(bus->reg + NPCM_I2CSDA); in npcm_i2c_rd_byte()
382 return !!(I2CCTL3_SCL_LVL & ioread8(bus->reg + NPCM_I2CCTL3)); in npcm_i2c_get_SCL()
389 return !!(I2CCTL3_SDA_LVL & ioread8(bus->reg + NPCM_I2CCTL3)); in npcm_i2c_get_SDA()
394 if (bus->operation == I2C_READ_OPER) in npcm_i2c_get_index()
395 return bus->rd_ind; in npcm_i2c_get_index()
396 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_get_index()
397 return bus->wr_ind; in npcm_i2c_get_index()
404 return bus->wr_size == 0 && bus->rd_size == 0; in npcm_i2c_is_quick()
416 iowrite8(0, bus->reg + npcm_i2caddr[i]); in npcm_i2c_disable()
420 i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2); in npcm_i2c_disable()
422 iowrite8(i2cctl2, bus->reg + NPCM_I2CCTL2); in npcm_i2c_disable()
424 bus->state = I2C_DISABLE; in npcm_i2c_disable()
429 u8 i2cctl2 = ioread8(bus->reg + NPCM_I2CCTL2); in npcm_i2c_enable()
432 iowrite8(i2cctl2, bus->reg + NPCM_I2CCTL2); in npcm_i2c_enable()
433 bus->state = I2C_IDLE; in npcm_i2c_enable()
436 /* enable\disable end of busy (EOB) interrupts */
437 static inline void npcm_i2c_eob_int(struct npcm_i2c *bus, bool enable) in npcm_i2c_eob_int() argument
442 val = ioread8(bus->reg + NPCM_I2CCST3); in npcm_i2c_eob_int()
444 iowrite8(val, bus->reg + NPCM_I2CCST3); in npcm_i2c_eob_int()
446 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_eob_int()
448 if (enable) in npcm_i2c_eob_int()
452 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_eob_int()
459 tx_fifo_sts = ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_tx_fifo_empty()
461 if ((tx_fifo_sts & bus->data->txf_sts_tx_bytes) == 0) in npcm_i2c_tx_fifo_empty()
472 rx_fifo_sts = ioread8(bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_rx_fifo_full()
474 if ((rx_fifo_sts & bus->data->rxf_sts_rx_bytes) == 0) in npcm_i2c_rx_fifo_full()
485 val = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_clear_fifo_int()
487 iowrite8(val, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_clear_fifo_int()
494 val = ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_clear_tx_fifo()
496 iowrite8(val, bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_clear_tx_fifo()
503 val = ioread8(bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_clear_rx_fifo()
505 iowrite8(val, bus->reg + NPCM_I2CRXF_STS); in npcm_i2c_clear_rx_fifo()
508 static void npcm_i2c_int_enable(struct npcm_i2c *bus, bool enable) in npcm_i2c_int_enable() argument
512 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_int_enable()
514 if (enable) in npcm_i2c_int_enable()
518 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_int_enable()
525 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_start()
528 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_start()
536 * override HW issue: I2C may fail to supply stop condition in Master in npcm_i2c_master_stop()
541 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_stop()
544 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_master_stop()
546 if (!bus->fifo_use) in npcm_i2c_master_stop()
551 if (bus->operation == I2C_READ_OPER) in npcm_i2c_master_stop()
556 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_master_stop()
563 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_stall_after_start()
569 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_stall_after_start()
576 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_nack()
579 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_nack()
588 iowrite8(val, bus->reg + NPCM_I2CST); in npcm_i2c_clear_master_status()
592 static void npcm_i2c_slave_int_enable(struct npcm_i2c *bus, bool enable) in npcm_i2c_slave_int_enable() argument
596 /* enable interrupt on slave match: */ in npcm_i2c_slave_int_enable()
597 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_int_enable()
599 if (enable) in npcm_i2c_slave_int_enable()
603 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_int_enable()
607 u8 addr, bool enable) in npcm_i2c_slave_enable() argument
613 sa_reg = (addr & 0x7F) | FIELD_PREP(NPCM_I2CADDR_SAEN, enable); in npcm_i2c_slave_enable()
615 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_enable()
616 if (enable) in npcm_i2c_slave_enable()
620 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_slave_enable()
623 i2cctl3 = ioread8(bus->reg + NPCM_I2CCTL3); in npcm_i2c_slave_enable()
624 if (enable) in npcm_i2c_slave_enable()
628 iowrite8(i2cctl3, bus->reg + NPCM_I2CCTL3); in npcm_i2c_slave_enable()
632 dev_err(bus->dev, "try to enable more than 2 SA not supported\n"); in npcm_i2c_slave_enable()
635 return -EFAULT; in npcm_i2c_slave_enable()
637 /* Set and enable the address */ in npcm_i2c_slave_enable()
638 iowrite8(sa_reg, bus->reg + npcm_i2caddr[addr_type]); in npcm_i2c_slave_enable()
639 npcm_i2c_slave_int_enable(bus, enable); in npcm_i2c_slave_enable()
656 i2cctl1 = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_reset()
663 iowrite8(i2cctl1, bus->reg + NPCM_I2CCTL1); in npcm_i2c_reset()
666 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_reset()
667 iowrite8(0xFF, bus->reg + NPCM_I2CST); in npcm_i2c_reset()
673 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_reset()
676 if (bus->slave) { in npcm_i2c_reset()
677 addr = bus->slave->addr; in npcm_i2c_reset()
685 bus->state = I2C_IDLE; in npcm_i2c_reset()
690 return !!FIELD_GET(NPCM_I2CST_MASTER, ioread8(bus->reg + NPCM_I2CST)); in npcm_i2c_is_master()
700 msgs = bus->msgs; in npcm_i2c_callback()
701 msgs_num = bus->msgs_num; in npcm_i2c_callback()
703 * check that transaction was not timed-out, and msgs still in npcm_i2c_callback()
709 if (completion_done(&bus->cmd_complete)) in npcm_i2c_callback()
714 bus->cmd_err = bus->msgs_num; in npcm_i2c_callback()
715 if (bus->tx_complete_cnt < ULLONG_MAX) in npcm_i2c_callback()
716 bus->tx_complete_cnt++; in npcm_i2c_callback()
720 if (bus->msgs) { in npcm_i2c_callback()
731 bus->cmd_err = -ENXIO; in npcm_i2c_callback()
736 bus->cmd_err = -EAGAIN; in npcm_i2c_callback()
740 /* I2C wake up */ in npcm_i2c_callback()
746 bus->operation = I2C_NO_OPER; in npcm_i2c_callback()
748 if (bus->slave) in npcm_i2c_callback()
749 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_callback()
752 complete(&bus->cmd_complete); in npcm_i2c_callback()
757 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_fifo_usage()
758 return (bus->data->txf_sts_tx_bytes & in npcm_i2c_fifo_usage()
759 ioread8(bus->reg + NPCM_I2CTXF_STS)); in npcm_i2c_fifo_usage()
760 if (bus->operation == I2C_READ_OPER) in npcm_i2c_fifo_usage()
761 return (bus->data->rxf_sts_rx_bytes & in npcm_i2c_fifo_usage()
762 ioread8(bus->reg + NPCM_I2CRXF_STS)); in npcm_i2c_fifo_usage()
774 size_free_fifo = bus->data->fifo_size - npcm_i2c_fifo_usage(bus); in npcm_i2c_write_to_fifo_master()
775 while (max_bytes-- && size_free_fifo) { in npcm_i2c_write_to_fifo_master()
776 if (bus->wr_ind < bus->wr_size) in npcm_i2c_write_to_fifo_master()
777 npcm_i2c_wr_byte(bus, bus->wr_buf[bus->wr_ind++]); in npcm_i2c_write_to_fifo_master()
780 size_free_fifo = bus->data->fifo_size - npcm_i2c_fifo_usage(bus); in npcm_i2c_write_to_fifo_master()
786 * configure the FIFO before using it. If nread is -1 RX FIFO will not be
793 if (!bus->fifo_use) in npcm_i2c_set_fifo()
801 rxf_ctl = min_t(int, nread, bus->data->fifo_size); in npcm_i2c_set_fifo()
804 if (nread <= bus->data->fifo_size) in npcm_i2c_set_fifo()
805 rxf_ctl |= bus->data->rxf_ctl_last_pec; in npcm_i2c_set_fifo()
812 if (bus->rd_ind == 0 && bus->read_block_use) { in npcm_i2c_set_fifo()
818 iowrite8(rxf_ctl, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_set_fifo()
823 if (nwrite > bus->data->fifo_size) in npcm_i2c_set_fifo()
825 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_set_fifo()
827 iowrite8(nwrite, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_set_fifo()
837 while (bytes_in_fifo--) { in npcm_i2c_read_fifo()
839 if (bus->rd_ind < bus->rd_size) in npcm_i2c_read_fifo()
840 bus->rd_buf[bus->rd_ind++] = data; in npcm_i2c_read_fifo()
861 dev_err(bus->dev, "get slave: try to use more than 2 SA not supported\n"); in npcm_i2c_get_slave_addr()
863 slave_add = ioread8(bus->reg + npcm_i2caddr[(int)addr_type]); in npcm_i2c_get_slave_addr()
872 /* Set the enable bit */ in npcm_i2c_remove_slave_addr()
876 if (ioread8(bus->reg + npcm_i2caddr[i]) == slave_add) in npcm_i2c_remove_slave_addr()
877 iowrite8(0, bus->reg + npcm_i2caddr[i]); in npcm_i2c_remove_slave_addr()
891 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_write_fifo_slave()
892 while (max_bytes-- && bus->data->fifo_size != npcm_i2c_fifo_usage(bus)) { in npcm_i2c_write_fifo_slave()
893 if (bus->slv_wr_size <= 0) in npcm_i2c_write_fifo_slave()
895 bus->slv_wr_ind = bus->slv_wr_ind & (bus->data->fifo_size - 1); in npcm_i2c_write_fifo_slave()
896 npcm_i2c_wr_byte(bus, bus->slv_wr_buf[bus->slv_wr_ind]); in npcm_i2c_write_fifo_slave()
897 bus->slv_wr_ind++; in npcm_i2c_write_fifo_slave()
898 bus->slv_wr_ind = bus->slv_wr_ind & (bus->data->fifo_size - 1); in npcm_i2c_write_fifo_slave()
899 bus->slv_wr_size--; in npcm_i2c_write_fifo_slave()
907 if (!bus->slave) in npcm_i2c_read_fifo_slave()
910 while (bytes_in_fifo--) { in npcm_i2c_read_fifo_slave()
913 bus->slv_rd_ind = bus->slv_rd_ind & (bus->data->fifo_size - 1); in npcm_i2c_read_fifo_slave()
914 bus->slv_rd_buf[bus->slv_rd_ind] = data; in npcm_i2c_read_fifo_slave()
915 bus->slv_rd_ind++; in npcm_i2c_read_fifo_slave()
918 if (bus->slv_rd_ind == 1 && bus->read_block_use) in npcm_i2c_read_fifo_slave()
919 bus->slv_rd_size = data + bus->PEC_use + 1; in npcm_i2c_read_fifo_slave()
928 int ret = bus->slv_wr_ind; in npcm_i2c_slave_get_wr_buf()
931 for (i = 0; i < bus->data->fifo_size; i++) { in npcm_i2c_slave_get_wr_buf()
932 if (bus->slv_wr_size >= bus->data->fifo_size) in npcm_i2c_slave_get_wr_buf()
934 if (bus->state == I2C_SLAVE_MATCH) { in npcm_i2c_slave_get_wr_buf()
935 i2c_slave_event(bus->slave, I2C_SLAVE_READ_REQUESTED, &value); in npcm_i2c_slave_get_wr_buf()
936 bus->state = I2C_OPER_STARTED; in npcm_i2c_slave_get_wr_buf()
938 i2c_slave_event(bus->slave, I2C_SLAVE_READ_PROCESSED, &value); in npcm_i2c_slave_get_wr_buf()
940 ind = (bus->slv_wr_ind + bus->slv_wr_size) & (bus->data->fifo_size - 1); in npcm_i2c_slave_get_wr_buf()
941 bus->slv_wr_buf[ind] = value; in npcm_i2c_slave_get_wr_buf()
942 bus->slv_wr_size++; in npcm_i2c_slave_get_wr_buf()
944 return bus->data->fifo_size - ret; in npcm_i2c_slave_get_wr_buf()
951 for (i = 0; i < bus->slv_rd_ind; i++) in npcm_i2c_slave_send_rd_buf()
952 i2c_slave_event(bus->slave, I2C_SLAVE_WRITE_RECEIVED, in npcm_i2c_slave_send_rd_buf()
953 &bus->slv_rd_buf[i]); in npcm_i2c_slave_send_rd_buf()
958 if (bus->slv_rd_ind) { in npcm_i2c_slave_send_rd_buf()
959 bus->slv_wr_size = 0; in npcm_i2c_slave_send_rd_buf()
960 bus->slv_wr_ind = 0; in npcm_i2c_slave_send_rd_buf()
963 bus->slv_rd_ind = 0; in npcm_i2c_slave_send_rd_buf()
964 bus->slv_rd_size = bus->adap.quirks->max_read_len; in npcm_i2c_slave_send_rd_buf()
973 bus->state = I2C_OPER_STARTED; in npcm_i2c_slave_receive()
974 bus->operation = I2C_READ_OPER; in npcm_i2c_slave_receive()
975 bus->slv_rd_size = nread; in npcm_i2c_slave_receive()
976 bus->slv_rd_ind = 0; in npcm_i2c_slave_receive()
978 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_slave_receive()
979 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_slave_receive()
990 bus->operation = I2C_WRITE_OPER; in npcm_i2c_slave_xmit()
1003 * NACK on read will be once reached to bus->adap->quirks->max_read_len.
1012 left_in_fifo = bus->data->txf_sts_tx_bytes & in npcm_i2c_slave_wr_buf_sync()
1013 ioread8(bus->reg + NPCM_I2CTXF_STS); in npcm_i2c_slave_wr_buf_sync()
1016 if (left_in_fifo >= bus->data->fifo_size || in npcm_i2c_slave_wr_buf_sync()
1017 bus->slv_wr_size >= bus->data->fifo_size) in npcm_i2c_slave_wr_buf_sync()
1021 bus->slv_wr_ind = bus->slv_wr_ind - left_in_fifo; in npcm_i2c_slave_wr_buf_sync()
1022 bus->slv_wr_size = bus->slv_wr_size + left_in_fifo; in npcm_i2c_slave_wr_buf_sync()
1024 if (bus->slv_wr_ind < 0) in npcm_i2c_slave_wr_buf_sync()
1025 bus->slv_wr_ind += bus->data->fifo_size; in npcm_i2c_slave_wr_buf_sync()
1030 if (NPCM_I2CST_XMIT & ioread8(bus->reg + NPCM_I2CST)) { in npcm_i2c_slave_rd_wr()
1035 bus->operation = I2C_WRITE_OPER; in npcm_i2c_slave_rd_wr()
1036 npcm_i2c_slave_xmit(bus, bus->adap.quirks->max_write_len, in npcm_i2c_slave_rd_wr()
1037 bus->slv_wr_buf); in npcm_i2c_slave_rd_wr()
1045 bus->operation = I2C_READ_OPER; in npcm_i2c_slave_rd_wr()
1047 bus->stop_ind = I2C_SLAVE_RCV_IND; in npcm_i2c_slave_rd_wr()
1049 npcm_i2c_slave_receive(bus, bus->adap.quirks->max_read_len, in npcm_i2c_slave_rd_wr()
1050 bus->slv_rd_buf); in npcm_i2c_slave_rd_wr()
1058 u8 i2cst = ioread8(bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1062 bus->stop_ind = I2C_NACK_IND; in npcm_i2c_int_slave_handler()
1064 if (bus->fifo_use) in npcm_i2c_int_slave_handler()
1067 bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1070 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_int_slave_handler()
1071 bus->operation = I2C_NO_OPER; in npcm_i2c_int_slave_handler()
1072 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1078 iowrite8(NPCM_I2CST_NEGACK, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1089 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_int_slave_handler()
1092 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1094 bus->state = I2C_IDLE; in npcm_i2c_int_slave_handler()
1100 if (completion_done(&bus->cmd_complete) == false) { in npcm_i2c_int_slave_handler()
1101 bus->cmd_err = -EIO; in npcm_i2c_int_slave_handler()
1102 complete(&bus->cmd_complete); in npcm_i2c_int_slave_handler()
1104 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1105 iowrite8(NPCM_I2CST_BER, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1113 bus->stop_ind = I2C_SLAVE_DONE_IND; in npcm_i2c_int_slave_handler()
1115 if (bus->operation == I2C_READ_OPER) in npcm_i2c_int_slave_handler()
1122 bus->stop_ind = I2C_NO_STATUS_IND; in npcm_i2c_int_slave_handler()
1129 bus->operation = I2C_NO_OPER; in npcm_i2c_int_slave_handler()
1130 bus->own_slave_addr = 0xFF; in npcm_i2c_int_slave_handler()
1131 i2c_slave_event(bus->slave, I2C_SLAVE_STOP, 0); in npcm_i2c_int_slave_handler()
1132 iowrite8(NPCM_I2CST_SLVSTP, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1133 if (bus->fifo_use) { in npcm_i2c_int_slave_handler()
1139 bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1141 bus->state = I2C_IDLE; in npcm_i2c_int_slave_handler()
1145 /* restart condition occurred and Rx-FIFO was not empty */ in npcm_i2c_int_slave_handler()
1146 if (bus->fifo_use && FIELD_GET(NPCM_I2CFIF_CTS_SLVRSTR, in npcm_i2c_int_slave_handler()
1147 ioread8(bus->reg + NPCM_I2CFIF_CTS))) { in npcm_i2c_int_slave_handler()
1148 bus->stop_ind = I2C_SLAVE_RESTART_IND; in npcm_i2c_int_slave_handler()
1149 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_int_slave_handler()
1150 if (bus->operation == I2C_READ_OPER) in npcm_i2c_int_slave_handler()
1152 bus->operation = I2C_WRITE_OPER; in npcm_i2c_int_slave_handler()
1153 iowrite8(0, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_int_slave_handler()
1156 iowrite8(val, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_int_slave_handler()
1166 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_int_slave_handler()
1170 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_int_slave_handler()
1171 iowrite8(bus->data->fifo_size, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_int_slave_handler()
1173 bus->operation = I2C_WRITE_OPER; in npcm_i2c_int_slave_handler()
1175 i2c_slave_event(bus->slave, I2C_SLAVE_WRITE_REQUESTED, in npcm_i2c_int_slave_handler()
1177 bus->operation = I2C_READ_OPER; in npcm_i2c_int_slave_handler()
1179 if (bus->own_slave_addr == 0xFF) { in npcm_i2c_int_slave_handler()
1181 val = ioread8(bus->reg + NPCM_I2CCST); in npcm_i2c_int_slave_handler()
1188 i2ccst3 = ioread8(bus->reg + NPCM_I2CCST3); in npcm_i2c_int_slave_handler()
1189 i2ccst2 = ioread8(bus->reg + NPCM_I2CCST2); in npcm_i2c_int_slave_handler()
1192 * the i2c module can response to 10 own SA. in npcm_i2c_int_slave_handler()
1202 bus->own_slave_addr = addr; in npcm_i2c_int_slave_handler()
1203 if (bus->PEC_mask & BIT(info)) in npcm_i2c_int_slave_handler()
1204 bus->PEC_use = true; in npcm_i2c_int_slave_handler()
1206 bus->PEC_use = false; in npcm_i2c_int_slave_handler()
1209 bus->own_slave_addr = 0; in npcm_i2c_int_slave_handler()
1211 bus->own_slave_addr = 0x61; in npcm_i2c_int_slave_handler()
1220 * (regular write-read mode) in npcm_i2c_int_slave_handler()
1222 if ((bus->state == I2C_OPER_STARTED && in npcm_i2c_int_slave_handler()
1223 bus->operation == I2C_READ_OPER && in npcm_i2c_int_slave_handler()
1224 bus->stop_ind == I2C_SLAVE_XMIT_IND) || in npcm_i2c_int_slave_handler()
1225 bus->stop_ind == I2C_SLAVE_RCV_IND) { in npcm_i2c_int_slave_handler()
1227 bus->stop_ind = I2C_SLAVE_RESTART_IND; in npcm_i2c_int_slave_handler()
1232 bus->stop_ind = I2C_SLAVE_XMIT_IND; in npcm_i2c_int_slave_handler()
1234 bus->stop_ind = I2C_SLAVE_RCV_IND; in npcm_i2c_int_slave_handler()
1235 bus->state = I2C_SLAVE_MATCH; in npcm_i2c_int_slave_handler()
1237 iowrite8(NPCM_I2CST_NMATCH, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1241 /* Slave SDA status is set - tx or rx */ in npcm_i2c_int_slave_handler()
1243 (bus->fifo_use && in npcm_i2c_int_slave_handler()
1246 iowrite8(NPCM_I2CST_SDAST, bus->reg + NPCM_I2CST); in npcm_i2c_int_slave_handler()
1265 struct npcm_i2c *bus = i2c_get_adapdata(client->adapter); in npcm_i2c_reg_slave()
1267 bus->slave = client; in npcm_i2c_reg_slave()
1269 if (client->flags & I2C_CLIENT_TEN) in npcm_i2c_reg_slave()
1270 return -EAFNOSUPPORT; in npcm_i2c_reg_slave()
1272 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_reg_slave()
1275 bus->slv_rd_size = 0; in npcm_i2c_reg_slave()
1276 bus->slv_wr_size = 0; in npcm_i2c_reg_slave()
1277 bus->slv_rd_ind = 0; in npcm_i2c_reg_slave()
1278 bus->slv_wr_ind = 0; in npcm_i2c_reg_slave()
1279 if (client->flags & I2C_CLIENT_PEC) in npcm_i2c_reg_slave()
1280 bus->PEC_use = true; in npcm_i2c_reg_slave()
1282 dev_info(bus->dev, "i2c%d register slave SA=0x%x, PEC=%d\n", bus->num, in npcm_i2c_reg_slave()
1283 client->addr, bus->PEC_use); in npcm_i2c_reg_slave()
1285 npcm_i2c_slave_enable(bus, I2C_SLAVE_ADDR1, client->addr, true); in npcm_i2c_reg_slave()
1291 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_reg_slave()
1297 struct npcm_i2c *bus = client->adapter->algo_data; in npcm_i2c_unreg_slave()
1300 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1301 if (!bus->slave) { in npcm_i2c_unreg_slave()
1302 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1303 return -EINVAL; in npcm_i2c_unreg_slave()
1306 npcm_i2c_remove_slave_addr(bus, client->addr); in npcm_i2c_unreg_slave()
1307 bus->slave = NULL; in npcm_i2c_unreg_slave()
1308 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_unreg_slave()
1320 rcount = bus->rd_size - bus->rd_ind; in npcm_i2c_master_fifo_read()
1329 if (rcount < (2 * bus->data->fifo_size) && rcount > bus->data->fifo_size) in npcm_i2c_master_fifo_read()
1330 fifo_bytes = rcount - bus->data->fifo_size; in npcm_i2c_master_fifo_read()
1333 /* last bytes are about to be read - end of tx */ in npcm_i2c_master_fifo_read()
1334 bus->state = I2C_STOP_PENDING; in npcm_i2c_master_fifo_read()
1335 bus->stop_ind = ind; in npcm_i2c_master_fifo_read()
1342 rcount = bus->rd_size - bus->rd_ind; in npcm_i2c_master_fifo_read()
1343 npcm_i2c_set_fifo(bus, rcount, -1); in npcm_i2c_master_fifo_read()
1351 if (bus->fifo_use) in npcm_i2c_irq_master_handler_write()
1354 /* Master write operation - last byte handling */ in npcm_i2c_irq_master_handler_write()
1355 if (bus->wr_ind == bus->wr_size) { in npcm_i2c_irq_master_handler_write()
1356 if (bus->fifo_use && npcm_i2c_fifo_usage(bus) > 0) in npcm_i2c_irq_master_handler_write()
1366 if (bus->rd_size == 0) { in npcm_i2c_irq_master_handler_write()
1369 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_master_handler_write()
1370 bus->stop_ind = I2C_MASTER_DONE_IND; in npcm_i2c_irq_master_handler_write()
1376 /* last write-byte written on previous int - restart */ in npcm_i2c_irq_master_handler_write()
1377 npcm_i2c_set_fifo(bus, bus->rd_size, -1); in npcm_i2c_irq_master_handler_write()
1382 * Receiving one byte only - stall after successful in npcm_i2c_irq_master_handler_write()
1385 * unintentionally NACK the next multi-byte read. in npcm_i2c_irq_master_handler_write()
1387 if (bus->rd_size == 1) in npcm_i2c_irq_master_handler_write()
1391 bus->operation = I2C_READ_OPER; in npcm_i2c_irq_master_handler_write()
1393 npcm_i2c_wr_byte(bus, bus->dest_addr | 0x1); in npcm_i2c_irq_master_handler_write()
1397 if (!bus->fifo_use || bus->wr_size == 1) { in npcm_i2c_irq_master_handler_write()
1398 npcm_i2c_wr_byte(bus, bus->wr_buf[bus->wr_ind++]); in npcm_i2c_irq_master_handler_write()
1400 wcount = bus->wr_size - bus->wr_ind; in npcm_i2c_irq_master_handler_write()
1401 npcm_i2c_set_fifo(bus, -1, wcount); in npcm_i2c_irq_master_handler_write()
1414 block_extra_bytes_size = bus->read_block_use + bus->PEC_use; in npcm_i2c_irq_master_handler_read()
1420 if (bus->rd_ind == 0) { /* first byte handling: */ in npcm_i2c_irq_master_handler_read()
1421 if (bus->read_block_use) { in npcm_i2c_irq_master_handler_read()
1425 bus->rd_size = data + block_extra_bytes_size; in npcm_i2c_irq_master_handler_read()
1426 bus->rd_buf[bus->rd_ind++] = data; in npcm_i2c_irq_master_handler_read()
1429 if (bus->fifo_use) { in npcm_i2c_irq_master_handler_read()
1430 data = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_master_handler_read()
1432 iowrite8(data, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_master_handler_read()
1435 npcm_i2c_set_fifo(bus, bus->rd_size - 1, -1); in npcm_i2c_irq_master_handler_read()
1442 if (bus->rd_size == block_extra_bytes_size && in npcm_i2c_irq_master_handler_read()
1443 bus->read_block_use) { in npcm_i2c_irq_master_handler_read()
1444 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_master_handler_read()
1445 bus->stop_ind = I2C_BLOCK_BYTES_ERR_IND; in npcm_i2c_irq_master_handler_read()
1446 bus->cmd_err = -EIO; in npcm_i2c_irq_master_handler_read()
1458 iowrite8(NPCM_I2CST_NMATCH, bus->reg + NPCM_I2CST); in npcm_i2c_irq_handle_nmatch()
1460 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_irq_handle_nmatch()
1461 npcm_i2c_callback(bus, bus->stop_ind, npcm_i2c_get_index(bus)); in npcm_i2c_irq_handle_nmatch()
1469 if (bus->nack_cnt < ULLONG_MAX) in npcm_i2c_irq_handle_nack()
1470 bus->nack_cnt++; in npcm_i2c_irq_handle_nack()
1472 if (bus->fifo_use) { in npcm_i2c_irq_handle_nack()
1477 if (bus->operation == I2C_WRITE_OPER) in npcm_i2c_irq_handle_nack()
1478 bus->wr_ind -= npcm_i2c_fifo_usage(bus); in npcm_i2c_irq_handle_nack()
1481 iowrite8(NPCM_I2CFIF_CTS_CLR_FIFO, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_nack()
1485 bus->stop_ind = I2C_NACK_IND; in npcm_i2c_irq_handle_nack()
1500 readx_poll_timeout_atomic(ioread8, bus->reg + NPCM_I2CCST, val, in npcm_i2c_irq_handle_nack()
1505 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_nack()
1512 npcm_i2c_callback(bus, bus->stop_ind, bus->wr_ind); in npcm_i2c_irq_handle_nack()
1518 if (bus->ber_cnt < ULLONG_MAX) in npcm_i2c_irq_handle_ber()
1519 bus->ber_cnt++; in npcm_i2c_irq_handle_ber()
1520 bus->stop_ind = I2C_BUS_ERR_IND; in npcm_i2c_irq_handle_ber()
1527 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_irq_handle_ber()
1529 bus->cmd_err = -EAGAIN; in npcm_i2c_irq_handle_ber()
1530 npcm_i2c_callback(bus, bus->stop_ind, npcm_i2c_get_index(bus)); in npcm_i2c_irq_handle_ber()
1532 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_ber()
1539 bus->state = I2C_IDLE; in npcm_i2c_irq_handle_eob()
1540 npcm_i2c_callback(bus, bus->stop_ind, bus->rd_ind); in npcm_i2c_irq_handle_eob()
1547 bus->state = I2C_STOP_PENDING; in npcm_i2c_irq_handle_stall_after_start()
1548 bus->stop_ind = I2C_MASTER_DONE_IND; in npcm_i2c_irq_handle_stall_after_start()
1551 } else if ((bus->rd_size == 1) && !bus->read_block_use) { in npcm_i2c_irq_handle_stall_after_start()
1553 * Receiving one byte only - set NACK after ensuring in npcm_i2c_irq_handle_stall_after_start()
1559 /* Reset stall-after-address-byte */ in npcm_i2c_irq_handle_stall_after_start()
1563 iowrite8(NPCM_I2CST_STASTR, bus->reg + NPCM_I2CST); in npcm_i2c_irq_handle_stall_after_start()
1566 /* SDA status is set - TX or RX, master */
1574 if (bus->state == I2C_IDLE) { in npcm_i2c_irq_handle_sda()
1575 bus->stop_ind = I2C_WAKE_UP_IND; in npcm_i2c_irq_handle_sda()
1577 if (npcm_i2c_is_quick(bus) || bus->read_block_use) in npcm_i2c_irq_handle_sda()
1587 * Receiving one byte only - stall after successful completion in npcm_i2c_irq_handle_sda()
1590 * multi-byte read in npcm_i2c_irq_handle_sda()
1592 if (bus->wr_size == 0 && bus->rd_size == 1) in npcm_i2c_irq_handle_sda()
1595 /* Initiate I2C master tx */ in npcm_i2c_irq_handle_sda()
1600 fif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1605 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1607 /* re-enable */ in npcm_i2c_irq_handle_sda()
1609 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_irq_handle_sda()
1618 if (bus->wr_size) in npcm_i2c_irq_handle_sda()
1619 npcm_i2c_set_fifo(bus, -1, bus->wr_size); in npcm_i2c_irq_handle_sda()
1621 npcm_i2c_set_fifo(bus, bus->rd_size, -1); in npcm_i2c_irq_handle_sda()
1623 bus->state = I2C_OPER_STARTED; in npcm_i2c_irq_handle_sda()
1625 if (npcm_i2c_is_quick(bus) || bus->wr_size) in npcm_i2c_irq_handle_sda()
1626 npcm_i2c_wr_byte(bus, bus->dest_addr); in npcm_i2c_irq_handle_sda()
1628 npcm_i2c_wr_byte(bus, bus->dest_addr | BIT(0)); in npcm_i2c_irq_handle_sda()
1632 bus->operation = I2C_WRITE_OPER; in npcm_i2c_irq_handle_sda()
1635 bus->operation = I2C_READ_OPER; in npcm_i2c_irq_handle_sda()
1644 int ret = -EIO; in npcm_i2c_int_master_handler()
1646 i2cst = ioread8(bus->reg + NPCM_I2CST); in npcm_i2c_int_master_handler()
1666 ioread8(bus->reg + NPCM_I2CCTL1)) == 1) && in npcm_i2c_int_master_handler()
1668 ioread8(bus->reg + NPCM_I2CCST3)))) { in npcm_i2c_int_master_handler()
1679 /* SDA status is set - TX or RX, master */ in npcm_i2c_int_master_handler()
1681 (bus->fifo_use && in npcm_i2c_int_master_handler()
1696 int status = -ENOTRECOVERABLE; in npcm_i2c_recovery_tgclk()
1702 dev_dbg(bus->dev, "bus%d-0x%x recovery skipped, bus not stuck", in npcm_i2c_recovery_tgclk()
1703 bus->num, bus->dest_addr); in npcm_i2c_recovery_tgclk()
1711 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_recovery_tgclk()
1714 iowrite8(0, bus->reg + NPCM_I2CRXF_CTL); in npcm_i2c_recovery_tgclk()
1715 iowrite8(0, bus->reg + NPCM_I2CTXF_CTL); in npcm_i2c_recovery_tgclk()
1722 fif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_recovery_tgclk()
1725 iowrite8(fif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_recovery_tgclk()
1726 npcm_i2c_set_fifo(bus, -1, 0); in npcm_i2c_recovery_tgclk()
1731 iowrite8(NPCM_I2CCST_TGSCL, bus->reg + NPCM_I2CCST); in npcm_i2c_recovery_tgclk()
1738 } while (!done && iter--); in npcm_i2c_recovery_tgclk()
1740 /* If SDA line is released: send start-addr-stop, to re-sync. */ in npcm_i2c_recovery_tgclk()
1743 npcm_i2c_wr_byte(bus, bus->dest_addr); in npcm_i2c_recovery_tgclk()
1761 status = -ENOTRECOVERABLE; in npcm_i2c_recovery_tgclk()
1763 if (bus->rec_fail_cnt < ULLONG_MAX) in npcm_i2c_recovery_tgclk()
1764 bus->rec_fail_cnt++; in npcm_i2c_recovery_tgclk()
1766 if (bus->rec_succ_cnt < ULLONG_MAX) in npcm_i2c_recovery_tgclk()
1767 bus->rec_succ_cnt++; in npcm_i2c_recovery_tgclk()
1776 struct i2c_bus_recovery_info *rinfo = &bus->rinfo; in npcm_i2c_recovery_init()
1778 rinfo->recover_bus = npcm_i2c_recovery_tgclk; in npcm_i2c_recovery_init()
1781 * npcm i2c HW allows direct reading of SCL and SDA. in npcm_i2c_recovery_init()
1786 rinfo->get_scl = npcm_i2c_get_SCL; in npcm_i2c_recovery_init()
1787 rinfo->get_sda = npcm_i2c_get_SDA; in npcm_i2c_recovery_init()
1788 _adap->bus_recovery_info = rinfo; in npcm_i2c_recovery_init()
1798 * NPCM7XX i2c module timing parameters are dependent on module core clk (APB)
1800 * 100kHz bus requires tSCL = 4 * SCLFRQ * tCLK. LT and HT are symmetric.
1801 * 400kHz bus requires asymmetric HT and LT. A different equation is recommended
1816 src_clk_khz = bus->apb_clk / 1000; in npcm_i2c_init_clk()
1818 bus->bus_freq = bus_freq_hz; in npcm_i2c_init_clk()
1825 return -EDOM; in npcm_i2c_init_clk()
1842 return -EDOM; in npcm_i2c_init_clk()
1866 return -EDOM; in npcm_i2c_init_clk()
1875 * SDA hold time: (HLDT-7) * T(CLK) >= 120 in npcm_i2c_init_clk()
1887 return -EINVAL; in npcm_i2c_init_clk()
1894 return -EDOM; in npcm_i2c_init_clk()
1899 bus->reg + NPCM_I2CCTL2); in npcm_i2c_init_clk()
1903 bus->reg + NPCM_I2CCTL3); in npcm_i2c_init_clk()
1911 * k1 = 2 * SCLLT7-0 -> Low Time = k1 / 2 in npcm_i2c_init_clk()
1912 * k2 = 2 * SCLLT7-0 -> High Time = k2 / 2 in npcm_i2c_init_clk()
1914 iowrite8(k1 / 2, bus->reg + NPCM_I2CSCLLT); in npcm_i2c_init_clk()
1915 iowrite8(k2 / 2, bus->reg + NPCM_I2CSCLHT); in npcm_i2c_init_clk()
1917 iowrite8(dbnct, bus->reg + NPCM_I2CCTL5); in npcm_i2c_init_clk()
1920 iowrite8(hldt, bus->reg + NPCM_I2CCTL4); in npcm_i2c_init_clk()
1935 if ((bus->state != I2C_DISABLE && bus->state != I2C_IDLE) || in npcm_i2c_init_module()
1937 return -EINVAL; in npcm_i2c_init_module()
1943 if (FIELD_GET(I2C_VER_FIFO_EN, ioread8(bus->reg + I2C_VER))) { in npcm_i2c_init_module()
1944 bus->fifo_use = true; in npcm_i2c_init_module()
1946 val = ioread8(bus->reg + NPCM_I2CFIF_CTL); in npcm_i2c_init_module()
1948 iowrite8(val, bus->reg + NPCM_I2CFIF_CTL); in npcm_i2c_init_module()
1951 bus->fifo_use = false; in npcm_i2c_init_module()
1954 /* Configure I2C module clock frequency */ in npcm_i2c_init_module()
1957 dev_err(bus->dev, "npcm_i2c_init_clk failed\n"); in npcm_i2c_init_module()
1961 /* Enable module (before configuring CTL1) */ in npcm_i2c_init_module()
1963 bus->state = I2C_IDLE; in npcm_i2c_init_module()
1964 val = ioread8(bus->reg + NPCM_I2CCTL1); in npcm_i2c_init_module()
1966 iowrite8(val, bus->reg + NPCM_I2CCTL1); in npcm_i2c_init_module()
1971 if ((npcm_i2c_get_SDA(&bus->adap) == 0) || (npcm_i2c_get_SCL(&bus->adap) == 0)) { in npcm_i2c_init_module()
1972 dev_err(bus->dev, "I2C%d init fail: lines are low\n", bus->num); in npcm_i2c_init_module()
1973 dev_err(bus->dev, "SDA=%d SCL=%d\n", npcm_i2c_get_SDA(&bus->adap), in npcm_i2c_init_module()
1974 npcm_i2c_get_SCL(&bus->adap)); in npcm_i2c_init_module()
1975 return -ENXIO; in npcm_i2c_init_module()
1988 bus->state = I2C_DISABLE; in __npcm_i2c_init()
1989 bus->master_or_slave = I2C_SLAVE; in __npcm_i2c_init()
1990 bus->int_time_stamp = 0; in __npcm_i2c_init()
1992 bus->slave = NULL; in __npcm_i2c_init()
1995 ret = device_property_read_u32(&pdev->dev, "clock-frequency", in __npcm_i2c_init()
1998 dev_info(&pdev->dev, "Could not read clock-frequency property"); in __npcm_i2c_init()
2004 dev_err(&pdev->dev, "npcm_i2c_init_module failed\n"); in __npcm_i2c_init()
2016 bus->master_or_slave = I2C_MASTER; in npcm_i2c_bus_irq()
2018 if (bus->master_or_slave == I2C_MASTER) { in npcm_i2c_bus_irq()
2019 bus->int_time_stamp = jiffies; in npcm_i2c_bus_irq()
2024 if (bus->slave) { in npcm_i2c_bus_irq()
2025 bus->master_or_slave = I2C_SLAVE; in npcm_i2c_bus_irq()
2041 if (bus->state != I2C_IDLE) { in npcm_i2c_master_start_xmit()
2042 bus->cmd_err = -EBUSY; in npcm_i2c_master_start_xmit()
2045 bus->dest_addr = slave_addr << 1; in npcm_i2c_master_start_xmit()
2046 bus->wr_buf = write_data; in npcm_i2c_master_start_xmit()
2047 bus->wr_size = nwrite; in npcm_i2c_master_start_xmit()
2048 bus->wr_ind = 0; in npcm_i2c_master_start_xmit()
2049 bus->rd_buf = read_data; in npcm_i2c_master_start_xmit()
2050 bus->rd_size = nread; in npcm_i2c_master_start_xmit()
2051 bus->rd_ind = 0; in npcm_i2c_master_start_xmit()
2052 bus->PEC_use = 0; in npcm_i2c_master_start_xmit()
2054 /* for tx PEC is appended to buffer from i2c IF. PEC flag is ignored */ in npcm_i2c_master_start_xmit()
2056 bus->PEC_use = use_PEC; in npcm_i2c_master_start_xmit()
2058 bus->read_block_use = use_read_block; in npcm_i2c_master_start_xmit()
2060 bus->operation = I2C_READ_OPER; in npcm_i2c_master_start_xmit()
2062 bus->operation = I2C_WRITE_OPER; in npcm_i2c_master_start_xmit()
2063 if (bus->fifo_use) { in npcm_i2c_master_start_xmit()
2068 i2cfif_cts = ioread8(bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_master_start_xmit()
2071 iowrite8(i2cfif_cts, bus->reg + NPCM_I2CFIF_CTS); in npcm_i2c_master_start_xmit()
2074 bus->state = I2C_IDLE; in npcm_i2c_master_start_xmit()
2095 if (bus->state == I2C_DISABLE) { in npcm_i2c_master_xfer()
2096 dev_err(bus->dev, "I2C%d module is disabled", bus->num); in npcm_i2c_master_xfer()
2097 return -EINVAL; in npcm_i2c_master_xfer()
2101 slave_addr = msg0->addr; in npcm_i2c_master_xfer()
2102 if (msg0->flags & I2C_M_RD) { /* read */ in npcm_i2c_master_xfer()
2105 read_data = msg0->buf; in npcm_i2c_master_xfer()
2106 if (msg0->flags & I2C_M_RECV_LEN) { in npcm_i2c_master_xfer()
2109 if (msg0->flags & I2C_CLIENT_PEC) in npcm_i2c_master_xfer()
2112 nread = msg0->len; in npcm_i2c_master_xfer()
2115 nwrite = msg0->len; in npcm_i2c_master_xfer()
2116 write_data = msg0->buf; in npcm_i2c_master_xfer()
2121 read_data = msg1->buf; in npcm_i2c_master_xfer()
2122 if (msg1->flags & I2C_M_RECV_LEN) { in npcm_i2c_master_xfer()
2125 if (msg1->flags & I2C_CLIENT_PEC) in npcm_i2c_master_xfer()
2128 nread = msg1->len; in npcm_i2c_master_xfer()
2139 timeout_usec = (2 * 9 * USEC_PER_SEC / bus->bus_freq) * (2 + nread + nwrite); in npcm_i2c_master_xfer()
2140 timeout = max_t(unsigned long, bus->adap.timeout, usecs_to_jiffies(timeout_usec)); in npcm_i2c_master_xfer()
2142 dev_err(bus->dev, "i2c%d buffer too big\n", bus->num); in npcm_i2c_master_xfer()
2143 return -EINVAL; in npcm_i2c_master_xfer()
2153 spin_lock_irqsave(&bus->lock, flags); in npcm_i2c_master_xfer()
2154 bus_busy = ioread8(bus->reg + NPCM_I2CCST) & NPCM_I2CCST_BB; in npcm_i2c_master_xfer()
2156 if (!bus_busy && bus->slave) in npcm_i2c_master_xfer()
2157 iowrite8((bus->slave->addr & 0x7F), in npcm_i2c_master_xfer()
2158 bus->reg + NPCM_I2CADDR1); in npcm_i2c_master_xfer()
2160 spin_unlock_irqrestore(&bus->lock, flags); in npcm_i2c_master_xfer()
2165 iowrite8(NPCM_I2CCST_BB, bus->reg + NPCM_I2CCST); in npcm_i2c_master_xfer()
2168 return -EAGAIN; in npcm_i2c_master_xfer()
2172 bus->dest_addr = slave_addr; in npcm_i2c_master_xfer()
2173 bus->msgs = msgs; in npcm_i2c_master_xfer()
2174 bus->msgs_num = num; in npcm_i2c_master_xfer()
2175 bus->cmd_err = 0; in npcm_i2c_master_xfer()
2176 bus->read_block_use = read_block; in npcm_i2c_master_xfer()
2178 reinit_completion(&bus->cmd_complete); in npcm_i2c_master_xfer()
2185 time_left = wait_for_completion_timeout(&bus->cmd_complete, in npcm_i2c_master_xfer()
2189 if (bus->timeout_cnt < ULLONG_MAX) in npcm_i2c_master_xfer()
2190 bus->timeout_cnt++; in npcm_i2c_master_xfer()
2191 if (bus->master_or_slave == I2C_MASTER) { in npcm_i2c_master_xfer()
2193 bus->cmd_err = -EIO; in npcm_i2c_master_xfer()
2194 bus->state = I2C_IDLE; in npcm_i2c_master_xfer()
2200 if (bus->cmd_err == -EAGAIN) in npcm_i2c_master_xfer()
2201 bus->cmd_err = i2c_recover_bus(adap); in npcm_i2c_master_xfer()
2208 else if (bus->cmd_err && in npcm_i2c_master_xfer()
2209 (bus->data->rxf_ctl_last_pec & ioread8(bus->reg + NPCM_I2CRXF_CTL))) in npcm_i2c_master_xfer()
2218 if (bus->slave) in npcm_i2c_master_xfer()
2219 iowrite8((bus->slave->addr & 0x7F) | NPCM_I2CADDR_SAEN, in npcm_i2c_master_xfer()
2220 bus->reg + NPCM_I2CADDR1); in npcm_i2c_master_xfer()
2224 return bus->cmd_err; in npcm_i2c_master_xfer()
2254 debugfs_create_u64("ber_cnt", 0444, bus->adap.debugfs, &bus->ber_cnt); in npcm_i2c_init_debugfs()
2255 debugfs_create_u64("nack_cnt", 0444, bus->adap.debugfs, &bus->nack_cnt); in npcm_i2c_init_debugfs()
2256 debugfs_create_u64("rec_succ_cnt", 0444, bus->adap.debugfs, &bus->rec_succ_cnt); in npcm_i2c_init_debugfs()
2257 debugfs_create_u64("rec_fail_cnt", 0444, bus->adap.debugfs, &bus->rec_fail_cnt); in npcm_i2c_init_debugfs()
2258 debugfs_create_u64("timeout_cnt", 0444, bus->adap.debugfs, &bus->timeout_cnt); in npcm_i2c_init_debugfs()
2259 debugfs_create_u64("tx_complete_cnt", 0444, bus->adap.debugfs, &bus->tx_complete_cnt); in npcm_i2c_init_debugfs()
2264 struct device_node *np = pdev->dev.of_node; in npcm_i2c_probe_bus()
2266 struct device *dev = &pdev->dev; in npcm_i2c_probe_bus()
2273 bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL); in npcm_i2c_probe_bus()
2275 return -ENOMEM; in npcm_i2c_probe_bus()
2277 bus->dev = &pdev->dev; in npcm_i2c_probe_bus()
2279 bus->data = of_device_get_match_data(dev); in npcm_i2c_probe_bus()
2280 if (!bus->data) { in npcm_i2c_probe_bus()
2282 return -EINVAL; in npcm_i2c_probe_bus()
2285 bus->num = of_alias_get_id(pdev->dev.of_node, "i2c"); in npcm_i2c_probe_bus()
2287 i2c_clk = devm_clk_get(&pdev->dev, NULL); in npcm_i2c_probe_bus()
2290 bus->apb_clk = clk_get_rate(i2c_clk); in npcm_i2c_probe_bus()
2292 gcr_regmap = syscon_regmap_lookup_by_phandle(np, "nuvoton,sys-mgr"); in npcm_i2c_probe_bus()
2294 gcr_regmap = syscon_regmap_lookup_by_compatible("nuvoton,npcm750-gcr"); in npcm_i2c_probe_bus()
2298 regmap_write(gcr_regmap, NPCM_I2CSEGCTL, bus->data->segctl_init_val); in npcm_i2c_probe_bus()
2300 bus->reg = devm_platform_ioremap_resource(pdev, 0); in npcm_i2c_probe_bus()
2301 if (IS_ERR(bus->reg)) in npcm_i2c_probe_bus()
2302 return PTR_ERR(bus->reg); in npcm_i2c_probe_bus()
2304 spin_lock_init(&bus->lock); in npcm_i2c_probe_bus()
2305 init_completion(&bus->cmd_complete); in npcm_i2c_probe_bus()
2307 adap = &bus->adap; in npcm_i2c_probe_bus()
2308 adap->owner = THIS_MODULE; in npcm_i2c_probe_bus()
2309 adap->retries = 3; in npcm_i2c_probe_bus()
2310 adap->timeout = msecs_to_jiffies(35); in npcm_i2c_probe_bus()
2311 adap->algo = &npcm_i2c_algo; in npcm_i2c_probe_bus()
2312 adap->quirks = &npcm_i2c_quirks; in npcm_i2c_probe_bus()
2313 adap->algo_data = bus; in npcm_i2c_probe_bus()
2314 adap->dev.parent = &pdev->dev; in npcm_i2c_probe_bus()
2315 adap->dev.of_node = pdev->dev.of_node; in npcm_i2c_probe_bus()
2316 adap->nr = pdev->id; in npcm_i2c_probe_bus()
2322 ret = devm_request_irq(bus->dev, irq, npcm_i2c_bus_irq, 0, in npcm_i2c_probe_bus()
2323 dev_name(bus->dev), bus); in npcm_i2c_probe_bus()
2335 snprintf(bus->adap.name, sizeof(bus->adap.name), "npcm_i2c_%d", in npcm_i2c_probe_bus()
2336 bus->num); in npcm_i2c_probe_bus()
2337 ret = i2c_add_numbered_adapter(&bus->adap); in npcm_i2c_probe_bus()
2351 spin_lock_irqsave(&bus->lock, lock_flags); in npcm_i2c_remove_bus()
2353 spin_unlock_irqrestore(&bus->lock, lock_flags); in npcm_i2c_remove_bus()
2354 i2c_del_adapter(&bus->adap); in npcm_i2c_remove_bus()
2358 { .compatible = "nuvoton,npcm750-i2c", .data = &npxm7xx_i2c_data },
2359 { .compatible = "nuvoton,npcm845-i2c", .data = &npxm8xx_i2c_data },
2368 .name = "nuvoton-i2c",
2378 MODULE_DESCRIPTION("Nuvoton I2C Bus Driver");