Lines Matching +full:xlen +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
6 * Copyright (C) 2011-2012 Wolfram Sang, Pengutronix e.K.
8 * based on a (non-working) driver which was:
10 * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
25 #include <linux/dma-mapping.h>
27 #include <linux/dma/mxs-dma.h>
29 #define DRIVER_NAME "mxs-i2c"
69 #define MXS_I2C_DATA(i2c) ((i2c->dev_type == MXS_I2C_V1) ? 0x60 : 0xa0)
71 #define MXS_I2C_DEBUG0_CLR(i2c) ((i2c->dev_type == MXS_I2C_V1) ? 0x78 : 0xb8)
87 MXS_I2C_CTRL0_XFER_COUNT(1))
103 * struct mxs_i2c_dev - per device, private MXS-I2C data
134 int ret = stmp_reset_block(i2c->regs); in mxs_i2c_reset()
143 * For details, see i.MX233 [25.4.2 - 25.4.4] and i.MX28 [27.5.2 - 27.5.4]. in mxs_i2c_reset()
145 writel(i2c->timing0, i2c->regs + MXS_I2C_TIMING0); in mxs_i2c_reset()
146 writel(i2c->timing1, i2c->regs + MXS_I2C_TIMING1); in mxs_i2c_reset()
147 writel(i2c->timing2, i2c->regs + MXS_I2C_TIMING2); in mxs_i2c_reset()
149 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); in mxs_i2c_reset()
156 if (i2c->dma_read) { in mxs_i2c_dma_finish()
157 dma_unmap_sg(i2c->dev, &i2c->sg_io[0], 1, DMA_TO_DEVICE); in mxs_i2c_dma_finish()
158 dma_unmap_sg(i2c->dev, &i2c->sg_io[1], 1, DMA_FROM_DEVICE); in mxs_i2c_dma_finish()
160 dma_unmap_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE); in mxs_i2c_dma_finish()
168 complete(&i2c->cmd_complete); in mxs_i2c_dma_irq_callback()
178 i2c->addr_data = i2c_8bit_addr_from_msg(msg); in mxs_i2c_dma_setup_xfer()
180 if (msg->flags & I2C_M_RD) { in mxs_i2c_dma_setup_xfer()
181 i2c->dma_read = true; in mxs_i2c_dma_setup_xfer()
188 i2c->pio_data[0] = MXS_CMD_I2C_SELECT; in mxs_i2c_dma_setup_xfer()
189 desc = dmaengine_prep_slave_sg(i2c->dmach, in mxs_i2c_dma_setup_xfer()
190 (struct scatterlist *)&i2c->pio_data[0], in mxs_i2c_dma_setup_xfer()
191 1, DMA_TRANS_NONE, 0); in mxs_i2c_dma_setup_xfer()
193 dev_err(i2c->dev, in mxs_i2c_dma_setup_xfer()
199 sg_init_one(&i2c->sg_io[0], &i2c->addr_data, 1); in mxs_i2c_dma_setup_xfer()
200 dma_map_sg(i2c->dev, &i2c->sg_io[0], 1, DMA_TO_DEVICE); in mxs_i2c_dma_setup_xfer()
201 desc = dmaengine_prep_slave_sg(i2c->dmach, &i2c->sg_io[0], 1, in mxs_i2c_dma_setup_xfer()
206 dev_err(i2c->dev, in mxs_i2c_dma_setup_xfer()
216 i2c->pio_data[1] = flags | MXS_CMD_I2C_READ | in mxs_i2c_dma_setup_xfer()
217 MXS_I2C_CTRL0_XFER_COUNT(msg->len); in mxs_i2c_dma_setup_xfer()
218 desc = dmaengine_prep_slave_sg(i2c->dmach, in mxs_i2c_dma_setup_xfer()
219 (struct scatterlist *)&i2c->pio_data[1], in mxs_i2c_dma_setup_xfer()
220 1, DMA_TRANS_NONE, DMA_PREP_INTERRUPT); in mxs_i2c_dma_setup_xfer()
222 dev_err(i2c->dev, in mxs_i2c_dma_setup_xfer()
228 sg_init_one(&i2c->sg_io[1], buf, msg->len); in mxs_i2c_dma_setup_xfer()
229 dma_map_sg(i2c->dev, &i2c->sg_io[1], 1, DMA_FROM_DEVICE); in mxs_i2c_dma_setup_xfer()
230 desc = dmaengine_prep_slave_sg(i2c->dmach, &i2c->sg_io[1], 1, in mxs_i2c_dma_setup_xfer()
235 dev_err(i2c->dev, in mxs_i2c_dma_setup_xfer()
240 i2c->dma_read = false; in mxs_i2c_dma_setup_xfer()
247 i2c->pio_data[0] = flags | MXS_CMD_I2C_WRITE | in mxs_i2c_dma_setup_xfer()
248 MXS_I2C_CTRL0_XFER_COUNT(msg->len + 1); in mxs_i2c_dma_setup_xfer()
249 desc = dmaengine_prep_slave_sg(i2c->dmach, in mxs_i2c_dma_setup_xfer()
250 (struct scatterlist *)&i2c->pio_data[0], in mxs_i2c_dma_setup_xfer()
251 1, DMA_TRANS_NONE, 0); in mxs_i2c_dma_setup_xfer()
253 dev_err(i2c->dev, in mxs_i2c_dma_setup_xfer()
259 sg_init_table(i2c->sg_io, 2); in mxs_i2c_dma_setup_xfer()
260 sg_set_buf(&i2c->sg_io[0], &i2c->addr_data, 1); in mxs_i2c_dma_setup_xfer()
261 sg_set_buf(&i2c->sg_io[1], buf, msg->len); in mxs_i2c_dma_setup_xfer()
262 dma_map_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE); in mxs_i2c_dma_setup_xfer()
263 desc = dmaengine_prep_slave_sg(i2c->dmach, i2c->sg_io, 2, in mxs_i2c_dma_setup_xfer()
268 dev_err(i2c->dev, in mxs_i2c_dma_setup_xfer()
278 desc->callback = mxs_i2c_dma_irq_callback; in mxs_i2c_dma_setup_xfer()
279 desc->callback_param = i2c; in mxs_i2c_dma_setup_xfer()
283 dma_async_issue_pending(i2c->dmach); in mxs_i2c_dma_setup_xfer()
288 dma_unmap_sg(i2c->dev, &i2c->sg_io[1], 1, DMA_FROM_DEVICE); in mxs_i2c_dma_setup_xfer()
290 dma_unmap_sg(i2c->dev, &i2c->sg_io[0], 1, DMA_TO_DEVICE); in mxs_i2c_dma_setup_xfer()
292 dmaengine_terminate_sync(i2c->dmach); in mxs_i2c_dma_setup_xfer()
293 return -EINVAL; in mxs_i2c_dma_setup_xfer()
297 dma_unmap_sg(i2c->dev, i2c->sg_io, 2, DMA_TO_DEVICE); in mxs_i2c_dma_setup_xfer()
299 dmaengine_terminate_sync(i2c->dmach); in mxs_i2c_dma_setup_xfer()
300 return -EINVAL; in mxs_i2c_dma_setup_xfer()
307 while (readl(i2c->regs + MXS_I2C_CTRL0) & MXS_I2C_CTRL0_RUN) { in mxs_i2c_pio_wait_xfer_end()
308 if (readl(i2c->regs + MXS_I2C_CTRL1) & in mxs_i2c_pio_wait_xfer_end()
310 return -ENXIO; in mxs_i2c_pio_wait_xfer_end()
312 return -ETIMEDOUT; in mxs_i2c_pio_wait_xfer_end()
323 state = readl(i2c->regs + MXS_I2C_CTRL1_CLR) & MXS_I2C_IRQ_MASK; in mxs_i2c_pio_check_error_state()
326 i2c->cmd_err = -ENXIO; in mxs_i2c_pio_check_error_state()
331 i2c->cmd_err = -EIO; in mxs_i2c_pio_check_error_state()
333 return i2c->cmd_err; in mxs_i2c_pio_check_error_state()
340 writel(cmd, i2c->regs + MXS_I2C_CTRL0); in mxs_i2c_pio_trigger_cmd()
343 reg = readl(i2c->regs + MXS_I2C_CTRL0); in mxs_i2c_pio_trigger_cmd()
345 writel(reg, i2c->regs + MXS_I2C_CTRL0); in mxs_i2c_pio_trigger_cmd()
359 writel(cmd, i2c->regs + MXS_I2C_CTRL0); in mxs_i2c_pio_trigger_write_cmd()
361 if (i2c->dev_type == MXS_I2C_V1) in mxs_i2c_pio_trigger_write_cmd()
362 writel(MXS_I2C_CTRL0_PIO_MODE, i2c->regs + MXS_I2C_CTRL0_SET); in mxs_i2c_pio_trigger_write_cmd()
364 writel(data, i2c->regs + MXS_I2C_DATA(i2c)); in mxs_i2c_pio_trigger_write_cmd()
365 writel(MXS_I2C_CTRL0_RUN, i2c->regs + MXS_I2C_CTRL0_SET); in mxs_i2c_pio_trigger_write_cmd()
374 int i, ret, xlen = 0, xmit = 0; in mxs_i2c_pio_setup_xfer() local
378 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_CLR); in mxs_i2c_pio_setup_xfer()
382 * - Enable CTRL0::PIO_MODE (1 << 24) in mxs_i2c_pio_setup_xfer()
383 * - Enable CTRL1::ACK_MODE (1 << 27) in mxs_i2c_pio_setup_xfer()
397 if (msg->flags & I2C_M_RD) { in mxs_i2c_pio_setup_xfer()
410 BUG_ON(msg->len > 4); in mxs_i2c_pio_setup_xfer()
418 dev_dbg(i2c->dev, in mxs_i2c_pio_setup_xfer()
426 MXS_I2C_CTRL0_XFER_COUNT(msg->len)); in mxs_i2c_pio_setup_xfer()
430 dev_dbg(i2c->dev, in mxs_i2c_pio_setup_xfer()
435 data = readl(i2c->regs + MXS_I2C_DATA(i2c)); in mxs_i2c_pio_setup_xfer()
436 for (i = 0; i < msg->len; i++) { in mxs_i2c_pio_setup_xfer()
437 msg->buf[i] = data & 0xff; in mxs_i2c_pio_setup_xfer()
462 if (msg->len > 3) in mxs_i2c_pio_setup_xfer()
465 for (i = 0; i < msg->len; i++) { in mxs_i2c_pio_setup_xfer()
467 data |= (msg->buf[i] << 24); in mxs_i2c_pio_setup_xfer()
472 if (i + 1 == msg->len) { in mxs_i2c_pio_setup_xfer()
477 xmit = 1; in mxs_i2c_pio_setup_xfer()
482 xmit = 1; in mxs_i2c_pio_setup_xfer()
492 * i = (4k + 0) .... xlen = 2 in mxs_i2c_pio_setup_xfer()
493 * i = (4k + 1) .... xlen = 3 in mxs_i2c_pio_setup_xfer()
494 * i = (4k + 2) .... xlen = 4 in mxs_i2c_pio_setup_xfer()
495 * i = (4k + 3) .... xlen = 1 in mxs_i2c_pio_setup_xfer()
499 xlen = 1; in mxs_i2c_pio_setup_xfer()
501 xlen = (i % 4) + 2; in mxs_i2c_pio_setup_xfer()
503 data >>= (4 - xlen) * 8; in mxs_i2c_pio_setup_xfer()
505 dev_dbg(i2c->dev, in mxs_i2c_pio_setup_xfer()
507 xlen, i, msg->len, in mxs_i2c_pio_setup_xfer()
513 i2c->regs + MXS_I2C_DEBUG0_CLR(i2c)); in mxs_i2c_pio_setup_xfer()
518 MXS_I2C_CTRL0_XFER_COUNT(xlen), data); in mxs_i2c_pio_setup_xfer()
526 dev_dbg(i2c->dev, in mxs_i2c_pio_setup_xfer()
532 ret = readl(i2c->regs + MXS_I2C_STAT) & in mxs_i2c_pio_setup_xfer()
535 ret = -ENXIO; in mxs_i2c_pio_setup_xfer()
545 /* Clear any dangling IRQs and re-enable interrupts. */ in mxs_i2c_pio_setup_xfer()
546 writel(MXS_I2C_IRQ_MASK, i2c->regs + MXS_I2C_CTRL1_CLR); in mxs_i2c_pio_setup_xfer()
547 writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); in mxs_i2c_pio_setup_xfer()
550 if (i2c->dev_type == MXS_I2C_V1) in mxs_i2c_pio_setup_xfer()
551 writel(MXS_I2C_CTRL0_PIO_MODE, i2c->regs + MXS_I2C_CTRL0_CLR); in mxs_i2c_pio_setup_xfer()
571 dev_dbg(i2c->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n", in mxs_i2c_xfer_msg()
572 msg->addr, msg->len, msg->flags, stop); in mxs_i2c_xfer_msg()
579 if ((msg->flags & I2C_M_RD) && (msg->len <= 4)) in mxs_i2c_xfer_msg()
580 use_pio = 1; in mxs_i2c_xfer_msg()
581 if (!(msg->flags & I2C_M_RD) && (msg->len < 7)) in mxs_i2c_xfer_msg()
582 use_pio = 1; in mxs_i2c_xfer_msg()
584 i2c->cmd_err = 0; in mxs_i2c_xfer_msg()
588 if (ret && (ret != -ENXIO)) in mxs_i2c_xfer_msg()
591 dma_buf = i2c_get_dma_safe_msg_buf(msg, 1); in mxs_i2c_xfer_msg()
593 return -ENOMEM; in mxs_i2c_xfer_msg()
595 reinit_completion(&i2c->cmd_complete); in mxs_i2c_xfer_msg()
602 time_left = wait_for_completion_timeout(&i2c->cmd_complete, in mxs_i2c_xfer_msg()
608 ret = i2c->cmd_err; in mxs_i2c_xfer_msg()
611 if (ret == -ENXIO) { in mxs_i2c_xfer_msg()
617 i2c->regs + MXS_I2C_CTRL1_SET); in mxs_i2c_xfer_msg()
631 if (i2c->dev_type == MXS_I2C_V1) in mxs_i2c_xfer_msg()
634 dev_dbg(i2c->dev, "Done with err=%d\n", ret); in mxs_i2c_xfer_msg()
639 dev_dbg(i2c->dev, "Timeout!\n"); in mxs_i2c_xfer_msg()
645 return -ETIMEDOUT; in mxs_i2c_xfer_msg()
655 err = mxs_i2c_xfer_msg(adap, &msgs[i], i == (num - 1)); in mxs_i2c_xfer()
671 u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK; in mxs_i2c_isr()
677 i2c->cmd_err = -ENXIO; in mxs_i2c_isr()
682 i2c->cmd_err = -EIO; in mxs_i2c_isr()
684 writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR); in mxs_i2c_isr()
705 struct device *dev = i2c->dev; in mxs_i2c_derive_timing()
712 * is >= 1 in mxs_i2c_derive_timing()
766 low_count -= 2; in mxs_i2c_derive_timing()
767 high_count -= 7; in mxs_i2c_derive_timing()
768 i2c->timing0 = (high_count << 16) | rcv_count; in mxs_i2c_derive_timing()
769 i2c->timing1 = (low_count << 16) | xmit_count; in mxs_i2c_derive_timing()
770 i2c->timing2 = (bus_free << 16 | leadin); in mxs_i2c_derive_timing()
776 struct device *dev = i2c->dev; in mxs_i2c_get_ofdata()
777 struct device_node *node = dev->of_node; in mxs_i2c_get_ofdata()
780 ret = of_property_read_u32(node, "clock-frequency", &speed); in mxs_i2c_get_ofdata()
792 { .compatible = "fsl,imx23-i2c", .data = (void *)MXS_I2C_V1, },
793 { .compatible = "fsl,imx28-i2c", .data = (void *)MXS_I2C_V2, },
800 struct device *dev = &pdev->dev; in mxs_i2c_probe()
807 return -ENOMEM; in mxs_i2c_probe()
809 i2c->dev_type = (uintptr_t)of_device_get_match_data(&pdev->dev); in mxs_i2c_probe()
811 i2c->regs = devm_platform_ioremap_resource(pdev, 0); in mxs_i2c_probe()
812 if (IS_ERR(i2c->regs)) in mxs_i2c_probe()
813 return PTR_ERR(i2c->regs); in mxs_i2c_probe()
823 i2c->dev = dev; in mxs_i2c_probe()
825 init_completion(&i2c->cmd_complete); in mxs_i2c_probe()
827 if (dev->of_node) { in mxs_i2c_probe()
834 i2c->dmach = dma_request_chan(dev, "rx-tx"); in mxs_i2c_probe()
835 if (IS_ERR(i2c->dmach)) { in mxs_i2c_probe()
836 return dev_err_probe(dev, PTR_ERR(i2c->dmach), in mxs_i2c_probe()
847 adap = &i2c->adapter; in mxs_i2c_probe()
848 strscpy(adap->name, "MXS I2C adapter", sizeof(adap->name)); in mxs_i2c_probe()
849 adap->owner = THIS_MODULE; in mxs_i2c_probe()
850 adap->algo = &mxs_i2c_algo; in mxs_i2c_probe()
851 adap->quirks = &mxs_i2c_quirks; in mxs_i2c_probe()
852 adap->dev.parent = dev; in mxs_i2c_probe()
853 adap->nr = pdev->id; in mxs_i2c_probe()
854 adap->dev.of_node = pdev->dev.of_node; in mxs_i2c_probe()
859 i2c->regs + MXS_I2C_CTRL0_SET); in mxs_i2c_probe()
870 i2c_del_adapter(&i2c->adapter); in mxs_i2c_remove()
872 if (i2c->dmach) in mxs_i2c_remove()
873 dma_release_channel(i2c->dmach); in mxs_i2c_remove()
875 writel(MXS_I2C_CTRL0_SFTRST, i2c->regs + MXS_I2C_CTRL0_SET); in mxs_i2c_remove()