Lines Matching +full:mv78230 +full:- +full:a0 +full:- +full:i2c
2 * Driver for the i2c controller on the Marvell line of host bridges
16 #include <linux/i2c.h>
60 /* Register defines (I2C bridge) */
181 drv_data->cntl_bits = MV64XXX_I2C_REG_CONTROL_ACK | in mv64xxx_i2c_prepare_for_io()
184 if (!drv_data->atomic) in mv64xxx_i2c_prepare_for_io()
185 drv_data->cntl_bits |= MV64XXX_I2C_REG_CONTROL_INTEN; in mv64xxx_i2c_prepare_for_io()
187 if (msg->flags & I2C_M_RD) in mv64xxx_i2c_prepare_for_io()
190 if (msg->flags & I2C_M_TEN) { in mv64xxx_i2c_prepare_for_io()
191 drv_data->addr1 = 0xf0 | (((u32)msg->addr & 0x300) >> 7) | dir; in mv64xxx_i2c_prepare_for_io()
192 drv_data->addr2 = (u32)msg->addr & 0xff; in mv64xxx_i2c_prepare_for_io()
194 drv_data->addr1 = MV64XXX_I2C_ADDR_ADDR((u32)msg->addr) | dir; in mv64xxx_i2c_prepare_for_io()
195 drv_data->addr2 = 0; in mv64xxx_i2c_prepare_for_io()
211 if (drv_data->offload_enabled) { in mv64xxx_i2c_hw_init()
212 writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL); in mv64xxx_i2c_hw_init()
213 writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_TIMING); in mv64xxx_i2c_hw_init()
214 writel(0, drv_data->reg_base + in mv64xxx_i2c_hw_init()
216 writel(0, drv_data->reg_base + in mv64xxx_i2c_hw_init()
220 writel(0, drv_data->reg_base + drv_data->reg_offsets.soft_reset); in mv64xxx_i2c_hw_init()
221 writel(MV64XXX_I2C_BAUD_DIV_M(drv_data->freq_m) | MV64XXX_I2C_BAUD_DIV_N(drv_data->freq_n), in mv64xxx_i2c_hw_init()
222 drv_data->reg_base + drv_data->reg_offsets.clock); in mv64xxx_i2c_hw_init()
223 writel(0, drv_data->reg_base + drv_data->reg_offsets.addr); in mv64xxx_i2c_hw_init()
224 writel(0, drv_data->reg_base + drv_data->reg_offsets.ext_addr); in mv64xxx_i2c_hw_init()
226 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_hw_init()
228 if (drv_data->errata_delay) in mv64xxx_i2c_hw_init()
231 drv_data->state = MV64XXX_I2C_STATE_IDLE; in mv64xxx_i2c_hw_init()
242 if (drv_data->state == MV64XXX_I2C_STATE_IDLE) { in mv64xxx_i2c_fsm()
243 drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP; in mv64xxx_i2c_fsm()
252 drv_data->action = MV64XXX_I2C_ACTION_SEND_ADDR_1; in mv64xxx_i2c_fsm()
253 drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_ADDR_1_ACK; in mv64xxx_i2c_fsm()
258 if (drv_data->msg->flags & I2C_M_TEN) { in mv64xxx_i2c_fsm()
259 drv_data->action = MV64XXX_I2C_ACTION_SEND_ADDR_2; in mv64xxx_i2c_fsm()
260 drv_data->state = in mv64xxx_i2c_fsm()
267 if ((drv_data->bytes_left == 0) in mv64xxx_i2c_fsm()
268 || (drv_data->aborting in mv64xxx_i2c_fsm()
269 && (drv_data->byte_posn != 0))) { in mv64xxx_i2c_fsm()
270 if (drv_data->send_stop || drv_data->aborting) { in mv64xxx_i2c_fsm()
271 drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP; in mv64xxx_i2c_fsm()
272 drv_data->state = MV64XXX_I2C_STATE_IDLE; in mv64xxx_i2c_fsm()
274 drv_data->action = in mv64xxx_i2c_fsm()
276 drv_data->state = in mv64xxx_i2c_fsm()
280 drv_data->action = MV64XXX_I2C_ACTION_SEND_DATA; in mv64xxx_i2c_fsm()
281 drv_data->state = in mv64xxx_i2c_fsm()
283 drv_data->bytes_left--; in mv64xxx_i2c_fsm()
289 if (drv_data->msg->flags & I2C_M_TEN) { in mv64xxx_i2c_fsm()
290 drv_data->action = MV64XXX_I2C_ACTION_SEND_ADDR_2; in mv64xxx_i2c_fsm()
291 drv_data->state = in mv64xxx_i2c_fsm()
297 if (drv_data->bytes_left == 0) { in mv64xxx_i2c_fsm()
298 drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP; in mv64xxx_i2c_fsm()
299 drv_data->state = MV64XXX_I2C_STATE_IDLE; in mv64xxx_i2c_fsm()
305 drv_data->action = MV64XXX_I2C_ACTION_CONTINUE; in mv64xxx_i2c_fsm()
307 drv_data->action = MV64XXX_I2C_ACTION_RCV_DATA; in mv64xxx_i2c_fsm()
308 drv_data->bytes_left--; in mv64xxx_i2c_fsm()
310 drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_TARGET_DATA; in mv64xxx_i2c_fsm()
312 if ((drv_data->bytes_left == 1) || drv_data->aborting) in mv64xxx_i2c_fsm()
313 drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_ACK; in mv64xxx_i2c_fsm()
317 drv_data->action = MV64XXX_I2C_ACTION_RCV_DATA_STOP; in mv64xxx_i2c_fsm()
318 drv_data->state = MV64XXX_I2C_STATE_IDLE; in mv64xxx_i2c_fsm()
325 drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP; in mv64xxx_i2c_fsm()
326 drv_data->state = MV64XXX_I2C_STATE_IDLE; in mv64xxx_i2c_fsm()
327 drv_data->rc = -ENXIO; in mv64xxx_i2c_fsm()
331 dev_err(&drv_data->adapter.dev, in mv64xxx_i2c_fsm()
332 "mv64xxx_i2c_fsm: Ctlr Error -- state: 0x%x, " in mv64xxx_i2c_fsm()
334 drv_data->state, status, drv_data->msg->addr, in mv64xxx_i2c_fsm()
335 drv_data->msg->flags); in mv64xxx_i2c_fsm()
336 drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP; in mv64xxx_i2c_fsm()
338 i2c_recover_bus(&drv_data->adapter); in mv64xxx_i2c_fsm()
339 drv_data->rc = -EAGAIN; in mv64xxx_i2c_fsm()
345 drv_data->msg = drv_data->msgs; in mv64xxx_i2c_send_start()
346 drv_data->byte_posn = 0; in mv64xxx_i2c_send_start()
347 drv_data->bytes_left = drv_data->msg->len; in mv64xxx_i2c_send_start()
348 drv_data->aborting = 0; in mv64xxx_i2c_send_start()
349 drv_data->rc = 0; in mv64xxx_i2c_send_start()
351 mv64xxx_i2c_prepare_for_io(drv_data, drv_data->msgs); in mv64xxx_i2c_send_start()
352 writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_START, in mv64xxx_i2c_send_start()
353 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_send_start()
359 switch(drv_data->action) { in mv64xxx_i2c_do_action()
362 BUG_ON(drv_data->num_msgs == 0); in mv64xxx_i2c_do_action()
364 drv_data->msgs++; in mv64xxx_i2c_do_action()
365 drv_data->num_msgs--; in mv64xxx_i2c_do_action()
368 if (drv_data->errata_delay) in mv64xxx_i2c_do_action()
376 drv_data->send_stop = drv_data->num_msgs == 1; in mv64xxx_i2c_do_action()
380 writel(drv_data->cntl_bits, in mv64xxx_i2c_do_action()
381 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
385 writel(drv_data->addr1, in mv64xxx_i2c_do_action()
386 drv_data->reg_base + drv_data->reg_offsets.data); in mv64xxx_i2c_do_action()
387 writel(drv_data->cntl_bits, in mv64xxx_i2c_do_action()
388 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
392 writel(drv_data->addr2, in mv64xxx_i2c_do_action()
393 drv_data->reg_base + drv_data->reg_offsets.data); in mv64xxx_i2c_do_action()
394 writel(drv_data->cntl_bits, in mv64xxx_i2c_do_action()
395 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
399 writel(drv_data->msg->buf[drv_data->byte_posn++], in mv64xxx_i2c_do_action()
400 drv_data->reg_base + drv_data->reg_offsets.data); in mv64xxx_i2c_do_action()
401 writel(drv_data->cntl_bits, in mv64xxx_i2c_do_action()
402 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
406 drv_data->msg->buf[drv_data->byte_posn++] = in mv64xxx_i2c_do_action()
407 readl(drv_data->reg_base + drv_data->reg_offsets.data); in mv64xxx_i2c_do_action()
408 writel(drv_data->cntl_bits, in mv64xxx_i2c_do_action()
409 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
413 drv_data->msg->buf[drv_data->byte_posn++] = in mv64xxx_i2c_do_action()
414 readl(drv_data->reg_base + drv_data->reg_offsets.data); in mv64xxx_i2c_do_action()
415 if (!drv_data->atomic) in mv64xxx_i2c_do_action()
416 drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN; in mv64xxx_i2c_do_action()
417 writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP, in mv64xxx_i2c_do_action()
418 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
419 drv_data->block = 0; in mv64xxx_i2c_do_action()
420 if (drv_data->errata_delay) in mv64xxx_i2c_do_action()
423 wake_up(&drv_data->waitq); in mv64xxx_i2c_do_action()
428 dev_err(&drv_data->adapter.dev, in mv64xxx_i2c_do_action()
430 drv_data->action); in mv64xxx_i2c_do_action()
431 drv_data->rc = -EIO; in mv64xxx_i2c_do_action()
434 if (!drv_data->atomic) in mv64xxx_i2c_do_action()
435 drv_data->cntl_bits &= ~MV64XXX_I2C_REG_CONTROL_INTEN; in mv64xxx_i2c_do_action()
436 writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_STOP, in mv64xxx_i2c_do_action()
437 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_do_action()
438 drv_data->block = 0; in mv64xxx_i2c_do_action()
439 wake_up(&drv_data->waitq); in mv64xxx_i2c_do_action()
450 buf[0] = readl(drv_data->reg_base + MV64XXX_I2C_REG_RX_DATA_LO); in mv64xxx_i2c_read_offload_rx_data()
451 buf[1] = readl(drv_data->reg_base + MV64XXX_I2C_REG_RX_DATA_HI); in mv64xxx_i2c_read_offload_rx_data()
453 memcpy(msg->buf, buf, msg->len); in mv64xxx_i2c_read_offload_rx_data()
461 cause = readl(drv_data->reg_base + in mv64xxx_i2c_intr_offload()
466 status = readl(drv_data->reg_base + in mv64xxx_i2c_intr_offload()
470 drv_data->rc = -EIO; in mv64xxx_i2c_intr_offload()
474 drv_data->rc = 0; in mv64xxx_i2c_intr_offload()
480 if (drv_data->num_msgs == 1 && drv_data->msgs[0].flags & I2C_M_RD) { in mv64xxx_i2c_intr_offload()
481 mv64xxx_i2c_read_offload_rx_data(drv_data, drv_data->msgs); in mv64xxx_i2c_intr_offload()
482 drv_data->msgs++; in mv64xxx_i2c_intr_offload()
483 drv_data->num_msgs--; in mv64xxx_i2c_intr_offload()
489 else if (drv_data->num_msgs == 2 && in mv64xxx_i2c_intr_offload()
490 !(drv_data->msgs[0].flags & I2C_M_RD) && in mv64xxx_i2c_intr_offload()
491 drv_data->msgs[1].flags & I2C_M_RD) { in mv64xxx_i2c_intr_offload()
492 mv64xxx_i2c_read_offload_rx_data(drv_data, drv_data->msgs + 1); in mv64xxx_i2c_intr_offload()
493 drv_data->msgs += 2; in mv64xxx_i2c_intr_offload()
494 drv_data->num_msgs -= 2; in mv64xxx_i2c_intr_offload()
498 writel(0, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL); in mv64xxx_i2c_intr_offload()
499 writel(0, drv_data->reg_base + in mv64xxx_i2c_intr_offload()
501 drv_data->block = 0; in mv64xxx_i2c_intr_offload()
503 wake_up(&drv_data->waitq); in mv64xxx_i2c_intr_offload()
515 spin_lock(&drv_data->lock); in mv64xxx_i2c_intr()
517 if (drv_data->offload_enabled) in mv64xxx_i2c_intr()
520 while (readl(drv_data->reg_base + drv_data->reg_offsets.control) & in mv64xxx_i2c_intr()
530 if (drv_data->atomic) in mv64xxx_i2c_intr()
533 status = readl(drv_data->reg_base + drv_data->reg_offsets.status); in mv64xxx_i2c_intr()
537 if (drv_data->irq_clear_inverted) in mv64xxx_i2c_intr()
538 writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_IFLG, in mv64xxx_i2c_intr()
539 drv_data->reg_base + drv_data->reg_offsets.control); in mv64xxx_i2c_intr()
543 spin_unlock(&drv_data->lock); in mv64xxx_i2c_intr()
551 * I2C Msg Execution Routines
562 time_left = wait_event_timeout(drv_data->waitq, in mv64xxx_i2c_wait_for_completion()
563 !drv_data->block, drv_data->adapter.timeout); in mv64xxx_i2c_wait_for_completion()
565 spin_lock_irqsave(&drv_data->lock, flags); in mv64xxx_i2c_wait_for_completion()
567 drv_data->rc = -ETIMEDOUT; in mv64xxx_i2c_wait_for_completion()
570 drv_data->rc = time_left; /* errno value */ in mv64xxx_i2c_wait_for_completion()
574 if (abort && drv_data->block) { in mv64xxx_i2c_wait_for_completion()
575 drv_data->aborting = 1; in mv64xxx_i2c_wait_for_completion()
576 spin_unlock_irqrestore(&drv_data->lock, flags); in mv64xxx_i2c_wait_for_completion()
578 time_left = wait_event_timeout(drv_data->waitq, in mv64xxx_i2c_wait_for_completion()
579 !drv_data->block, drv_data->adapter.timeout); in mv64xxx_i2c_wait_for_completion()
581 if ((time_left <= 0) && drv_data->block) { in mv64xxx_i2c_wait_for_completion()
582 drv_data->state = MV64XXX_I2C_STATE_IDLE; in mv64xxx_i2c_wait_for_completion()
583 dev_err(&drv_data->adapter.dev, in mv64xxx_i2c_wait_for_completion()
584 "mv64xxx: I2C bus locked, block: %d, " in mv64xxx_i2c_wait_for_completion()
585 "time_left: %d\n", drv_data->block, in mv64xxx_i2c_wait_for_completion()
588 i2c_recover_bus(&drv_data->adapter); in mv64xxx_i2c_wait_for_completion()
591 spin_unlock_irqrestore(&drv_data->lock, flags); in mv64xxx_i2c_wait_for_completion()
596 ktime_t timeout = ktime_add_ms(ktime_get(), drv_data->adapter.timeout); in mv64xxx_i2c_wait_polling()
598 while (READ_ONCE(drv_data->block) && in mv64xxx_i2c_wait_polling()
611 spin_lock_irqsave(&drv_data->lock, flags); in mv64xxx_i2c_execute_msg()
613 drv_data->state = MV64XXX_I2C_STATE_WAITING_FOR_START_COND; in mv64xxx_i2c_execute_msg()
615 drv_data->send_stop = is_last; in mv64xxx_i2c_execute_msg()
616 drv_data->block = 1; in mv64xxx_i2c_execute_msg()
618 spin_unlock_irqrestore(&drv_data->lock, flags); in mv64xxx_i2c_execute_msg()
620 if (!drv_data->atomic) in mv64xxx_i2c_execute_msg()
625 return drv_data->rc; in mv64xxx_i2c_execute_msg()
631 struct i2c_msg *msg = drv_data->msgs; in mv64xxx_i2c_prepare_tx()
634 memcpy(buf, msg->buf, msg->len); in mv64xxx_i2c_prepare_tx()
636 writel(buf[0], drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_LO); in mv64xxx_i2c_prepare_tx()
637 writel(buf[1], drv_data->reg_base + MV64XXX_I2C_REG_TX_DATA_HI); in mv64xxx_i2c_prepare_tx()
643 struct i2c_msg *msgs = drv_data->msgs; in mv64xxx_i2c_offload_xfer()
644 int num = drv_data->num_msgs; in mv64xxx_i2c_offload_xfer()
648 spin_lock_irqsave(&drv_data->lock, flags); in mv64xxx_i2c_offload_xfer()
659 size_t len = msgs[0].len - 1; in mv64xxx_i2c_offload_xfer()
667 size_t len = msgs[0].len - 1; in mv64xxx_i2c_offload_xfer()
677 size_t lentx = msgs[0].len - 1; in mv64xxx_i2c_offload_xfer()
678 size_t lenrx = msgs[1].len - 1; in mv64xxx_i2c_offload_xfer()
690 drv_data->block = 1; in mv64xxx_i2c_offload_xfer()
691 writel(ctrl_reg, drv_data->reg_base + MV64XXX_I2C_REG_BRIDGE_CONTROL); in mv64xxx_i2c_offload_xfer()
692 spin_unlock_irqrestore(&drv_data->lock, flags); in mv64xxx_i2c_offload_xfer()
696 return drv_data->rc; in mv64xxx_i2c_offload_xfer()
702 return msg->len <= 8 && msg->len >= 1; in mv64xxx_i2c_valid_offload_sz()
708 struct i2c_msg *msgs = drv_data->msgs; in mv64xxx_i2c_can_offload()
709 int num = drv_data->num_msgs; in mv64xxx_i2c_can_offload()
711 if (!drv_data->offload_enabled) in mv64xxx_i2c_can_offload()
740 * I2C Core Support Routines (Interface to higher level I2C code)
756 rc = pm_runtime_resume_and_get(&adap->dev); in mv64xxx_i2c_xfer_core()
760 BUG_ON(drv_data->msgs != NULL); in mv64xxx_i2c_xfer_core()
761 drv_data->msgs = msgs; in mv64xxx_i2c_xfer_core()
762 drv_data->num_msgs = num; in mv64xxx_i2c_xfer_core()
764 if (mv64xxx_i2c_can_offload(drv_data) && !drv_data->atomic) in mv64xxx_i2c_xfer_core()
772 drv_data->num_msgs = 0; in mv64xxx_i2c_xfer_core()
773 drv_data->msgs = NULL; in mv64xxx_i2c_xfer_core()
775 pm_runtime_mark_last_busy(&adap->dev); in mv64xxx_i2c_xfer_core()
776 pm_runtime_put_autosuspend(&adap->dev); in mv64xxx_i2c_xfer_core()
786 drv_data->atomic = 0; in mv64xxx_i2c_xfer()
795 drv_data->atomic = 1; in mv64xxx_i2c_xfer_atomic()
813 { .compatible = "allwinner,sun4i-a10-i2c", .data = &mv64xxx_i2c_regs_sun4i},
814 { .compatible = "allwinner,sun6i-a31-i2c", .data = &mv64xxx_i2c_regs_sun4i},
815 { .compatible = "marvell,mv64xxx-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
816 { .compatible = "marvell,mv78230-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
817 { .compatible = "marvell,mv78230-a0-i2c", .data = &mv64xxx_i2c_regs_mv64xxx},
827 if (drv_data->clk_n_base_0) in mv64xxx_calc_freq()
843 delta = req_freq - freq; in mv64xxx_find_baud_factors()
845 drv_data->freq_m = m; in mv64xxx_find_baud_factors()
846 drv_data->freq_n = n; in mv64xxx_find_baud_factors()
862 struct device_node *np = dev->of_node; in mv64xxx_of_config()
866 /* CLK is mandatory when using DT to describe the i2c bus. We in mv64xxx_of_config()
870 if (!drv_data->clk) { in mv64xxx_of_config()
871 rc = -ENODEV; in mv64xxx_of_config()
874 tclk = clk_get_rate(drv_data->clk); in mv64xxx_of_config()
876 if (of_property_read_u32(np, "clock-frequency", &bus_freq)) in mv64xxx_of_config()
879 if (of_device_is_compatible(np, "allwinner,sun4i-a10-i2c") || in mv64xxx_of_config()
880 of_device_is_compatible(np, "allwinner,sun6i-a31-i2c")) in mv64xxx_of_config()
881 drv_data->clk_n_base_0 = true; in mv64xxx_of_config()
884 rc = -EINVAL; in mv64xxx_of_config()
888 drv_data->rstc = devm_reset_control_get_optional_exclusive(dev, NULL); in mv64xxx_of_config()
889 if (IS_ERR(drv_data->rstc)) { in mv64xxx_of_config()
890 rc = PTR_ERR(drv_data->rstc); in mv64xxx_of_config()
897 drv_data->adapter.timeout = HZ; in mv64xxx_of_config()
901 return -ENODEV; in mv64xxx_of_config()
903 memcpy(&drv_data->reg_offsets, data, sizeof(drv_data->reg_offsets)); in mv64xxx_of_config()
909 if (of_device_is_compatible(np, "marvell,mv78230-i2c")) { in mv64xxx_of_config()
910 drv_data->offload_enabled = true; in mv64xxx_of_config()
913 drv_data->errata_delay = true; in mv64xxx_of_config()
916 if (of_device_is_compatible(np, "marvell,mv78230-a0-i2c")) { in mv64xxx_of_config()
917 drv_data->offload_enabled = false; in mv64xxx_of_config()
920 drv_data->errata_delay = true; in mv64xxx_of_config()
923 if (of_device_is_compatible(np, "allwinner,sun6i-a31-i2c")) in mv64xxx_of_config()
924 drv_data->irq_clear_inverted = true; in mv64xxx_of_config()
934 return -ENODEV; in mv64xxx_of_config()
941 struct i2c_bus_recovery_info *rinfo = &drv_data->rinfo; in mv64xxx_i2c_init_recovery_info()
943 rinfo->pinctrl = devm_pinctrl_get(dev); in mv64xxx_i2c_init_recovery_info()
944 if (IS_ERR(rinfo->pinctrl)) { in mv64xxx_i2c_init_recovery_info()
945 if (PTR_ERR(rinfo->pinctrl) == -EPROBE_DEFER) in mv64xxx_i2c_init_recovery_info()
946 return -EPROBE_DEFER; in mv64xxx_i2c_init_recovery_info()
948 return PTR_ERR(rinfo->pinctrl); in mv64xxx_i2c_init_recovery_info()
949 } else if (!rinfo->pinctrl) { in mv64xxx_i2c_init_recovery_info()
950 return -ENODEV; in mv64xxx_i2c_init_recovery_info()
953 drv_data->adapter.bus_recovery_info = rinfo; in mv64xxx_i2c_init_recovery_info()
962 reset_control_assert(drv_data->rstc); in mv64xxx_i2c_runtime_suspend()
963 clk_disable_unprepare(drv_data->reg_clk); in mv64xxx_i2c_runtime_suspend()
964 clk_disable_unprepare(drv_data->clk); in mv64xxx_i2c_runtime_suspend()
974 clk_prepare_enable(drv_data->clk); in mv64xxx_i2c_runtime_resume()
975 clk_prepare_enable(drv_data->reg_clk); in mv64xxx_i2c_runtime_resume()
976 reset_control_reset(drv_data->rstc); in mv64xxx_i2c_runtime_resume()
987 struct mv64xxx_i2c_pdata *pdata = dev_get_platdata(&pd->dev); in mv64xxx_i2c_probe()
990 if ((!pdata && !pd->dev.of_node)) in mv64xxx_i2c_probe()
991 return -ENODEV; in mv64xxx_i2c_probe()
993 drv_data = devm_kzalloc(&pd->dev, sizeof(struct mv64xxx_i2c_data), in mv64xxx_i2c_probe()
996 return -ENOMEM; in mv64xxx_i2c_probe()
998 drv_data->reg_base = devm_platform_ioremap_resource(pd, 0); in mv64xxx_i2c_probe()
999 if (IS_ERR(drv_data->reg_base)) in mv64xxx_i2c_probe()
1000 return PTR_ERR(drv_data->reg_base); in mv64xxx_i2c_probe()
1002 strscpy(drv_data->adapter.name, MV64XXX_I2C_CTLR_NAME " adapter", in mv64xxx_i2c_probe()
1003 sizeof(drv_data->adapter.name)); in mv64xxx_i2c_probe()
1005 init_waitqueue_head(&drv_data->waitq); in mv64xxx_i2c_probe()
1006 spin_lock_init(&drv_data->lock); in mv64xxx_i2c_probe()
1009 drv_data->clk = devm_clk_get(&pd->dev, NULL); in mv64xxx_i2c_probe()
1010 if (IS_ERR(drv_data->clk)) { in mv64xxx_i2c_probe()
1011 if (PTR_ERR(drv_data->clk) == -EPROBE_DEFER) in mv64xxx_i2c_probe()
1012 return -EPROBE_DEFER; in mv64xxx_i2c_probe()
1013 drv_data->clk = NULL; in mv64xxx_i2c_probe()
1016 drv_data->reg_clk = devm_clk_get(&pd->dev, "reg"); in mv64xxx_i2c_probe()
1017 if (IS_ERR(drv_data->reg_clk)) { in mv64xxx_i2c_probe()
1018 if (PTR_ERR(drv_data->reg_clk) == -EPROBE_DEFER) in mv64xxx_i2c_probe()
1019 return -EPROBE_DEFER; in mv64xxx_i2c_probe()
1020 drv_data->reg_clk = NULL; in mv64xxx_i2c_probe()
1023 drv_data->irq = platform_get_irq(pd, 0); in mv64xxx_i2c_probe()
1024 if (drv_data->irq < 0) in mv64xxx_i2c_probe()
1025 return drv_data->irq; in mv64xxx_i2c_probe()
1028 drv_data->freq_m = pdata->freq_m; in mv64xxx_i2c_probe()
1029 drv_data->freq_n = pdata->freq_n; in mv64xxx_i2c_probe()
1030 drv_data->adapter.timeout = msecs_to_jiffies(pdata->timeout); in mv64xxx_i2c_probe()
1031 drv_data->offload_enabled = false; in mv64xxx_i2c_probe()
1032 memcpy(&drv_data->reg_offsets, &mv64xxx_i2c_regs_mv64xxx, sizeof(drv_data->reg_offsets)); in mv64xxx_i2c_probe()
1033 } else if (pd->dev.of_node) { in mv64xxx_i2c_probe()
1034 rc = mv64xxx_of_config(drv_data, &pd->dev); in mv64xxx_i2c_probe()
1039 rc = mv64xxx_i2c_init_recovery_info(drv_data, &pd->dev); in mv64xxx_i2c_probe()
1040 if (rc == -EPROBE_DEFER) in mv64xxx_i2c_probe()
1043 drv_data->adapter.dev.parent = &pd->dev; in mv64xxx_i2c_probe()
1044 drv_data->adapter.algo = &mv64xxx_i2c_algo; in mv64xxx_i2c_probe()
1045 drv_data->adapter.owner = THIS_MODULE; in mv64xxx_i2c_probe()
1046 drv_data->adapter.class = I2C_CLASS_DEPRECATED; in mv64xxx_i2c_probe()
1047 drv_data->adapter.nr = pd->id; in mv64xxx_i2c_probe()
1048 drv_data->adapter.dev.of_node = pd->dev.of_node; in mv64xxx_i2c_probe()
1050 i2c_set_adapdata(&drv_data->adapter, drv_data); in mv64xxx_i2c_probe()
1052 pm_runtime_set_autosuspend_delay(&pd->dev, MSEC_PER_SEC); in mv64xxx_i2c_probe()
1053 pm_runtime_use_autosuspend(&pd->dev); in mv64xxx_i2c_probe()
1054 pm_runtime_enable(&pd->dev); in mv64xxx_i2c_probe()
1055 if (!pm_runtime_enabled(&pd->dev)) { in mv64xxx_i2c_probe()
1056 rc = mv64xxx_i2c_runtime_resume(&pd->dev); in mv64xxx_i2c_probe()
1061 rc = request_irq(drv_data->irq, mv64xxx_i2c_intr, 0, in mv64xxx_i2c_probe()
1064 dev_err(&drv_data->adapter.dev, in mv64xxx_i2c_probe()
1066 drv_data->irq, rc); in mv64xxx_i2c_probe()
1068 } else if ((rc = i2c_add_numbered_adapter(&drv_data->adapter)) != 0) { in mv64xxx_i2c_probe()
1069 dev_err(&drv_data->adapter.dev, in mv64xxx_i2c_probe()
1070 "mv64xxx: Can't add i2c adapter, rc: %d\n", -rc); in mv64xxx_i2c_probe()
1077 free_irq(drv_data->irq, drv_data); in mv64xxx_i2c_probe()
1079 pm_runtime_disable(&pd->dev); in mv64xxx_i2c_probe()
1080 if (!pm_runtime_status_suspended(&pd->dev)) in mv64xxx_i2c_probe()
1081 mv64xxx_i2c_runtime_suspend(&pd->dev); in mv64xxx_i2c_probe()
1091 i2c_del_adapter(&drv_data->adapter); in mv64xxx_i2c_remove()
1092 free_irq(drv_data->irq, drv_data); in mv64xxx_i2c_remove()
1093 pm_runtime_disable(&pd->dev); in mv64xxx_i2c_remove()
1094 if (!pm_runtime_status_suspended(&pd->dev)) in mv64xxx_i2c_remove()
1095 mv64xxx_i2c_runtime_suspend(&pd->dev); in mv64xxx_i2c_remove()
1118 MODULE_DESCRIPTION("Marvell mv64xxx host bridge i2c ctlr driver");