Lines Matching +full:smbus +full:- +full:timeout +full:- +full:disable
1 // SPDX-License-Identifier: GPL-2.0
55 * Note that the following SMBus, CAUSE, GPIO and PLL register addresses
57 * memory-mapped region whose addresses are specified in either the DT or
62 * SMBus Master core clock frequency. Timing configurations are
63 * strongly dependent on the core clock frequency of the SMBus
67 /* Reference clock for Bluefield - 156 MHz. */
107 /* Transfer timeout occurred. */
146 * Note that Smbus GWs are on GPIOs 30:25. Two pins are used to control
149 * SMBUS GW0 -> bits[26:25]
150 * SMBUS GW1 -> bits[28:27]
151 * SMBUS GW2 -> bits[30:29]
166 * Defines SMBus operating frequency and core clock frequency.
167 * According to ADB files, default values are compliant to 100KHz SMBus
183 /* SMBus timing parameters. */
202 /* SMBus Master GW. */
209 /* Status bits (ACK/NACK/FW Timeout). */
211 /* SMbus Master Finite State Machine. */
215 /* SMBus master GW control bits offset in MLXBF_I2C_SMBUS_MASTER_GW[31:3]. */
239 /* SMBus master GW Data descriptor. */
243 /* Maximum bytes to read/write per SMBus transaction. */
245 #define MLXBF_I2C_MASTER_DATA_W_LENGTH (MLXBF_I2C_MASTER_DATA_DESC_SIZE - 1)
253 /* Timeout occurred. */
268 /* SMBus slave GW. */
274 /* SMBus slave Finite State Machine (FSM). */
282 /* SMBus slave GW control bits offset in MLXBF_I2C_SMBUS_SLAVE_GW[31:19]. */
292 /* SMBus slave GW Data descriptor. */
296 /* SMbus slave configuration registers. */
303 * Timeout is given in microsends. Note also that timeout handling is not
321 .end = (addr) + (size) - 1, \
343 MLXBF_I2C_CHIP_TYPE_1, /* Mellanox BlueField-1 chip. */
344 MLXBF_I2C_CHIP_TYPE_2, /* Mellanox BlueField-2 chip. */
345 MLXBF_I2C_CHIP_TYPE_3 /* Mellanox BlueField-3 chip. */
378 u32 timeout; /* Detect clock low timeout. */ member
416 struct mlxbf_i2c_resource *smbus; member
502 * Note that the timeout is given in microseconds.
505 bool eq_zero, u32 timeout) in mlxbf_i2c_poll() argument
509 timeout = (timeout / MLXBF_I2C_POLL_FREQ_IN_USEC) + 1; in mlxbf_i2c_poll()
516 } while (timeout-- != 0); in mlxbf_i2c_poll()
522 * SW must make sure that the SMBus Master GW is idle before starting
529 u32 addr = priv->chip->smbus_master_fsm_off; in mlxbf_i2c_smbus_master_wait_for_idle()
530 u32 timeout = MLXBF_I2C_SMBUS_TIMEOUT; in mlxbf_i2c_smbus_master_wait_for_idle() local
532 if (mlxbf_i2c_poll(priv->mst->io, addr, mask, true, timeout)) in mlxbf_i2c_smbus_master_wait_for_idle()
543 if (mlxbf_i2c_poll(priv->mst->io, MLXBF_I2C_SMBUS_MASTER_GW, in mlxbf_i2c_smbus_master_lock()
554 writel(0, priv->mst->io + MLXBF_I2C_SMBUS_MASTER_GW); in mlxbf_i2c_smbus_master_unlock()
564 * de-asserted then the SMBus expects the following GW configuration in mlxbf_i2c_smbus_transaction_success()
577 * Poll SMBus master status and return transaction status,
578 * i.e. whether succeeded or failed. I2C and SMBus fault codes
580 * or some positive number indicating a non-fault return.
594 mlxbf_i2c_poll(priv->mst->io, MLXBF_I2C_SMBUS_MASTER_GW, in mlxbf_i2c_smbus_check_status()
599 cause_status_bits = readl(priv->mst_cause->io + in mlxbf_i2c_smbus_check_status()
607 master_status_bits = readl(priv->mst->io + in mlxbf_i2c_smbus_check_status()
616 * In case of timeout on GW busy, the ISR will clear busy bit but in mlxbf_i2c_smbus_check_status()
623 return -EIO; in mlxbf_i2c_smbus_check_status()
626 return -EAGAIN; in mlxbf_i2c_smbus_check_status()
628 return -ETIMEDOUT; in mlxbf_i2c_smbus_check_status()
641 * Copy data bytes from 4-byte aligned source buffer. in mlxbf_i2c_smbus_write_data()
645 * when writing data bytes to the 32 * 32-bit HW Data registers in mlxbf_i2c_smbus_write_data()
651 iowrite32be(data32, priv->mst->io + addr + offset); in mlxbf_i2c_smbus_write_data()
653 iowrite32be(data32, priv->slv->io + addr + offset); in mlxbf_i2c_smbus_write_data()
664 mask = sizeof(u32) - 1; in mlxbf_i2c_smbus_read_data()
670 * reading data bytes from the 32 * 32-bit HW Data registers in mlxbf_i2c_smbus_read_data()
676 data32 = ioread32be(priv->mst->io + addr + offset); in mlxbf_i2c_smbus_read_data()
678 data32 = ioread32be(priv->slv->io + addr + offset); in mlxbf_i2c_smbus_read_data()
686 data32 = ioread32be(priv->mst->io + addr + offset); in mlxbf_i2c_smbus_read_data()
688 data32 = ioread32be(priv->slv->io + addr + offset); in mlxbf_i2c_smbus_read_data()
714 writel(0x0, priv->mst->io + MLXBF_I2C_SMBUS_MASTER_STATUS); in mlxbf_i2c_smbus_enable()
716 writel(~0x0, priv->mst_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR); in mlxbf_i2c_smbus_enable()
718 writel(0x0, priv->mst->io + MLXBF_I2C_SMBUS_MASTER_PEC); in mlxbf_i2c_smbus_enable()
720 writel(0x0, priv->mst->io + priv->chip->smbus_master_rs_bytes_off); in mlxbf_i2c_smbus_enable()
723 writel(command, priv->mst->io + MLXBF_I2C_SMBUS_MASTER_GW); in mlxbf_i2c_smbus_enable()
745 if (request->operation_cnt > MLXBF_I2C_SMBUS_MAX_OP_CNT) in mlxbf_i2c_smbus_start_transaction()
746 return -EINVAL; in mlxbf_i2c_smbus_start_transaction()
756 slave = request->slave & GENMASK(6, 0); in mlxbf_i2c_smbus_start_transaction()
760 * Try to acquire the smbus gw lock before any reads of the GW register since in mlxbf_i2c_smbus_start_transaction()
764 return -EBUSY; in mlxbf_i2c_smbus_start_transaction()
768 ret = -EBUSY; in mlxbf_i2c_smbus_start_transaction()
775 for (op_idx = 0; op_idx < request->operation_cnt; op_idx++) { in mlxbf_i2c_smbus_start_transaction()
776 operation = &request->operation[op_idx]; in mlxbf_i2c_smbus_start_transaction()
777 flags = operation->flags; in mlxbf_i2c_smbus_start_transaction()
782 * then write command byte and set the optional SMBus specific in mlxbf_i2c_smbus_start_transaction()
793 write_len += operation->length; in mlxbf_i2c_smbus_start_transaction()
794 if (data_idx + operation->length > in mlxbf_i2c_smbus_start_transaction()
796 ret = -ENOBUFS; in mlxbf_i2c_smbus_start_transaction()
800 operation->buffer, operation->length); in mlxbf_i2c_smbus_start_transaction()
801 data_idx += operation->length; in mlxbf_i2c_smbus_start_transaction()
805 * SMBus transaction. *TBD* protect this statement so it won't in mlxbf_i2c_smbus_start_transaction()
812 read_len = operation->length - 1; in mlxbf_i2c_smbus_start_transaction()
813 read_buf = operation->buffer; in mlxbf_i2c_smbus_start_transaction()
849 * After a read operation the SMBus FSM ps (present state) in mlxbf_i2c_smbus_start_transaction()
854 priv->mst->io + priv->chip->smbus_master_fsm_off); in mlxbf_i2c_smbus_start_transaction()
863 /* I2C SMBus protocols. */
869 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_1; in mlxbf_i2c_smbus_quick_command()
871 request->operation[0].length = 0; in mlxbf_i2c_smbus_quick_command()
872 request->operation[0].flags = MLXBF_I2C_F_WRITE; in mlxbf_i2c_smbus_quick_command()
873 request->operation[0].flags |= read ? MLXBF_I2C_F_READ : 0; in mlxbf_i2c_smbus_quick_command()
879 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_1; in mlxbf_i2c_smbus_byte_func()
881 request->operation[0].length = 1; in mlxbf_i2c_smbus_byte_func()
882 request->operation[0].length += pec_check; in mlxbf_i2c_smbus_byte_func()
884 request->operation[0].flags = MLXBF_I2C_F_SMBUS_OPERATION; in mlxbf_i2c_smbus_byte_func()
885 request->operation[0].flags |= read ? in mlxbf_i2c_smbus_byte_func()
887 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_byte_func()
889 request->operation[0].buffer = data; in mlxbf_i2c_smbus_byte_func()
896 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_2; in mlxbf_i2c_smbus_data_byte_func()
898 request->operation[0].length = 1; in mlxbf_i2c_smbus_data_byte_func()
899 request->operation[0].flags = in mlxbf_i2c_smbus_data_byte_func()
901 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_data_byte_func()
902 request->operation[0].buffer = command; in mlxbf_i2c_smbus_data_byte_func()
904 request->operation[1].length = 1; in mlxbf_i2c_smbus_data_byte_func()
905 request->operation[1].length += pec_check; in mlxbf_i2c_smbus_data_byte_func()
906 request->operation[1].flags = read ? in mlxbf_i2c_smbus_data_byte_func()
908 request->operation[1].buffer = data; in mlxbf_i2c_smbus_data_byte_func()
915 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_2; in mlxbf_i2c_smbus_data_word_func()
917 request->operation[0].length = 1; in mlxbf_i2c_smbus_data_word_func()
918 request->operation[0].flags = in mlxbf_i2c_smbus_data_word_func()
920 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_data_word_func()
921 request->operation[0].buffer = command; in mlxbf_i2c_smbus_data_word_func()
923 request->operation[1].length = 2; in mlxbf_i2c_smbus_data_word_func()
924 request->operation[1].length += pec_check; in mlxbf_i2c_smbus_data_word_func()
925 request->operation[1].flags = read ? in mlxbf_i2c_smbus_data_word_func()
927 request->operation[1].buffer = data; in mlxbf_i2c_smbus_data_word_func()
935 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_2; in mlxbf_i2c_smbus_i2c_block_func()
937 request->operation[0].length = 1; in mlxbf_i2c_smbus_i2c_block_func()
938 request->operation[0].flags = in mlxbf_i2c_smbus_i2c_block_func()
940 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_i2c_block_func()
941 request->operation[0].buffer = command; in mlxbf_i2c_smbus_i2c_block_func()
948 request->operation[1].length = in mlxbf_i2c_smbus_i2c_block_func()
951 request->operation[1].flags = read ? in mlxbf_i2c_smbus_i2c_block_func()
957 request->operation[1].buffer = data + 1; in mlxbf_i2c_smbus_i2c_block_func()
959 *data_len = request->operation[1].length; in mlxbf_i2c_smbus_i2c_block_func()
970 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_2; in mlxbf_i2c_smbus_block_func()
972 request->operation[0].length = 1; in mlxbf_i2c_smbus_block_func()
973 request->operation[0].flags = in mlxbf_i2c_smbus_block_func()
975 request->operation[0].flags |= MLXBF_I2C_F_SMBUS_BLOCK; in mlxbf_i2c_smbus_block_func()
976 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_block_func()
977 request->operation[0].buffer = command; in mlxbf_i2c_smbus_block_func()
979 request->operation[1].length = in mlxbf_i2c_smbus_block_func()
982 request->operation[1].flags = read ? in mlxbf_i2c_smbus_block_func()
984 request->operation[1].buffer = data + 1; in mlxbf_i2c_smbus_block_func()
986 *data_len = request->operation[1].length; in mlxbf_i2c_smbus_block_func()
997 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_3; in mlxbf_i2c_smbus_process_call_func()
999 request->operation[0].length = 1; in mlxbf_i2c_smbus_process_call_func()
1000 request->operation[0].flags = in mlxbf_i2c_smbus_process_call_func()
1002 request->operation[0].flags |= MLXBF_I2C_F_SMBUS_BLOCK; in mlxbf_i2c_smbus_process_call_func()
1003 request->operation[0].flags |= pec_check ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_process_call_func()
1004 request->operation[0].buffer = command; in mlxbf_i2c_smbus_process_call_func()
1006 request->operation[1].length = 2; in mlxbf_i2c_smbus_process_call_func()
1007 request->operation[1].flags = MLXBF_I2C_F_WRITE; in mlxbf_i2c_smbus_process_call_func()
1008 request->operation[1].buffer = data; in mlxbf_i2c_smbus_process_call_func()
1010 request->operation[2].length = 3; in mlxbf_i2c_smbus_process_call_func()
1011 request->operation[2].flags = MLXBF_I2C_F_READ; in mlxbf_i2c_smbus_process_call_func()
1012 request->operation[2].buffer = data; in mlxbf_i2c_smbus_process_call_func()
1022 request->operation_cnt = MLXBF_I2C_SMBUS_OP_CNT_3; in mlxbf_i2c_smbus_blk_process_call_func()
1024 request->operation[0].length = 1; in mlxbf_i2c_smbus_blk_process_call_func()
1025 request->operation[0].flags = in mlxbf_i2c_smbus_blk_process_call_func()
1027 request->operation[0].flags |= MLXBF_I2C_F_SMBUS_BLOCK; in mlxbf_i2c_smbus_blk_process_call_func()
1028 request->operation[0].flags |= (pec_check) ? MLXBF_I2C_F_SMBUS_PEC : 0; in mlxbf_i2c_smbus_blk_process_call_func()
1029 request->operation[0].buffer = command; in mlxbf_i2c_smbus_blk_process_call_func()
1034 request->operation[1].length = length - pec_check; in mlxbf_i2c_smbus_blk_process_call_func()
1035 request->operation[1].flags = MLXBF_I2C_F_WRITE; in mlxbf_i2c_smbus_blk_process_call_func()
1036 request->operation[1].buffer = data; in mlxbf_i2c_smbus_blk_process_call_func()
1038 request->operation[2].length = length; in mlxbf_i2c_smbus_blk_process_call_func()
1039 request->operation[2].flags = MLXBF_I2C_F_READ; in mlxbf_i2c_smbus_blk_process_call_func()
1040 request->operation[2].buffer = data; in mlxbf_i2c_smbus_blk_process_call_func()
1049 return priv->chip->type == type; in mlxbf_i2c_has_chip_type()
1055 const struct mlxbf_i2c_chip_info *chip = priv->chip; in mlxbf_i2c_get_shared_resource()
1060 res = chip->shared_res[res_idx]; in mlxbf_i2c_get_shared_resource()
1061 if (res && res->type == type) in mlxbf_i2c_get_shared_resource()
1073 struct device *dev = &pdev->dev; in mlxbf_i2c_init_resource()
1076 return -EINVAL; in mlxbf_i2c_init_resource()
1081 return -ENOMEM; in mlxbf_i2c_init_resource()
1083 tmp_res->io = devm_platform_get_and_ioremap_resource(pdev, type, &tmp_res->params); in mlxbf_i2c_init_resource()
1084 if (IS_ERR(tmp_res->io)) { in mlxbf_i2c_init_resource()
1086 return PTR_ERR(tmp_res->io); in mlxbf_i2c_init_resource()
1089 tmp_res->type = type; in mlxbf_i2c_init_resource()
1106 * Time = --------- x 10^9 => Ticks = Time x Frequency x 10^-9 in mlxbf_i2c_get_ticks()
1109 frequency = priv->frequency; in mlxbf_i2c_get_ticks()
1134 timer = mlxbf_i2c_set_timer(priv, timings->scl_high, in mlxbf_i2c_set_timings()
1137 timer |= mlxbf_i2c_set_timer(priv, timings->scl_low, in mlxbf_i2c_set_timings()
1140 writel(timer, priv->timer->io + in mlxbf_i2c_set_timings()
1143 timer = mlxbf_i2c_set_timer(priv, timings->sda_rise, false, in mlxbf_i2c_set_timings()
1145 timer |= mlxbf_i2c_set_timer(priv, timings->sda_fall, false, in mlxbf_i2c_set_timings()
1147 timer |= mlxbf_i2c_set_timer(priv, timings->scl_rise, false, in mlxbf_i2c_set_timings()
1149 timer |= mlxbf_i2c_set_timer(priv, timings->scl_fall, false, in mlxbf_i2c_set_timings()
1151 writel(timer, priv->timer->io + in mlxbf_i2c_set_timings()
1154 timer = mlxbf_i2c_set_timer(priv, timings->hold_start, true, in mlxbf_i2c_set_timings()
1156 timer |= mlxbf_i2c_set_timer(priv, timings->hold_data, true, in mlxbf_i2c_set_timings()
1158 writel(timer, priv->timer->io + MLXBF_I2C_SMBUS_TIMER_THOLD); in mlxbf_i2c_set_timings()
1160 timer = mlxbf_i2c_set_timer(priv, timings->setup_start, true, in mlxbf_i2c_set_timings()
1162 timer |= mlxbf_i2c_set_timer(priv, timings->setup_stop, true, in mlxbf_i2c_set_timings()
1164 writel(timer, priv->timer->io + in mlxbf_i2c_set_timings()
1167 timer = mlxbf_i2c_set_timer(priv, timings->setup_data, true, in mlxbf_i2c_set_timings()
1169 writel(timer, priv->timer->io + MLXBF_I2C_SMBUS_TIMER_TSETUP_DATA); in mlxbf_i2c_set_timings()
1171 timer = mlxbf_i2c_set_timer(priv, timings->buf, false, in mlxbf_i2c_set_timings()
1173 timer |= mlxbf_i2c_set_timer(priv, timings->thigh_max, false, in mlxbf_i2c_set_timings()
1175 writel(timer, priv->timer->io + MLXBF_I2C_SMBUS_THIGH_MAX_TBUF); in mlxbf_i2c_set_timings()
1177 timer = timings->timeout; in mlxbf_i2c_set_timings()
1178 writel(timer, priv->timer->io + MLXBF_I2C_SMBUS_SCL_LOW_TIMEOUT); in mlxbf_i2c_set_timings()
1188 * Note that the mlxbf_i2c_timings->timeout value is not related to the
1207 .timeout = 106500
1223 .timeout = 106500
1239 .timeout = 106500
1247 struct device *dev = &pdev->dev; in mlxbf_i2c_init_timings()
1252 ret = device_property_read_u32(dev, "clock-frequency", &config_khz); in mlxbf_i2c_init_timings()
1284 struct device *dev = &pdev->dev; in mlxbf_i2c_get_gpio()
1290 return -EPERM; in mlxbf_i2c_get_gpio()
1297 lockdep_assert_held(gpio_res->lock); in mlxbf_i2c_get_gpio()
1300 if (gpio_res->io) in mlxbf_i2c_get_gpio()
1303 params = gpio_res->params; in mlxbf_i2c_get_gpio()
1306 if (!devm_request_mem_region(dev, params->start, size, params->name)) in mlxbf_i2c_get_gpio()
1307 return -EFAULT; in mlxbf_i2c_get_gpio()
1309 gpio_res->io = devm_ioremap(dev, params->start, size); in mlxbf_i2c_get_gpio()
1310 if (!gpio_res->io) { in mlxbf_i2c_get_gpio()
1311 devm_release_mem_region(dev, params->start, size); in mlxbf_i2c_get_gpio()
1312 return -ENOMEM; in mlxbf_i2c_get_gpio()
1322 struct device *dev = &pdev->dev; in mlxbf_i2c_release_gpio()
1329 mutex_lock(gpio_res->lock); in mlxbf_i2c_release_gpio()
1331 if (gpio_res->io) { in mlxbf_i2c_release_gpio()
1333 params = gpio_res->params; in mlxbf_i2c_release_gpio()
1334 devm_iounmap(dev, gpio_res->io); in mlxbf_i2c_release_gpio()
1335 devm_release_mem_region(dev, params->start, in mlxbf_i2c_release_gpio()
1339 mutex_unlock(gpio_res->lock); in mlxbf_i2c_release_gpio()
1348 struct device *dev = &pdev->dev; in mlxbf_i2c_get_corepll()
1355 return -EPERM; in mlxbf_i2c_get_corepll()
1362 lockdep_assert_held(corepll_res->lock); in mlxbf_i2c_get_corepll()
1365 if (corepll_res->io) in mlxbf_i2c_get_corepll()
1368 params = corepll_res->params; in mlxbf_i2c_get_corepll()
1371 if (!devm_request_mem_region(dev, params->start, size, params->name)) in mlxbf_i2c_get_corepll()
1372 return -EFAULT; in mlxbf_i2c_get_corepll()
1374 corepll_res->io = devm_ioremap(dev, params->start, size); in mlxbf_i2c_get_corepll()
1375 if (!corepll_res->io) { in mlxbf_i2c_get_corepll()
1376 devm_release_mem_region(dev, params->start, size); in mlxbf_i2c_get_corepll()
1377 return -ENOMEM; in mlxbf_i2c_get_corepll()
1387 struct device *dev = &pdev->dev; in mlxbf_i2c_release_corepll()
1393 mutex_lock(corepll_res->lock); in mlxbf_i2c_release_corepll()
1395 if (corepll_res->io) { in mlxbf_i2c_release_corepll()
1397 params = corepll_res->params; in mlxbf_i2c_release_corepll()
1398 devm_iounmap(dev, corepll_res->io); in mlxbf_i2c_release_corepll()
1399 devm_release_mem_region(dev, params->start, in mlxbf_i2c_release_corepll()
1403 mutex_unlock(corepll_res->lock); in mlxbf_i2c_release_corepll()
1412 struct device *dev = &pdev->dev; in mlxbf_i2c_init_master()
1422 return -EPERM; in mlxbf_i2c_init_master()
1430 mutex_lock(gpio_res->lock); in mlxbf_i2c_init_master()
1435 mutex_unlock(gpio_res->lock); in mlxbf_i2c_init_master()
1440 * TYU - Configuration for GPIO pins. Those pins must be asserted in in mlxbf_i2c_init_master()
1445 * First, it is not necessary to disable the bus since we are using in mlxbf_i2c_init_master()
1450 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1451 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_ASSERT_PINS(priv->bus, in mlxbf_i2c_init_master()
1453 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1455 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
1456 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_RESET_PINS(priv->bus, in mlxbf_i2c_init_master()
1458 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
1460 mutex_unlock(gpio_res->lock); in mlxbf_i2c_init_master()
1472 corepll_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG1); in mlxbf_i2c_calculate_freq_from_tyu()
1483 * PLL_OUT_FREQ = PLL_IN_FREQ * ---------------------------- in mlxbf_i2c_calculate_freq_from_tyu()
1502 corepll_reg1_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG1); in mlxbf_i2c_calculate_freq_from_yu()
1503 corepll_reg2_val = readl(corepll_res->io + MLXBF_I2C_CORE_PLL_REG2); in mlxbf_i2c_calculate_freq_from_yu()
1514 * PLL_OUT_FREQ = PLL_IN_FREQ * ---------------------------- in mlxbf_i2c_calculate_freq_from_yu()
1529 const struct mlxbf_i2c_chip_info *chip = priv->chip; in mlxbf_i2c_calculate_corepll_freq()
1531 struct device *dev = &pdev->dev; in mlxbf_i2c_calculate_corepll_freq()
1532 u64 *freq = &priv->frequency; in mlxbf_i2c_calculate_corepll_freq()
1538 return -EPERM; in mlxbf_i2c_calculate_corepll_freq()
1548 mutex_lock(corepll_res->lock); in mlxbf_i2c_calculate_corepll_freq()
1550 if (!chip->calculate_freq) { in mlxbf_i2c_calculate_corepll_freq()
1551 mutex_unlock(corepll_res->lock); in mlxbf_i2c_calculate_corepll_freq()
1552 return -EPERM; in mlxbf_i2c_calculate_corepll_freq()
1558 mutex_unlock(corepll_res->lock); in mlxbf_i2c_calculate_corepll_freq()
1562 mlxbf_i2c_corepll_frequency = chip->calculate_freq(corepll_res); in mlxbf_i2c_calculate_corepll_freq()
1564 mutex_unlock(corepll_res->lock); in mlxbf_i2c_calculate_corepll_freq()
1578 return -EPERM; in mlxbf_i2c_slave_enable()
1583 * Read the slave registers. There are 4 * 32-bit slave registers. in mlxbf_i2c_slave_enable()
1584 * Each slave register can hold up to 4 * 8-bit slave configuration: in mlxbf_i2c_slave_enable()
1585 * 1) A 7-bit address in mlxbf_i2c_slave_enable()
1590 slave_reg = readl(priv->slv->io + in mlxbf_i2c_slave_enable()
1610 slave_reg |= (slave->addr << (byte * 8)); in mlxbf_i2c_slave_enable()
1612 writel(slave_reg, priv->slv->io + in mlxbf_i2c_slave_enable()
1619 priv->slave[(reg * 4) + byte] = slave; in mlxbf_i2c_slave_enable()
1629 return -EBUSY; in mlxbf_i2c_slave_enable()
1640 * Read the slave registers. There are 4 * 32-bit slave registers. in mlxbf_i2c_slave_disable()
1641 * Each slave register can hold up to 4 * 8-bit slave configuration: in mlxbf_i2c_slave_disable()
1642 * 1) A 7-bit address in mlxbf_i2c_slave_disable()
1647 slave_reg = readl(priv->slv->io + in mlxbf_i2c_slave_disable()
1668 writel(slave_reg, priv->slv->io + in mlxbf_i2c_slave_disable()
1672 priv->slave[(reg * 4) + byte] = NULL; in mlxbf_i2c_slave_disable()
1682 return -ENXIO; in mlxbf_i2c_slave_disable()
1694 * Unlike BlueField-1 platform, the coalesce registers is a dedicated in mlxbf_i2c_init_coalesce()
1701 return -EPERM; in mlxbf_i2c_init_coalesce()
1708 lockdep_assert_held(mlxbf_i2c_gpio_res->lock); in mlxbf_i2c_init_coalesce()
1711 if (coalesce_res->io) { in mlxbf_i2c_init_coalesce()
1712 priv->coalesce = coalesce_res; in mlxbf_i2c_init_coalesce()
1716 params = coalesce_res->params; in mlxbf_i2c_init_coalesce()
1719 if (!request_mem_region(params->start, size, params->name)) in mlxbf_i2c_init_coalesce()
1720 return -EFAULT; in mlxbf_i2c_init_coalesce()
1722 coalesce_res->io = ioremap(params->start, size); in mlxbf_i2c_init_coalesce()
1723 if (!coalesce_res->io) { in mlxbf_i2c_init_coalesce()
1724 release_mem_region(params->start, size); in mlxbf_i2c_init_coalesce()
1725 return -ENOMEM; in mlxbf_i2c_init_coalesce()
1728 priv->coalesce = coalesce_res; in mlxbf_i2c_init_coalesce()
1731 ret = mlxbf_i2c_init_resource(pdev, &priv->coalesce, in mlxbf_i2c_init_coalesce()
1742 struct device *dev = &pdev->dev; in mlxbf_i2c_release_coalesce()
1746 coalesce_res = priv->coalesce; in mlxbf_i2c_release_coalesce()
1748 if (coalesce_res->io) { in mlxbf_i2c_release_coalesce()
1749 params = coalesce_res->params; in mlxbf_i2c_release_coalesce()
1752 mutex_lock(coalesce_res->lock); in mlxbf_i2c_release_coalesce()
1753 iounmap(coalesce_res->io); in mlxbf_i2c_release_coalesce()
1754 release_mem_region(params->start, size); in mlxbf_i2c_release_coalesce()
1755 mutex_unlock(coalesce_res->lock); in mlxbf_i2c_release_coalesce()
1757 devm_release_mem_region(dev, params->start, size); in mlxbf_i2c_release_coalesce()
1767 struct device *dev = &pdev->dev; in mlxbf_i2c_init_slave()
1772 writel(0, priv->slv->io + MLXBF_I2C_SMBUS_SLAVE_FSM); in mlxbf_i2c_init_slave()
1781 writel(~0, priv->slv_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR); in mlxbf_i2c_init_slave()
1784 writel(int_reg, priv->slv_cause->io + MLXBF_I2C_CAUSE_OR_EVTEN0); in mlxbf_i2c_init_slave()
1787 writel(0x1, priv->slv->io + MLXBF_I2C_SMBUS_SLAVE_READY); in mlxbf_i2c_init_slave()
1802 const struct mlxbf_i2c_chip_info *chip = priv->chip; in mlxbf_i2c_has_coalesce()
1809 slave_shift = chip->type != MLXBF_I2C_CHIP_TYPE_1 ? in mlxbf_i2c_has_coalesce()
1811 priv->bus + MLXBF_I2C_CAUSE_TYU_SLAVE_BIT; in mlxbf_i2c_has_coalesce()
1813 coalesce0_reg = readl(priv->coalesce->io + MLXBF_I2C_CAUSE_COALESCE_0); in mlxbf_i2c_has_coalesce()
1820 cause_reg = readl(priv->slv_cause->io + MLXBF_I2C_CAUSE_ARBITER); in mlxbf_i2c_has_coalesce()
1827 writel(~0x0, priv->slv_cause->io + MLXBF_I2C_CAUSE_OR_CLEAR); in mlxbf_i2c_has_coalesce()
1833 u32 timeout) in mlxbf_i2c_slave_wait_for_idle() argument
1838 if (mlxbf_i2c_poll(priv->slv_cause->io, addr, mask, false, timeout)) in mlxbf_i2c_slave_wait_for_idle()
1850 if (!priv->slave[i]) in mlxbf_i2c_get_slave_from_addr()
1853 if (priv->slave[i]->addr == addr) in mlxbf_i2c_get_slave_from_addr()
1854 return priv->slave[i]; in mlxbf_i2c_get_slave_from_addr()
1861 * Send byte to 'external' smbus master. This function is executed when
1862 * an external smbus master wants to read data from the BlueField.
1877 data32 = ioread32be(priv->slv->io + in mlxbf_i2c_irq_send()
1888 ret = -ENXIO; in mlxbf_i2c_irq_send()
1927 write_size = (byte_cnt - 1) & 0x7f; in mlxbf_i2c_irq_send()
1933 pec_en = 0; /* Disable PEC since it is not supported. */ in mlxbf_i2c_irq_send()
1940 writel(control32, priv->slv->io + MLXBF_I2C_SMBUS_SLAVE_GW); in mlxbf_i2c_irq_send()
1950 writel(0x0, priv->slv->io + MLXBF_I2C_SMBUS_SLAVE_RS_MASTER_BYTES); in mlxbf_i2c_irq_send()
1951 writel(0x0, priv->slv->io + MLXBF_I2C_SMBUS_SLAVE_PEC); in mlxbf_i2c_irq_send()
1952 writel(0x1, priv->slv->io + MLXBF_I2C_SMBUS_SLAVE_READY); in mlxbf_i2c_irq_send()
1958 * Receive bytes from 'external' smbus master. This function is executed when
1959 * an external smbus master wants to write data to the BlueField.
1979 ret = -EINVAL; in mlxbf_i2c_irq_recv()
1984 * Notify the slave backend that an smbus master wants to write data in mlxbf_i2c_irq_recv()
2006 writel(0x0, priv->slv->io + MLXBF_I2C_SMBUS_SLAVE_RS_MASTER_BYTES); in mlxbf_i2c_irq_recv()
2007 writel(0x0, priv->slv->io + MLXBF_I2C_SMBUS_SLAVE_PEC); in mlxbf_i2c_irq_recv()
2008 writel(0x1, priv->slv->io + MLXBF_I2C_SMBUS_SLAVE_READY); in mlxbf_i2c_irq_recv()
2024 * - Receive data and send response to master. in mlxbf_i2c_irq()
2025 * - Send data and release slave GW. in mlxbf_i2c_irq()
2038 * bytes from/to master. These are defined by 8-bits each. If the lower in mlxbf_i2c_irq()
2043 rw_bytes_reg = readl(priv->slv->io + in mlxbf_i2c_irq()
2054 * specified in the SMBus standard, block transactions cannot exceed in mlxbf_i2c_irq()
2087 dev_dbg(&adap->dev, "smbus quick, slave 0x%02x\n", addr); in mlxbf_i2c_smbus_xfer()
2092 read ? &data->byte : &command, read, in mlxbf_i2c_smbus_xfer()
2094 dev_dbg(&adap->dev, "smbus %s byte, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2099 mlxbf_i2c_smbus_data_byte_func(&request, &command, &data->byte, in mlxbf_i2c_smbus_xfer()
2101 dev_dbg(&adap->dev, "smbus %s byte data at 0x%02x, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2107 (u8 *)&data->word, read, pec); in mlxbf_i2c_smbus_xfer()
2108 dev_dbg(&adap->dev, "smbus %s word data at 0x%02x, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2113 byte_cnt = data->block[0]; in mlxbf_i2c_smbus_xfer()
2114 mlxbf_i2c_smbus_i2c_block_func(&request, &command, data->block, in mlxbf_i2c_smbus_xfer()
2116 dev_dbg(&adap->dev, "i2c %s block data, %d bytes at 0x%02x, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2121 byte_cnt = read ? I2C_SMBUS_BLOCK_MAX : data->block[0]; in mlxbf_i2c_smbus_xfer()
2122 mlxbf_i2c_smbus_block_func(&request, &command, data->block, in mlxbf_i2c_smbus_xfer()
2124 dev_dbg(&adap->dev, "smbus %s block data, %d bytes at 0x%02x, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2130 (u8 *)&data->word, pec); in mlxbf_i2c_smbus_xfer()
2131 dev_dbg(&adap->dev, "process call, wr/rd at 0x%02x, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2136 byte_cnt = data->block[0]; in mlxbf_i2c_smbus_xfer()
2138 data->block, &byte_cnt, in mlxbf_i2c_smbus_xfer()
2140 dev_dbg(&adap->dev, "block process call, wr/rd %d bytes, slave 0x%02x.\n", in mlxbf_i2c_smbus_xfer()
2145 dev_dbg(&adap->dev, "Unsupported I2C/SMBus command %d\n", in mlxbf_i2c_smbus_xfer()
2147 return -EOPNOTSUPP; in mlxbf_i2c_smbus_xfer()
2157 struct mlxbf_i2c_priv *priv = i2c_get_adapdata(slave->adapter); in mlxbf_i2c_reg_slave()
2158 struct device *dev = &slave->dev; in mlxbf_i2c_reg_slave()
2165 if (slave->flags & (I2C_CLIENT_TEN | I2C_CLIENT_PEC)) { in mlxbf_i2c_reg_slave()
2166 dev_err(dev, "SMBus PEC and 10 bit address not supported\n"); in mlxbf_i2c_reg_slave()
2167 return -EAFNOSUPPORT; in mlxbf_i2c_reg_slave()
2179 struct mlxbf_i2c_priv *priv = i2c_get_adapdata(slave->adapter); in mlxbf_i2c_unreg_slave()
2180 struct device *dev = &slave->dev; in mlxbf_i2c_unreg_slave()
2186 * 2) Freeing priv->slave at the corresponding index in mlxbf_i2c_unreg_slave()
2188 ret = mlxbf_i2c_slave_disable(priv, slave->addr); in mlxbf_i2c_unreg_slave()
2190 dev_err(dev, "Unable to find slave 0x%x\n", slave->addr); in mlxbf_i2c_unreg_slave()
2260 return -ENOENT; in mlxbf_i2c_acpi_probe()
2264 return -ENODEV; in mlxbf_i2c_acpi_probe()
2266 priv->chip = (struct mlxbf_i2c_chip_info *)aid->driver_data; in mlxbf_i2c_acpi_probe()
2274 priv->bus = bus_id; in mlxbf_i2c_acpi_probe()
2281 struct device *dev = &pdev->dev; in mlxbf_i2c_probe()
2289 return -ENOMEM; in mlxbf_i2c_probe()
2297 * Starting BlueField-3 SoC, the "smbus" resource was broken down into 3 in mlxbf_i2c_probe()
2303 priv->resource_version = resource_version; in mlxbf_i2c_probe()
2305 if (priv->chip->type < MLXBF_I2C_CHIP_TYPE_3 && resource_version == 0) { in mlxbf_i2c_probe()
2306 priv->timer = devm_kzalloc(dev, sizeof(struct mlxbf_i2c_resource), GFP_KERNEL); in mlxbf_i2c_probe()
2307 if (!priv->timer) in mlxbf_i2c_probe()
2308 return -ENOMEM; in mlxbf_i2c_probe()
2310 priv->mst = devm_kzalloc(dev, sizeof(struct mlxbf_i2c_resource), GFP_KERNEL); in mlxbf_i2c_probe()
2311 if (!priv->mst) in mlxbf_i2c_probe()
2312 return -ENOMEM; in mlxbf_i2c_probe()
2314 priv->slv = devm_kzalloc(dev, sizeof(struct mlxbf_i2c_resource), GFP_KERNEL); in mlxbf_i2c_probe()
2315 if (!priv->slv) in mlxbf_i2c_probe()
2316 return -ENOMEM; in mlxbf_i2c_probe()
2318 ret = mlxbf_i2c_init_resource(pdev, &priv->smbus, in mlxbf_i2c_probe()
2321 return dev_err_probe(dev, ret, "Cannot fetch smbus resource info"); in mlxbf_i2c_probe()
2323 priv->timer->io = priv->smbus->io; in mlxbf_i2c_probe()
2324 priv->mst->io = priv->smbus->io + MLXBF_I2C_MST_ADDR_OFFSET; in mlxbf_i2c_probe()
2325 priv->slv->io = priv->smbus->io + MLXBF_I2C_SLV_ADDR_OFFSET; in mlxbf_i2c_probe()
2327 ret = mlxbf_i2c_init_resource(pdev, &priv->timer, in mlxbf_i2c_probe()
2332 ret = mlxbf_i2c_init_resource(pdev, &priv->mst, in mlxbf_i2c_probe()
2337 ret = mlxbf_i2c_init_resource(pdev, &priv->slv, in mlxbf_i2c_probe()
2343 ret = mlxbf_i2c_init_resource(pdev, &priv->mst_cause, in mlxbf_i2c_probe()
2348 ret = mlxbf_i2c_init_resource(pdev, &priv->slv_cause, in mlxbf_i2c_probe()
2353 adap = &priv->adap; in mlxbf_i2c_probe()
2354 adap->owner = THIS_MODULE; in mlxbf_i2c_probe()
2355 adap->class = I2C_CLASS_HWMON; in mlxbf_i2c_probe()
2356 adap->algo = &mlxbf_i2c_algo; in mlxbf_i2c_probe()
2357 adap->quirks = &mlxbf_i2c_quirks; in mlxbf_i2c_probe()
2358 adap->dev.parent = dev; in mlxbf_i2c_probe()
2359 adap->dev.of_node = dev->of_node; in mlxbf_i2c_probe()
2360 adap->nr = priv->bus; in mlxbf_i2c_probe()
2362 snprintf(adap->name, sizeof(adap->name), "i2c%d", adap->nr); in mlxbf_i2c_probe()
2370 priv->frequency = MLXBF_I2C_COREPLL_FREQ; in mlxbf_i2c_probe()
2383 return dev_err_probe(dev, ret, "failed to initialize smbus master %d", in mlxbf_i2c_probe()
2384 priv->bus); in mlxbf_i2c_probe()
2399 priv->irq = irq; in mlxbf_i2c_probe()
2417 struct device *dev = &pdev->dev; in mlxbf_i2c_remove()
2420 if (priv->chip->type < MLXBF_I2C_CHIP_TYPE_3 && priv->resource_version == 0) { in mlxbf_i2c_remove()
2421 params = priv->smbus->params; in mlxbf_i2c_remove()
2422 devm_release_mem_region(dev, params->start, resource_size(params)); in mlxbf_i2c_remove()
2424 params = priv->timer->params; in mlxbf_i2c_remove()
2425 devm_release_mem_region(dev, params->start, resource_size(params)); in mlxbf_i2c_remove()
2427 params = priv->mst->params; in mlxbf_i2c_remove()
2428 devm_release_mem_region(dev, params->start, resource_size(params)); in mlxbf_i2c_remove()
2430 params = priv->slv->params; in mlxbf_i2c_remove()
2431 devm_release_mem_region(dev, params->start, resource_size(params)); in mlxbf_i2c_remove()
2434 params = priv->mst_cause->params; in mlxbf_i2c_remove()
2435 devm_release_mem_region(dev, params->start, resource_size(params)); in mlxbf_i2c_remove()
2437 params = priv->slv_cause->params; in mlxbf_i2c_remove()
2438 devm_release_mem_region(dev, params->start, resource_size(params)); in mlxbf_i2c_remove()
2445 if (--mlxbf_i2c_bus_count == 0) { in mlxbf_i2c_remove()
2452 devm_free_irq(dev, priv->irq, priv); in mlxbf_i2c_remove()
2454 i2c_del_adapter(&priv->adap); in mlxbf_i2c_remove()
2461 .name = "i2c-mlxbf",