1 // SPDX-License-Identifier: GPL-2.0
6  * Copyright (C) 2021 - 2022 Microchip Technology Inc.
15 #include <linux/i2c-smbus.h>
49  * baud clock required to program 'Hold Time' at X KHz.
65  * the baud clock required to program 'fair idle delay' at X KHz. Fair idle
74  * baud clock required to satisfy the fairness protocol at X KHz.
103  * BUS_CLK_XK_LOW_PERIOD_TICKS field defines the number of I2C Baud Clock
104  * periods that make up the low phase of the I2C/SMBus bus clock at X KHz.
111  * BUS_CLK_XK_HIGH_PERIOD_TICKS field defines the number of I2C Baud Clock
112  * periods that make up the high phase of the I2C/SMBus bus clock at X KHz.
128  * CLK_SYNC_XK defines the number of clock cycles to sync up to the external
129  * clock before comparing the internal and external clocks for clock stretching
141  * clock required to program 'FIRST_START_HOLD' timer at X KHz. This timer
150  * STOP_SETUP_XK_TICKS will indicate the number of ticks of the baud clock
159  * RESTART_SETUP_XK_TICKS will indicate the number of ticks of the baud clock
168  * DATA_HOLD_XK_TICKS will indicate the number of ticks of the baud clock
198  * CTRL_CUM_TIME_OUT_XK_TICKS defines SMBus Controller Cumulative Time-Out.
199  * SMBus Controller Cumulative Time-Out duration =
207  * TARGET_CUM_TIME_OUT_XK_TICKS defines SMBus Target Cumulative Time-Out duration.
208  * SMBus Target Cumulative Time-Out duration = TARGET_CUM_TIME_OUT_XK_TICKS[7:0] x
216  * CLOCK_HIGH_TIME_OUT_XK defines Clock High time out period.
217  * Clock High time out period = CLOCK_HIGH_TIME_OUT_XK[7:0] x Baud_Clock_Period x 8
336 	void __iomem *p = i2c->i2c_base + SMB_GPR_LOCK_REG;  in set_sys_lock()
342 		return -EPERM;  in set_sys_lock()
349 	void __iomem *p = i2c->i2c_base + SMB_GPR_LOCK_REG;  in release_sys_lock()
359 		return -EPERM;  in release_sys_lock()
366 	writew(intr_msk, i2c->i2c_base + SMBUS_GEN_INT_STAT_REG_OFF);  in pci1xxxx_ack_high_level_intr()
372 	void __iomem *p = i2c->i2c_base + SMBALERT_MST_PAD_CTRL_REG_OFF;  in pci1xxxx_i2c_configure_smbalert_pin()
387 	void __iomem *p = i2c->i2c_base + SMB_CORE_CMD_REG_OFF1;  in pci1xxxx_i2c_send_start_stop()
414 	writeb(regval, i2c->i2c_base + SMB_CORE_CTRL_REG_OFF);  in pci1xxxx_i2c_set_clear_FW_ACK()
420 	void __iomem *p = i2c->i2c_base + SMBUS_MST_BUF;  in pci1xxxx_i2c_buffer_write()
436 	writeb(SMB_CORE_CTRL_ESO, i2c->i2c_base + SMB_CORE_CTRL_REG_OFF);  in pci1xxxx_i2c_enable_ESO()
441 	void __iomem *p = i2c->i2c_base + SMBUS_CONTROL_REG_OFF;  in pci1xxxx_i2c_reset_counters()
449 static void pci1xxxx_i2c_set_transfer_dir(struct pci1xxxx_i2c *i2c, u8 direction)  in pci1xxxx_i2c_set_transfer_dir()  argument
451 	void __iomem *p = i2c->i2c_base + SMBUS_CONTROL_REG_OFF;  in pci1xxxx_i2c_set_transfer_dir()
455 	if (direction == I2C_DIRN_WRITE)  in pci1xxxx_i2c_set_transfer_dir()
465 	writeb(count, i2c->i2c_base + SMBUS_MCU_COUNTER_REG_OFF);  in pci1xxxx_i2c_set_mcu_count()
470 	writeb(readcount, i2c->i2c_base + SMB_CORE_CMD_REG_OFF3);  in pci1xxxx_i2c_set_read_count()
475 	writeb(writecount, i2c->i2c_base + SMB_CORE_CMD_REG_OFF2);  in pci1xxxx_i2c_set_write_count()
480 	void __iomem *p = i2c->i2c_base + SMBUS_CONTROL_REG_OFF;  in pci1xxxx_i2c_set_DMA_run()
490 	void __iomem *p = i2c->i2c_base + SMB_CORE_CMD_REG_OFF0;  in pci1xxxx_i2c_set_mrun_proceed()
507 	void __iomem *p = i2c->i2c_base + SMB_CORE_CONFIG_REG1;  in pci1xxxx_i2c_config_asr()
521 	void __iomem *p1 = i2c->i2c_base + SMBUS_GEN_INT_STAT_REG_OFF;  in pci1xxxx_i2c_isr()
522 	void __iomem *p2 = i2c->i2c_base + SMBUS_INTR_STAT_REG_OFF;  in pci1xxxx_i2c_isr()
536 			complete(&i2c->i2c_xfer_done);  in pci1xxxx_i2c_isr()
561 	void __iomem *p = i2c->i2c_base + SMB_CORE_CMD_REG_OFF1;  in pci1xxxx_i2c_set_readm()
575 	writeb(ack_intr_msk, i2c->i2c_base + SMBUS_INTR_STAT_REG_OFF);  in pci1xxxx_ack_nw_layer_intr()
581 	void __iomem *p = i2c->i2c_base + SMBUS_INTR_MSK_REG_OFF;  in pci1xxxx_config_nw_layer_intr()
595 	void __iomem *p1 = i2c->i2c_base + I2C_SCL_PAD_CTRL_REG_OFF;  in pci1xxxx_i2c_config_padctrl()
596 	void __iomem *p2 = i2c->i2c_base + I2C_SDA_PAD_CTRL_REG_OFF;  in pci1xxxx_i2c_config_padctrl()
618 	void __iomem *p = i2c->i2c_base + SMBUS_CONTROL_REG_OFF;  in pci1xxxx_i2c_set_mode()
622 	if (i2c->flags & I2C_FLAGS_DIRECT_MODE)  in pci1xxxx_i2c_set_mode()
633 	void __iomem *p = i2c->i2c_base + SMBUS_GEN_INT_MASK_REG_OFF;  in pci1xxxx_i2c_config_high_level_intr()
646 	void __iomem *p1 = i2c->i2c_base + SMB_CORE_CONFIG_REG1;  in pci1xxxx_i2c_configure_core_reg()
647 	void __iomem *p3 = i2c->i2c_base + SMB_CORE_CONFIG_REG3;  in pci1xxxx_i2c_configure_core_reg()
667 	void __iomem *bp = i2c->i2c_base;  in pci1xxxx_i2c_set_freq()
675 	switch (i2c->freq) {  in pci1xxxx_i2c_set_freq()
708 	void __iomem *p2 = i2c->i2c_base + SMBUS_STATUS_REG_OFF;  in pci1xxxx_i2c_init()
709 	void __iomem *p1 = i2c->i2c_base + SMB_GPR_REG;  in pci1xxxx_i2c_init()
714 	if (ret == -EPERM) {  in pci1xxxx_i2c_init()
727 		i2c->freq = I2C_MAX_FAST_MODE_FREQ;  in pci1xxxx_i2c_init()
731 		i2c->freq = I2C_MAX_STANDARD_MODE_FREQ;  in pci1xxxx_i2c_init()
735 		i2c->freq = I2C_MAX_FAST_MODE_PLUS_FREQ;  in pci1xxxx_i2c_init()
744 	i2c->flags |= I2C_FLAGS_DIRECT_MODE;  in pci1xxxx_i2c_init()
757 	 * Enable pull-up for the SMB alert pin which is just used for  in pci1xxxx_i2c_init()
772 	writeb(regval, i2c->i2c_base + SMB_CORE_COMPLETION_REG_OFF3);  in pci1xxxx_i2c_clear_flags()
773 	reinit_completion(&i2c->i2c_xfer_done);  in pci1xxxx_i2c_clear_flags()
781 	void __iomem *p2 = i2c->i2c_base + SMB_CORE_COMPLETION_REG_OFF3;  in pci1xxxx_i2c_read()
782 	void __iomem *p1 = i2c->i2c_base + SMB_CORE_CMD_REG_OFF1;  in pci1xxxx_i2c_read()
783 	void __iomem *p3 = i2c->i2c_base + SMBUS_MST_BUF;  in pci1xxxx_i2c_read()
805 	 * buffer direction and run the DMA to initiate Read from slave.  in pci1xxxx_i2c_read()
814 		remainingbytes = total_len - count;  in pci1xxxx_i2c_read()
827 		    (i2c->flags & I2C_FLAGS_STOP)) {  in pci1xxxx_i2c_read()
850 			if (i2c->flags & I2C_FLAGS_SMB_BLK_READ)  in pci1xxxx_i2c_read()
863 		time_left = wait_for_completion_timeout(&i2c->i2c_xfer_done,  in pci1xxxx_i2c_read()
868 			retval = -ETIMEDOUT;  in pci1xxxx_i2c_read()
878 			retval = -ETIMEDOUT;  in pci1xxxx_i2c_read()
882 		if (i2c->flags & I2C_FLAGS_SMB_BLK_READ) {  in pci1xxxx_i2c_read()
902 	void __iomem *p2 = i2c->i2c_base + SMB_CORE_COMPLETION_REG_OFF3;  in pci1xxxx_i2c_write()
903 	void __iomem *p1 = i2c->i2c_base + SMB_CORE_CMD_REG_OFF1;  in pci1xxxx_i2c_write()
915 	/* Set the Buffer direction. */  in pci1xxxx_i2c_write()
931 		remainingbytes = total_len - count;  in pci1xxxx_i2c_write()
937 			/* -1 for the slave address. */  in pci1xxxx_i2c_write()
938 			transferlen = min_t(u16, SMBUS_BUF_MAX_SIZE - 1,  in pci1xxxx_i2c_write()
960 		   (i2c->flags & I2C_FLAGS_STOP))  in pci1xxxx_i2c_write()
968 		time_left = wait_for_completion_timeout(&i2c->i2c_xfer_done,  in pci1xxxx_i2c_write()
973 			retval = -ETIMEDOUT;  in pci1xxxx_i2c_write()
980 			retval = -ETIMEDOUT;  in pci1xxxx_i2c_write()
1000 	i2c->i2c_xfer_in_progress = true;  in pci1xxxx_i2c_xfer()
1008 		if ((i == num - 1) || (msgs[i].flags & I2C_M_STOP))  in pci1xxxx_i2c_xfer()
1009 			i2c->flags |= I2C_FLAGS_STOP;  in pci1xxxx_i2c_xfer()
1011 			i2c->flags &= ~I2C_FLAGS_STOP;  in pci1xxxx_i2c_xfer()
1014 			i2c->flags |= I2C_FLAGS_SMB_BLK_READ;  in pci1xxxx_i2c_xfer()
1016 			i2c->flags &= ~I2C_FLAGS_SMB_BLK_READ;  in pci1xxxx_i2c_xfer()
1028 	i2c->i2c_xfer_in_progress = false;  in pci1xxxx_i2c_xfer()
1069 	void __iomem *p = i2c->i2c_base + SMBUS_RESET_REG;  in pci1xxxx_i2c_suspend()
1073 	i2c_mark_adapter_suspended(&i2c->adap);  in pci1xxxx_i2c_suspend()
1076 	 * If the system is put into 'suspend' state when the I2C transfer is in  in pci1xxxx_i2c_suspend()
1079 	while (i2c->i2c_xfer_in_progress)  in pci1xxxx_i2c_suspend()
1102 	void __iomem *p1 = i2c->i2c_base + SMBUS_GEN_INT_STAT_REG_OFF;  in pci1xxxx_i2c_resume()
1103 	void __iomem *p2 = i2c->i2c_base + SMBUS_RESET_REG;  in pci1xxxx_i2c_resume()
1113 	i2c_mark_adapter_resumed(&i2c->adap);  in pci1xxxx_i2c_resume()
1132 	struct device *dev = &pdev->dev;  in pci1xxxx_i2c_probe_pci()
1138 		return -ENOMEM;  in pci1xxxx_i2c_probe_pci()
1141 	i2c->i2c_xfer_in_progress = false;  in pci1xxxx_i2c_probe_pci()
1157 	i2c->i2c_base =	pcim_iomap_table(pdev)[0];  in pci1xxxx_i2c_probe_pci()
1158 	init_completion(&i2c->i2c_xfer_done);  in pci1xxxx_i2c_probe_pci()
1174 	i2c->adap = pci1xxxx_i2c_ops;  in pci1xxxx_i2c_probe_pci()
1175 	i2c->adap.dev.parent = dev;  in pci1xxxx_i2c_probe_pci()
1177 	snprintf(i2c->adap.name, sizeof(i2c->adap.name),  in pci1xxxx_i2c_probe_pci()
1180 	i2c_set_adapdata(&i2c->adap, i2c);  in pci1xxxx_i2c_probe_pci()
1182 	ret = devm_i2c_add_adapter(dev, &i2c->adap);  in pci1xxxx_i2c_probe_pci()
1200 	.name		= "i2c-mchp-pci1xxxx",