Lines Matching +full:i2c +full:- +full:sda +full:- +full:hold +full:- +full:time +full:- +full:ns
1 // SPDX-License-Identifier: GPL-2.0-only
3 * This driver implements I2C master functionality using the LSI API2C
7 * maximum 255 bytes at a time. If a larger transfer is attempted, error code
8 * (-EINVAL) is returned.
14 #include <linux/i2c.h>
84 #define SLV_ADDR_DEC_SA1M BIT(3) /* 10-bit addressing for addr_1 enabled */
86 #define SLV_ADDR_DEC_SA2M BIT(5) /* 10-bit addressing for addr_2 enabled */
121 * struct axxia_i2c_dev - I2C device context
130 * @adapter: core i2c abstraction
131 * @i2c_clk: clock reference for i2c input clock
132 * @bus_clk_rate: current i2c bus clock rate
158 int_en = readl(idev->base + MST_INT_ENABLE); in i2c_int_disable()
159 writel(int_en & ~mask, idev->base + MST_INT_ENABLE); in i2c_int_disable()
166 int_en = readl(idev->base + MST_INT_ENABLE); in i2c_int_enable()
167 writel(int_en | mask, idev->base + MST_INT_ENABLE); in i2c_int_enable()
171 * ns_to_clk - Convert time (ns) to clock cycles for the given clock frequency.
173 static u32 ns_to_clk(u64 ns, u32 clk_mhz) in ns_to_clk() argument
175 return div_u64(ns * clk_mhz, 1000); in ns_to_clk()
180 u32 divisor = clk_get_rate(idev->i2c_clk) / idev->bus_clk_rate; in axxia_i2c_init()
181 u32 clk_mhz = clk_get_rate(idev->i2c_clk) / 1000000; in axxia_i2c_init()
188 dev_dbg(idev->dev, "rate=%uHz per_clk=%uMHz -> ratio=1:%u\n", in axxia_i2c_init()
189 idev->bus_clk_rate, clk_mhz, divisor); in axxia_i2c_init()
192 writel(0x01, idev->base + SOFT_RESET); in axxia_i2c_init()
194 while (readl(idev->base + SOFT_RESET) & 1) { in axxia_i2c_init()
196 dev_warn(idev->dev, "Soft reset failed\n"); in axxia_i2c_init()
202 writel(0x1, idev->base + GLOBAL_CONTROL); in axxia_i2c_init()
204 if (idev->bus_clk_rate <= I2C_MAX_STANDARD_MODE_FREQ) { in axxia_i2c_init()
205 /* Standard mode SCL 50/50, tSU:DAT = 250 ns */ in axxia_i2c_init()
210 /* Fast mode SCL 33/66, tSU:DAT = 100 ns */ in axxia_i2c_init()
216 /* SCL High Time */ in axxia_i2c_init()
217 writel(t_high, idev->base + SCL_HIGH_PERIOD); in axxia_i2c_init()
218 /* SCL Low Time */ in axxia_i2c_init()
219 writel(t_low, idev->base + SCL_LOW_PERIOD); in axxia_i2c_init()
220 /* SDA Setup Time */ in axxia_i2c_init()
221 writel(t_setup, idev->base + SDA_SETUP_TIME); in axxia_i2c_init()
222 /* SDA Hold Time, 300ns */ in axxia_i2c_init()
223 writel(ns_to_clk(300, clk_mhz), idev->base + SDA_HOLD_TIME); in axxia_i2c_init()
224 /* Filter <50ns spikes */ in axxia_i2c_init()
225 writel(ns_to_clk(50, clk_mhz), idev->base + SPIKE_FLTR_LEN); in axxia_i2c_init()
227 /* Configure Time-Out Registers */ in axxia_i2c_init()
230 /* Find prescaler value that makes tmo_clk fit in 15-bits counter. */ in axxia_i2c_init()
240 writel(prescale, idev->base + TIMER_CLOCK_DIV); in axxia_i2c_init()
242 writel(WT_EN | WT_VALUE(tmo_clk), idev->base + WAIT_TIMER_CONTROL); in axxia_i2c_init()
248 writel(0x01, idev->base + INTERRUPT_ENABLE); in axxia_i2c_init()
255 return (msg->flags & I2C_M_RD) != 0; in i2c_m_rd()
260 return (msg->flags & I2C_M_TEN) != 0; in i2c_m_ten()
265 return (msg->flags & I2C_M_RECV_LEN) != 0; in i2c_m_recv_len()
269 * axxia_i2c_empty_rx_fifo - Fetch data from RX FIFO and update SMBus block
274 struct i2c_msg *msg = idev->msg_r; in axxia_i2c_empty_rx_fifo()
275 size_t rx_fifo_avail = readl(idev->base + MST_RX_FIFO); in axxia_i2c_empty_rx_fifo()
276 int bytes_to_transfer = min(rx_fifo_avail, msg->len - idev->msg_xfrd_r); in axxia_i2c_empty_rx_fifo()
278 while (bytes_to_transfer-- > 0) { in axxia_i2c_empty_rx_fifo()
279 int c = readl(idev->base + MST_DATA); in axxia_i2c_empty_rx_fifo()
281 if (idev->msg_xfrd_r == 0 && i2c_m_recv_len(msg)) { in axxia_i2c_empty_rx_fifo()
286 idev->msg_err = -EPROTO; in axxia_i2c_empty_rx_fifo()
288 complete(&idev->msg_complete); in axxia_i2c_empty_rx_fifo()
291 msg->len = 1 + c; in axxia_i2c_empty_rx_fifo()
292 writel(msg->len, idev->base + MST_RX_XFER); in axxia_i2c_empty_rx_fifo()
294 msg->buf[idev->msg_xfrd_r++] = c; in axxia_i2c_empty_rx_fifo()
301 * axxia_i2c_fill_tx_fifo - Fill TX FIFO from current message buffer.
306 struct i2c_msg *msg = idev->msg; in axxia_i2c_fill_tx_fifo()
307 size_t tx_fifo_avail = FIFO_SIZE - readl(idev->base + MST_TX_FIFO); in axxia_i2c_fill_tx_fifo()
308 int bytes_to_transfer = min(tx_fifo_avail, msg->len - idev->msg_xfrd); in axxia_i2c_fill_tx_fifo()
309 int ret = msg->len - idev->msg_xfrd - bytes_to_transfer; in axxia_i2c_fill_tx_fifo()
311 while (bytes_to_transfer-- > 0) in axxia_i2c_fill_tx_fifo()
312 writel(msg->buf[idev->msg_xfrd++], idev->base + MST_DATA); in axxia_i2c_fill_tx_fifo()
319 u32 fifo_status = readl(idev->base + SLV_RX_FIFO); in axxia_i2c_slv_fifo_event()
322 dev_dbg(idev->dev, "slave irq fifo_status=0x%x\n", fifo_status); in axxia_i2c_slv_fifo_event()
326 i2c_slave_event(idev->slave, in axxia_i2c_slv_fifo_event()
329 val = readl(idev->base + SLV_DATA); in axxia_i2c_slv_fifo_event()
330 i2c_slave_event(idev->slave, I2C_SLAVE_WRITE_RECEIVED, &val); in axxia_i2c_slv_fifo_event()
333 readl(idev->base + SLV_DATA); /* dummy read */ in axxia_i2c_slv_fifo_event()
334 i2c_slave_event(idev->slave, I2C_SLAVE_STOP, &val); in axxia_i2c_slv_fifo_event()
337 readl(idev->base + SLV_DATA); /* dummy read */ in axxia_i2c_slv_fifo_event()
342 u32 status = readl(idev->base + SLV_INT_STATUS); in axxia_i2c_slv_isr()
345 dev_dbg(idev->dev, "slave irq status=0x%x\n", status); in axxia_i2c_slv_isr()
350 i2c_slave_event(idev->slave, I2C_SLAVE_READ_REQUESTED, &val); in axxia_i2c_slv_isr()
351 writel(val, idev->base + SLV_DATA); in axxia_i2c_slv_isr()
354 i2c_slave_event(idev->slave, I2C_SLAVE_READ_PROCESSED, &val); in axxia_i2c_slv_isr()
355 writel(val, idev->base + SLV_DATA); in axxia_i2c_slv_isr()
358 i2c_slave_event(idev->slave, I2C_SLAVE_STOP, &val); in axxia_i2c_slv_isr()
360 writel(INT_SLV, idev->base + INTERRUPT_STATUS); in axxia_i2c_slv_isr()
370 status = readl(idev->base + INTERRUPT_STATUS); in axxia_i2c_isr()
378 status = readl(idev->base + MST_INT_STATUS); in axxia_i2c_isr()
380 if (!idev->msg) { in axxia_i2c_isr()
381 dev_warn(idev->dev, "unexpected interrupt\n"); in axxia_i2c_isr()
386 if (i2c_m_rd(idev->msg_r) && (status & MST_STATUS_RFL)) in axxia_i2c_isr()
390 if (!i2c_m_rd(idev->msg) && (status & MST_STATUS_TFL)) { in axxia_i2c_isr()
399 idev->msg_err = -EAGAIN; in axxia_i2c_isr()
401 idev->msg_err = -ENXIO; in axxia_i2c_isr()
403 idev->msg_err = -EIO; in axxia_i2c_isr()
404 dev_dbg(idev->dev, "error %#x, addr=%#x rx=%u/%u tx=%u/%u\n", in axxia_i2c_isr()
406 idev->msg->addr, in axxia_i2c_isr()
407 readl(idev->base + MST_RX_BYTES_XFRD), in axxia_i2c_isr()
408 readl(idev->base + MST_RX_XFER), in axxia_i2c_isr()
409 readl(idev->base + MST_TX_BYTES_XFRD), in axxia_i2c_isr()
410 readl(idev->base + MST_TX_XFER)); in axxia_i2c_isr()
411 complete(&idev->msg_complete); in axxia_i2c_isr()
415 complete(&idev->msg_complete); in axxia_i2c_isr()
418 int mask = idev->last ? ~0 : ~MST_STATUS_TSS; in axxia_i2c_isr()
421 if (i2c_m_rd(idev->msg_r) && idev->msg_xfrd_r < idev->msg_r->len) in axxia_i2c_isr()
423 complete(&idev->msg_complete); in axxia_i2c_isr()
426 idev->msg_err = -ETIMEDOUT; in axxia_i2c_isr()
428 complete(&idev->msg_complete); in axxia_i2c_isr()
433 writel(INT_MST, idev->base + INTERRUPT_STATUS); in axxia_i2c_isr()
443 /* 10-bit address in axxia_i2c_set_addr()
447 addr_1 = 0xF0 | ((msg->addr >> 7) & 0x06); in axxia_i2c_set_addr()
450 addr_2 = msg->addr & 0xFF; in axxia_i2c_set_addr()
452 /* 7-bit address in axxia_i2c_set_addr()
460 writel(addr_1, idev->base + MST_ADDR_1); in axxia_i2c_set_addr()
461 writel(addr_2, idev->base + MST_ADDR_2); in axxia_i2c_set_addr()
473 if ((readl(idev->base + MST_COMMAND) & CMD_BUSY) == 0) in axxia_i2c_handle_seq_nak()
478 return -ETIMEDOUT; in axxia_i2c_handle_seq_nak()
489 writel(msgs[0].len, idev->base + MST_TX_XFER); in axxia_i2c_xfer_seq()
490 writel(rlen, idev->base + MST_RX_XFER); in axxia_i2c_xfer_seq()
492 idev->msg = &msgs[0]; in axxia_i2c_xfer_seq()
493 idev->msg_r = &msgs[1]; in axxia_i2c_xfer_seq()
494 idev->msg_xfrd = 0; in axxia_i2c_xfer_seq()
495 idev->msg_xfrd_r = 0; in axxia_i2c_xfer_seq()
496 idev->last = true; in axxia_i2c_xfer_seq()
499 writel(CMD_SEQUENCE, idev->base + MST_COMMAND); in axxia_i2c_xfer_seq()
501 reinit_completion(&idev->msg_complete); in axxia_i2c_xfer_seq()
504 time_left = wait_for_completion_timeout(&idev->msg_complete, in axxia_i2c_xfer_seq()
507 if (idev->msg_err == -ENXIO) { in axxia_i2c_xfer_seq()
510 } else if (readl(idev->base + MST_COMMAND) & CMD_BUSY) { in axxia_i2c_xfer_seq()
511 dev_warn(idev->dev, "busy after xfer\n"); in axxia_i2c_xfer_seq()
515 idev->msg_err = -ETIMEDOUT; in axxia_i2c_xfer_seq()
516 i2c_recover_bus(&idev->adapter); in axxia_i2c_xfer_seq()
520 if (unlikely(idev->msg_err) && idev->msg_err != -ENXIO) in axxia_i2c_xfer_seq()
523 return idev->msg_err; in axxia_i2c_xfer_seq()
534 idev->msg = msg; in axxia_i2c_xfer_msg()
535 idev->msg_r = msg; in axxia_i2c_xfer_msg()
536 idev->msg_xfrd = 0; in axxia_i2c_xfer_msg()
537 idev->msg_xfrd_r = 0; in axxia_i2c_xfer_msg()
538 idev->last = last; in axxia_i2c_xfer_msg()
539 reinit_completion(&idev->msg_complete); in axxia_i2c_xfer_msg()
544 /* I2C read transfer */ in axxia_i2c_xfer_msg()
545 rx_xfer = i2c_m_recv_len(msg) ? I2C_SMBUS_BLOCK_MAX : msg->len; in axxia_i2c_xfer_msg()
548 /* I2C write transfer */ in axxia_i2c_xfer_msg()
550 tx_xfer = msg->len; in axxia_i2c_xfer_msg()
553 writel(rx_xfer, idev->base + MST_RX_XFER); in axxia_i2c_xfer_msg()
554 writel(tx_xfer, idev->base + MST_TX_XFER); in axxia_i2c_xfer_msg()
561 wt_value = WT_VALUE(readl(idev->base + WAIT_TIMER_CONTROL)); in axxia_i2c_xfer_msg()
563 writel(wt_value, idev->base + WAIT_TIMER_CONTROL); in axxia_i2c_xfer_msg()
565 if (idev->msg_err) in axxia_i2c_xfer_msg()
569 writel(CMD_MANUAL, idev->base + MST_COMMAND); in axxia_i2c_xfer_msg()
572 writel(CMD_AUTO, idev->base + MST_COMMAND); in axxia_i2c_xfer_msg()
576 writel(WT_EN | wt_value, idev->base + WAIT_TIMER_CONTROL); in axxia_i2c_xfer_msg()
580 time_left = wait_for_completion_timeout(&idev->msg_complete, in axxia_i2c_xfer_msg()
585 if (readl(idev->base + MST_COMMAND) & CMD_BUSY) in axxia_i2c_xfer_msg()
586 dev_warn(idev->dev, "busy after xfer\n"); in axxia_i2c_xfer_msg()
589 idev->msg_err = -ETIMEDOUT; in axxia_i2c_xfer_msg()
590 i2c_recover_bus(&idev->adapter); in axxia_i2c_xfer_msg()
595 if (unlikely(idev->msg_err) && idev->msg_err != -ENXIO && in axxia_i2c_xfer_msg()
596 idev->msg_err != -ETIMEDOUT) in axxia_i2c_xfer_msg()
599 return idev->msg_err; in axxia_i2c_xfer_msg()
604 * write of non-zero length followed by exactly one read of non-zero length,
621 idev->msg_err = 0; in axxia_i2c_xfer()
631 ret = axxia_i2c_xfer_msg(idev, &msgs[i], i == (num - 1)); in axxia_i2c_xfer()
640 return !!(readl(idev->base + I2C_BUS_MONITOR) & BM_SCLS); in axxia_i2c_get_scl()
648 /* Preserve SDA Control */ in axxia_i2c_set_scl()
649 tmp = readl(idev->base + I2C_BUS_MONITOR) & BM_SDAC; in axxia_i2c_set_scl()
652 writel(tmp, idev->base + I2C_BUS_MONITOR); in axxia_i2c_set_scl()
659 return !!(readl(idev->base + I2C_BUS_MONITOR) & BM_SDAS); in axxia_i2c_get_sda()
678 struct axxia_i2c_dev *idev = i2c_get_adapdata(slave->adapter); in axxia_i2c_reg_slave()
682 if (idev->slave) in axxia_i2c_reg_slave()
683 return -EBUSY; in axxia_i2c_reg_slave()
685 idev->slave = slave; in axxia_i2c_reg_slave()
688 writel(GLOBAL_MST_EN | GLOBAL_SLV_EN, idev->base + GLOBAL_CONTROL); in axxia_i2c_reg_slave()
689 writel(INT_MST | INT_SLV, idev->base + INTERRUPT_ENABLE); in axxia_i2c_reg_slave()
693 if (slave->flags & I2C_CLIENT_TEN) in axxia_i2c_reg_slave()
696 writel(SLV_RX_ACSA1, idev->base + SLV_RX_CTL); in axxia_i2c_reg_slave()
697 writel(dec_ctl, idev->base + SLV_ADDR_DEC_CTL); in axxia_i2c_reg_slave()
698 writel(slave->addr, idev->base + SLV_ADDR_1); in axxia_i2c_reg_slave()
703 writel(slv_int_mask, idev->base + SLV_INT_ENABLE); in axxia_i2c_reg_slave()
710 struct axxia_i2c_dev *idev = i2c_get_adapdata(slave->adapter); in axxia_i2c_unreg_slave()
713 writel(GLOBAL_MST_EN, idev->base + GLOBAL_CONTROL); in axxia_i2c_unreg_slave()
714 writel(INT_MST, idev->base + INTERRUPT_ENABLE); in axxia_i2c_unreg_slave()
716 synchronize_irq(idev->irq); in axxia_i2c_unreg_slave()
718 idev->slave = NULL; in axxia_i2c_unreg_slave()
737 struct device_node *np = pdev->dev.of_node; in axxia_i2c_probe()
742 idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL); in axxia_i2c_probe()
744 return -ENOMEM; in axxia_i2c_probe()
750 idev->irq = platform_get_irq(pdev, 0); in axxia_i2c_probe()
751 if (idev->irq < 0) in axxia_i2c_probe()
752 return idev->irq; in axxia_i2c_probe()
754 idev->i2c_clk = devm_clk_get(&pdev->dev, "i2c"); in axxia_i2c_probe()
755 if (IS_ERR(idev->i2c_clk)) { in axxia_i2c_probe()
756 dev_err(&pdev->dev, "missing clock\n"); in axxia_i2c_probe()
757 return PTR_ERR(idev->i2c_clk); in axxia_i2c_probe()
760 idev->base = base; in axxia_i2c_probe()
761 idev->dev = &pdev->dev; in axxia_i2c_probe()
762 init_completion(&idev->msg_complete); in axxia_i2c_probe()
764 of_property_read_u32(np, "clock-frequency", &idev->bus_clk_rate); in axxia_i2c_probe()
765 if (idev->bus_clk_rate == 0) in axxia_i2c_probe()
766 idev->bus_clk_rate = I2C_MAX_STANDARD_MODE_FREQ; /* default clock rate */ in axxia_i2c_probe()
768 ret = clk_prepare_enable(idev->i2c_clk); in axxia_i2c_probe()
770 dev_err(&pdev->dev, "failed to enable clock\n"); in axxia_i2c_probe()
776 dev_err(&pdev->dev, "failed to initialize\n"); in axxia_i2c_probe()
780 ret = devm_request_irq(&pdev->dev, idev->irq, axxia_i2c_isr, 0, in axxia_i2c_probe()
781 pdev->name, idev); in axxia_i2c_probe()
783 dev_err(&pdev->dev, "failed to claim IRQ%d\n", idev->irq); in axxia_i2c_probe()
787 i2c_set_adapdata(&idev->adapter, idev); in axxia_i2c_probe()
788 strscpy(idev->adapter.name, pdev->name, sizeof(idev->adapter.name)); in axxia_i2c_probe()
789 idev->adapter.owner = THIS_MODULE; in axxia_i2c_probe()
790 idev->adapter.algo = &axxia_i2c_algo; in axxia_i2c_probe()
791 idev->adapter.bus_recovery_info = &axxia_i2c_recovery_info; in axxia_i2c_probe()
792 idev->adapter.quirks = &axxia_i2c_quirks; in axxia_i2c_probe()
793 idev->adapter.dev.parent = &pdev->dev; in axxia_i2c_probe()
794 idev->adapter.dev.of_node = pdev->dev.of_node; in axxia_i2c_probe()
798 ret = i2c_add_adapter(&idev->adapter); in axxia_i2c_probe()
805 clk_disable_unprepare(idev->i2c_clk); in axxia_i2c_probe()
813 clk_disable_unprepare(idev->i2c_clk); in axxia_i2c_remove()
814 i2c_del_adapter(&idev->adapter); in axxia_i2c_remove()
829 .name = "axxia-i2c",
836 MODULE_DESCRIPTION("Axxia I2C Bus driver");