Lines Matching +full:i2c +full:- +full:sda +full:- +full:hold +full:- +full:time +full:- +full:ns
1 // SPDX-License-Identifier: GPL-2.0
3 * i2c Support for Atmel's AT91 Two-Wire Interface (TWI)
18 #include <linux/dma-mapping.h>
22 #include <linux/i2c.h>
30 #include "i2c-at91.h"
34 struct at91_twi_pdata *pdata = dev->pdata; in at91_init_twi_bus_master()
38 if (dev->fifo_size) in at91_init_twi_bus_master()
42 at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg); in at91_init_twi_bus_master()
45 if (pdata->has_dig_filtr && dev->enable_dig_filt) in at91_init_twi_bus_master()
49 if (pdata->has_adv_dig_filtr && dev->enable_dig_filt) in at91_init_twi_bus_master()
51 (AT91_TWI_FILTR_THRES(dev->filter_width) & in at91_init_twi_bus_master()
55 if (pdata->has_ana_filtr && dev->enable_ana_filt) in at91_init_twi_bus_master()
68 int ckdiv, cdiv, div, hold = 0, filter_width = 0; in at91_calc_twi_clock() local
69 struct at91_twi_pdata *pdata = dev->pdata; in at91_calc_twi_clock()
70 int offset = pdata->clk_offset; in at91_calc_twi_clock()
71 int max_ckdiv = pdata->clk_max_div; in at91_calc_twi_clock()
74 i2c_parse_fw_timings(dev->dev, t, true); in at91_calc_twi_clock()
76 div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk), in at91_calc_twi_clock()
77 2 * t->bus_freq_hz) - offset); in at91_calc_twi_clock()
82 dev_warn(dev->dev, "%d exceeds ckdiv max value which is %d.\n", in at91_calc_twi_clock()
88 if (pdata->has_hold_field) { in at91_calc_twi_clock()
90 * hold time = HOLD + 3 x T_peripheral_clock in at91_calc_twi_clock()
92 * hold. in at91_calc_twi_clock()
94 hold = DIV_ROUND_UP(t->sda_hold_ns in at91_calc_twi_clock()
95 * (clk_get_rate(dev->clk) / 1000), 1000000); in at91_calc_twi_clock()
96 hold -= 3; in at91_calc_twi_clock()
97 if (hold < 0) in at91_calc_twi_clock()
98 hold = 0; in at91_calc_twi_clock()
99 if (hold > AT91_TWI_CWGR_HOLD_MAX) { in at91_calc_twi_clock()
100 dev_warn(dev->dev, in at91_calc_twi_clock()
101 "HOLD field set to its maximum value (%d instead of %d)\n", in at91_calc_twi_clock()
102 AT91_TWI_CWGR_HOLD_MAX, hold); in at91_calc_twi_clock()
103 hold = AT91_TWI_CWGR_HOLD_MAX; in at91_calc_twi_clock()
107 if (pdata->has_adv_dig_filtr) { in at91_calc_twi_clock()
112 filter_width = DIV_ROUND_UP(t->digital_filter_width_ns in at91_calc_twi_clock()
113 * (clk_get_rate(dev->clk) / 1000), 1000000); in at91_calc_twi_clock()
115 dev_warn(dev->dev, in at91_calc_twi_clock()
122 dev->twi_cwgr_reg = (ckdiv << 16) | (cdiv << 8) | cdiv in at91_calc_twi_clock()
123 | AT91_TWI_CWGR_HOLD(hold); in at91_calc_twi_clock()
125 dev->filter_width = filter_width; in at91_calc_twi_clock()
127 dev_dbg(dev->dev, "cdiv %d ckdiv %d hold %d (%d ns), filter_width %d (%d ns)\n", in at91_calc_twi_clock()
128 cdiv, ckdiv, hold, t->sda_hold_ns, filter_width, in at91_calc_twi_clock()
129 t->digital_filter_width_ns); in at91_calc_twi_clock()
134 struct at91_twi_dma *dma = &dev->dma; in at91_twi_dma_cleanup()
138 if (dma->xfer_in_progress) { in at91_twi_dma_cleanup()
139 if (dma->direction == DMA_FROM_DEVICE) in at91_twi_dma_cleanup()
140 dmaengine_terminate_sync(dma->chan_rx); in at91_twi_dma_cleanup()
142 dmaengine_terminate_sync(dma->chan_tx); in at91_twi_dma_cleanup()
143 dma->xfer_in_progress = false; in at91_twi_dma_cleanup()
145 if (dma->buf_mapped) { in at91_twi_dma_cleanup()
146 dma_unmap_single(dev->dev, sg_dma_address(&dma->sg[0]), in at91_twi_dma_cleanup()
147 dev->buf_len, dma->direction); in at91_twi_dma_cleanup()
148 dma->buf_mapped = false; in at91_twi_dma_cleanup()
156 if (!dev->buf_len) in at91_twi_write_next_byte()
160 writeb_relaxed(*dev->buf, dev->base + AT91_TWI_THR); in at91_twi_write_next_byte()
163 if (--dev->buf_len == 0) { in at91_twi_write_next_byte()
164 if (!dev->use_alt_cmd) in at91_twi_write_next_byte()
169 dev_dbg(dev->dev, "wrote 0x%x, to go %zu\n", *dev->buf, dev->buf_len); in at91_twi_write_next_byte()
171 ++dev->buf; in at91_twi_write_next_byte()
178 dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg[0]), in at91_twi_write_data_dma_callback()
179 dev->buf_len, DMA_TO_DEVICE); in at91_twi_write_data_dma_callback()
189 if (!dev->use_alt_cmd) in at91_twi_write_data_dma_callback()
197 struct at91_twi_dma *dma = &dev->dma; in at91_twi_write_data_dma()
198 struct dma_chan *chan_tx = dma->chan_tx; in at91_twi_write_data_dma()
201 if (!dev->buf_len) in at91_twi_write_data_dma()
204 dma->direction = DMA_TO_DEVICE; in at91_twi_write_data_dma()
207 dma_addr = dma_map_single(dev->dev, dev->buf, dev->buf_len, in at91_twi_write_data_dma()
209 if (dma_mapping_error(dev->dev, dma_addr)) { in at91_twi_write_data_dma()
210 dev_err(dev->dev, "dma map failed\n"); in at91_twi_write_data_dma()
213 dma->buf_mapped = true; in at91_twi_write_data_dma()
216 if (dev->fifo_size) { in at91_twi_write_data_dma()
223 part1_len = dev->buf_len & ~0x3; in at91_twi_write_data_dma()
225 sg = &dma->sg[sg_len++]; in at91_twi_write_data_dma()
230 part2_len = dev->buf_len & 0x3; in at91_twi_write_data_dma()
232 sg = &dma->sg[sg_len++]; in at91_twi_write_data_dma()
246 sg_dma_len(&dma->sg[0]) = dev->buf_len; in at91_twi_write_data_dma()
247 sg_dma_address(&dma->sg[0]) = dma_addr; in at91_twi_write_data_dma()
250 txdesc = dmaengine_prep_slave_sg(chan_tx, dma->sg, sg_len, in at91_twi_write_data_dma()
254 dev_err(dev->dev, "dma prep slave sg failed\n"); in at91_twi_write_data_dma()
258 txdesc->callback = at91_twi_write_data_dma_callback; in at91_twi_write_data_dma()
259 txdesc->callback_param = dev; in at91_twi_write_data_dma()
261 dma->xfer_in_progress = true; in at91_twi_write_data_dma()
277 if (!dev->buf_len) { in at91_twi_read_next_byte()
283 *dev->buf = readb_relaxed(dev->base + AT91_TWI_RHR); in at91_twi_read_next_byte()
284 --dev->buf_len; in at91_twi_read_next_byte()
287 if (dev->recv_len_abort) in at91_twi_read_next_byte()
291 if (unlikely(dev->msg->flags & I2C_M_RECV_LEN)) { in at91_twi_read_next_byte()
293 if (*dev->buf <= I2C_SMBUS_BLOCK_MAX && *dev->buf > 0) { in at91_twi_read_next_byte()
294 dev->msg->flags &= ~I2C_M_RECV_LEN; in at91_twi_read_next_byte()
295 dev->buf_len += *dev->buf; in at91_twi_read_next_byte()
296 dev->msg->len = dev->buf_len + 1; in at91_twi_read_next_byte()
297 dev_dbg(dev->dev, "received block length %zu\n", in at91_twi_read_next_byte()
298 dev->buf_len); in at91_twi_read_next_byte()
301 dev->recv_len_abort = true; in at91_twi_read_next_byte()
302 dev->buf_len = 1; in at91_twi_read_next_byte()
307 if (!dev->use_alt_cmd && dev->buf_len == 1) in at91_twi_read_next_byte()
310 dev_dbg(dev->dev, "read 0x%x, to go %zu\n", *dev->buf, dev->buf_len); in at91_twi_read_next_byte()
312 ++dev->buf; in at91_twi_read_next_byte()
320 dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg[0]), in at91_twi_read_data_dma_callback()
321 dev->buf_len, DMA_FROM_DEVICE); in at91_twi_read_data_dma_callback()
323 if (!dev->use_alt_cmd) { in at91_twi_read_data_dma_callback()
325 dev->buf += dev->buf_len - 2; in at91_twi_read_data_dma_callback()
326 dev->buf_len = 2; in at91_twi_read_data_dma_callback()
336 struct at91_twi_dma *dma = &dev->dma; in at91_twi_read_data_dma()
337 struct dma_chan *chan_rx = dma->chan_rx; in at91_twi_read_data_dma()
340 buf_len = (dev->use_alt_cmd) ? dev->buf_len : dev->buf_len - 2; in at91_twi_read_data_dma()
341 dma->direction = DMA_FROM_DEVICE; in at91_twi_read_data_dma()
345 dma_addr = dma_map_single(dev->dev, dev->buf, buf_len, DMA_FROM_DEVICE); in at91_twi_read_data_dma()
346 if (dma_mapping_error(dev->dev, dma_addr)) { in at91_twi_read_data_dma()
347 dev_err(dev->dev, "dma map failed\n"); in at91_twi_read_data_dma()
350 dma->buf_mapped = true; in at91_twi_read_data_dma()
353 if (dev->fifo_size && IS_ALIGNED(buf_len, 4)) { in at91_twi_read_data_dma()
366 sg_dma_len(&dma->sg[0]) = buf_len; in at91_twi_read_data_dma()
367 sg_dma_address(&dma->sg[0]) = dma_addr; in at91_twi_read_data_dma()
369 rxdesc = dmaengine_prep_slave_sg(chan_rx, dma->sg, 1, DMA_DEV_TO_MEM, in at91_twi_read_data_dma()
372 dev_err(dev->dev, "dma prep slave sg failed\n"); in at91_twi_read_data_dma()
376 rxdesc->callback = at91_twi_read_data_dma_callback; in at91_twi_read_data_dma()
377 rxdesc->callback_param = dev; in at91_twi_read_data_dma()
379 dma->xfer_in_progress = true; in at91_twi_read_data_dma()
381 dma_async_issue_pending(dma->chan_rx); in at91_twi_read_data_dma()
406 * when the i2c slave device sends too quickly data after receiving the in atmel_twi_interrupt()
425 * When a NACK condition is detected, the I2C controller sets the NACK, in atmel_twi_interrupt()
428 * 1 - Handling NACK errors with CPU write transfer. in atmel_twi_interrupt()
431 * Holding Register (THR) otherwise the I2C controller would start a new in atmel_twi_interrupt()
432 * transfer and the I2C slave is likely to reply by another NACK. in atmel_twi_interrupt()
434 * 2 - Handling NACK errors with DMA write transfer. in atmel_twi_interrupt()
436 * By setting the TXRDY bit in the SR, the I2C controller also triggers in atmel_twi_interrupt()
438 * result depends on the hardware version of the I2C controller. in atmel_twi_interrupt()
440 * 2a - Without support of the Alternative Command mode. in atmel_twi_interrupt()
443 * next data into the THR, hence starting a new transfer: the I2C slave in atmel_twi_interrupt()
446 * the first NACK before the I2C controller detects the second NACK and in atmel_twi_interrupt()
448 * When handling the first NACK, this interrupt handler disables the I2C in atmel_twi_interrupt()
454 * 2b - With support of the Alternative Command mode. in atmel_twi_interrupt()
456 * When a NACK condition is detected, the I2C controller also locks the in atmel_twi_interrupt()
459 * this data actually won't go on the I2C bus hence a second NACK is not in atmel_twi_interrupt()
464 complete(&dev->cmd_complete); in atmel_twi_interrupt()
470 dev->transfer_status |= status; in atmel_twi_interrupt()
479 bool has_unre_flag = dev->pdata->has_unre_flag; in at91_do_twi_transfer()
480 bool has_alt_cmd = dev->pdata->has_alt_cmd; in at91_do_twi_transfer()
484 * read flag but shows the state of the transmission at the time the in at91_do_twi_transfer()
490 * Indeed let's take the case of an i2c write command using DMA. in at91_do_twi_transfer()
494 * controller from sending new data on the i2c bus after a NACK in at91_do_twi_transfer()
495 * condition has happened. Once locked, this i2c peripheral stops in at91_do_twi_transfer()
499 * these new data won't be sent to the i2c bus but they will remain in at91_do_twi_transfer()
506 * Besides, the TXCOMP bit is already set before the i2c transaction in at91_do_twi_transfer()
513 * the interrupt handler would be called immediately and the i2c command in at91_do_twi_transfer()
525 dev_dbg(dev->dev, "transfer: %s %zu bytes.\n", in at91_do_twi_transfer()
526 (dev->msg->flags & I2C_M_RD) ? "read" : "write", dev->buf_len); in at91_do_twi_transfer()
528 reinit_completion(&dev->cmd_complete); in at91_do_twi_transfer()
529 dev->transfer_status = 0; in at91_do_twi_transfer()
534 if (dev->fifo_size) { in at91_do_twi_transfer()
549 if (!dev->buf_len) { in at91_do_twi_transfer()
552 } else if (dev->msg->flags & I2C_M_RD) { in at91_do_twi_transfer()
556 if (!dev->use_alt_cmd && dev->buf_len <= 1 && in at91_do_twi_transfer()
557 !(dev->msg->flags & I2C_M_RECV_LEN)) in at91_do_twi_transfer()
565 * read n-1 bytes because of latency. in at91_do_twi_transfer()
566 * Reading n-2 bytes with dma and the two last ones manually in at91_do_twi_transfer()
569 if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) { in at91_do_twi_transfer()
579 if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) { in at91_do_twi_transfer()
586 (dev->buf_len ? AT91_TWI_TXRDY : 0)); in at91_do_twi_transfer()
590 time_left = wait_for_completion_timeout(&dev->cmd_complete, in at91_do_twi_transfer()
591 dev->adapter.timeout); in at91_do_twi_transfer()
593 dev->transfer_status |= at91_twi_read(dev, AT91_TWI_SR); in at91_do_twi_transfer()
595 ret = -ETIMEDOUT; in at91_do_twi_transfer()
598 if (dev->transfer_status & AT91_TWI_NACK) { in at91_do_twi_transfer()
599 dev_dbg(dev->dev, "received nack\n"); in at91_do_twi_transfer()
600 ret = -EREMOTEIO; in at91_do_twi_transfer()
603 if (dev->transfer_status & AT91_TWI_OVRE) { in at91_do_twi_transfer()
604 dev_err(dev->dev, "overrun while reading\n"); in at91_do_twi_transfer()
605 ret = -EIO; in at91_do_twi_transfer()
608 if (has_unre_flag && dev->transfer_status & AT91_TWI_UNRE) { in at91_do_twi_transfer()
609 dev_err(dev->dev, "underrun while writing\n"); in at91_do_twi_transfer()
610 ret = -EIO; in at91_do_twi_transfer()
613 if ((has_alt_cmd || dev->fifo_size) && in at91_do_twi_transfer()
614 (dev->transfer_status & AT91_TWI_LOCK)) { in at91_do_twi_transfer()
615 dev_err(dev->dev, "tx locked\n"); in at91_do_twi_transfer()
616 ret = -EIO; in at91_do_twi_transfer()
619 if (dev->recv_len_abort) { in at91_do_twi_transfer()
620 dev_err(dev->dev, "invalid smbus block length recvd\n"); in at91_do_twi_transfer()
621 ret = -EPROTO; in at91_do_twi_transfer()
625 dev_dbg(dev->dev, "transfer complete\n"); in at91_do_twi_transfer()
633 if ((has_alt_cmd || dev->fifo_size) && in at91_do_twi_transfer()
634 (dev->transfer_status & AT91_TWI_LOCK)) { in at91_do_twi_transfer()
635 dev_dbg(dev->dev, "unlock tx\n"); in at91_do_twi_transfer()
641 * some faulty I2C slave devices might hold SDA down; in at91_do_twi_transfer()
645 i2c_recover_bus(&dev->adapter); in at91_do_twi_transfer()
659 dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num); in at91_twi_xfer()
661 ret = pm_runtime_get_sync(dev->dev); in at91_twi_xfer()
671 for (i = 0; i < msg->len; ++i) { in at91_twi_xfer()
672 const unsigned addr = msg->buf[msg->len - 1 - i]; in at91_twi_xfer()
680 dev->use_alt_cmd = false; in at91_twi_xfer()
681 is_read = (m_start->flags & I2C_M_RD); in at91_twi_xfer()
682 if (dev->pdata->has_alt_cmd) { in at91_twi_xfer()
683 if (m_start->len > 0 && in at91_twi_xfer()
684 m_start->len < AT91_I2C_MAX_ALT_CMD_DATA_SIZE) { in at91_twi_xfer()
687 AT91_TWI_ACR_DATAL(m_start->len) | in at91_twi_xfer()
689 dev->use_alt_cmd = true; in at91_twi_xfer()
696 (m_start->addr << 16) | in at91_twi_xfer()
698 ((!dev->use_alt_cmd && is_read) ? AT91_TWI_MREAD : 0)); in at91_twi_xfer()
700 dev->buf_len = m_start->len; in at91_twi_xfer()
701 dev->buf = m_start->buf; in at91_twi_xfer()
702 dev->msg = m_start; in at91_twi_xfer()
703 dev->recv_len_abort = false; in at91_twi_xfer()
705 if (dev->use_dma) { in at91_twi_xfer()
708 ret = -ENOMEM; in at91_twi_xfer()
711 dev->buf = dma_buf; in at91_twi_xfer()
719 pm_runtime_mark_last_busy(dev->dev); in at91_twi_xfer()
720 pm_runtime_put_autosuspend(dev->dev); in at91_twi_xfer()
749 struct at91_twi_dma *dma = &dev->dma; in at91_twi_configure_dma()
755 * for each buffer in the scatter-gather list, if its size is aligned in at91_twi_configure_dma()
767 if (dev->fifo_size) in at91_twi_configure_dma()
779 dma->chan_tx = dma_request_chan(dev->dev, "tx"); in at91_twi_configure_dma()
780 if (IS_ERR(dma->chan_tx)) { in at91_twi_configure_dma()
781 ret = PTR_ERR(dma->chan_tx); in at91_twi_configure_dma()
782 dma->chan_tx = NULL; in at91_twi_configure_dma()
786 dma->chan_rx = dma_request_chan(dev->dev, "rx"); in at91_twi_configure_dma()
787 if (IS_ERR(dma->chan_rx)) { in at91_twi_configure_dma()
788 ret = PTR_ERR(dma->chan_rx); in at91_twi_configure_dma()
789 dma->chan_rx = NULL; in at91_twi_configure_dma()
794 if (dmaengine_slave_config(dma->chan_tx, &slave_config)) { in at91_twi_configure_dma()
795 dev_err(dev->dev, "failed to configure tx channel\n"); in at91_twi_configure_dma()
796 ret = -EINVAL; in at91_twi_configure_dma()
801 if (dmaengine_slave_config(dma->chan_rx, &slave_config)) { in at91_twi_configure_dma()
802 dev_err(dev->dev, "failed to configure rx channel\n"); in at91_twi_configure_dma()
803 ret = -EINVAL; in at91_twi_configure_dma()
807 sg_init_table(dma->sg, 2); in at91_twi_configure_dma()
808 dma->buf_mapped = false; in at91_twi_configure_dma()
809 dma->xfer_in_progress = false; in at91_twi_configure_dma()
810 dev->use_dma = true; in at91_twi_configure_dma()
812 dev_info(dev->dev, "using %s (tx) and %s (rx) for DMA transfers\n", in at91_twi_configure_dma()
813 dma_chan_name(dma->chan_tx), dma_chan_name(dma->chan_rx)); in at91_twi_configure_dma()
818 if (ret != -EPROBE_DEFER) in at91_twi_configure_dma()
819 dev_info(dev->dev, "can't get DMA channel, continue without DMA support\n"); in at91_twi_configure_dma()
820 if (dma->chan_rx) in at91_twi_configure_dma()
821 dma_release_channel(dma->chan_rx); in at91_twi_configure_dma()
822 if (dma->chan_tx) in at91_twi_configure_dma()
823 dma_release_channel(dma->chan_tx); in at91_twi_configure_dma()
830 struct i2c_bus_recovery_info *rinfo = &dev->rinfo; in at91_init_twi_recovery_gpio()
832 rinfo->pinctrl = devm_pinctrl_get(&pdev->dev); in at91_init_twi_recovery_gpio()
833 if (!rinfo->pinctrl) { in at91_init_twi_recovery_gpio()
834 dev_info(dev->dev, "pinctrl unavailable, bus recovery not supported\n"); in at91_init_twi_recovery_gpio()
837 if (IS_ERR(rinfo->pinctrl)) { in at91_init_twi_recovery_gpio()
838 dev_info(dev->dev, "can't get pinctrl, bus recovery not supported\n"); in at91_init_twi_recovery_gpio()
839 return PTR_ERR(rinfo->pinctrl); in at91_init_twi_recovery_gpio()
841 dev->adapter.bus_recovery_info = rinfo; in at91_init_twi_recovery_gpio()
850 dev->transfer_status |= at91_twi_read(dev, AT91_TWI_SR); in at91_twi_recover_bus_cmd()
851 if (!(dev->transfer_status & AT91_TWI_SDA)) { in at91_twi_recover_bus_cmd()
852 dev_dbg(dev->dev, "SDA is down; sending bus clear command\n"); in at91_twi_recover_bus_cmd()
853 if (dev->use_alt_cmd) { in at91_twi_recover_bus_cmd()
869 struct i2c_bus_recovery_info *rinfo = &dev->rinfo; in at91_init_twi_recovery_info()
870 bool has_clear_cmd = dev->pdata->has_clear_cmd; in at91_init_twi_recovery_info()
875 rinfo->recover_bus = at91_twi_recover_bus_cmd; in at91_init_twi_recovery_info()
876 dev->adapter.bus_recovery_info = rinfo; in at91_init_twi_recovery_info()
886 init_completion(&dev->cmd_complete); in at91_twi_probe_master()
888 rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0, in at91_twi_probe_master()
889 dev_name(dev->dev), dev); in at91_twi_probe_master()
891 dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc); in at91_twi_probe_master()
895 if (dev->dev->of_node) { in at91_twi_probe_master()
897 if (rc == -EPROBE_DEFER) in at91_twi_probe_master()
901 if (!of_property_read_u32(pdev->dev.of_node, "atmel,fifo-size", in at91_twi_probe_master()
902 &dev->fifo_size)) { in at91_twi_probe_master()
903 dev_info(dev->dev, "Using FIFO (%u data)\n", dev->fifo_size); in at91_twi_probe_master()
906 dev->enable_dig_filt = of_property_read_bool(pdev->dev.of_node, in at91_twi_probe_master()
907 "i2c-digital-filter"); in at91_twi_probe_master()
909 dev->enable_ana_filt = of_property_read_bool(pdev->dev.of_node, in at91_twi_probe_master()
910 "i2c-analog-filter"); in at91_twi_probe_master()
914 if (rc == -EPROBE_DEFER) in at91_twi_probe_master()
917 dev->adapter.algo = &at91_twi_algorithm; in at91_twi_probe_master()
918 dev->adapter.quirks = &at91_twi_quirks; in at91_twi_probe_master()