Lines Matching +full:0 +full:x000fffff

19  * Coresight management registers (0xf00-0xfcc)
20  * 0xfa0 - 0xfa4: Management	registers in PFTv1.0
23 #define CORESIGHT_ITCTRL	0xf00
24 #define CORESIGHT_CLAIMSET	0xfa0
25 #define CORESIGHT_CLAIMCLR	0xfa4
26 #define CORESIGHT_LAR		0xfb0
27 #define CORESIGHT_LSR		0xfb4
28 #define CORESIGHT_DEVARCH	0xfbc
29 #define CORESIGHT_AUTHSTATUS	0xfb8
30 #define CORESIGHT_DEVID		0xfc8
31 #define CORESIGHT_DEVTYPE	0xfcc
67 	})[0].attr.attr)
75 	})[0].attr.attr)
119 		writel_relaxed(0x0, addr + CORESIGHT_LAR);  in CS_LOCK()
120 	} while (0);  in CS_LOCK()
129 	} while (0);  in CS_UNLOCK()
157 static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; }  in etm_readl_cp14()
158 static inline int etm_writel_cp14(u32 off, u32 val) { return 0; }  in etm_writel_cp14()
178 		.mask	= 0x000fffff,	\
185 		.mask	= 0x000fffff,				\
199 #define CS_AMBA_UCI_ID(pid, uci)	__CS_AMBA_UCI_ID(pid, 0x000fffff, uci)