Lines Matching +full:non +full:- +full:coresight
1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/coresight.h>
29 #include "coresight-priv.h"
69 * 0b0000 - Sample offset applies based on the instruction state, we
71 * 0b0001 - No offset applies.
72 * 0b0010 - No offset applies, but do not use in AArch32 mode
113 MODULE_PARM_DESC(enable, "Control to enable coresight CPU debug functionality");
118 writel_relaxed(0x0, drvdata->base + EDOSLAR); in debug_os_unlock()
130 * - CPU power domain is powered off;
131 * - The OS Double Lock is locked;
138 if (!(drvdata->edprsr & EDPRSR_PU)) in debug_access_permitted()
142 if (drvdata->edprsr & EDPRSR_DLK) in debug_access_permitted()
160 edprcr = readl_relaxed(drvdata->base + EDPRCR); in debug_force_cpu_powered_up()
162 writel_relaxed(edprcr, drvdata->base + EDPRCR); in debug_force_cpu_powered_up()
165 if (readx_poll_timeout_atomic(readl_relaxed, drvdata->base + EDPRSR, in debug_force_cpu_powered_up()
166 drvdata->edprsr, (drvdata->edprsr & EDPRSR_PU), in debug_force_cpu_powered_up()
174 dev_err(drvdata->dev, "%s: power up request for CPU%d failed\n", in debug_force_cpu_powered_up()
175 __func__, drvdata->cpu); in debug_force_cpu_powered_up()
183 edprcr = readl_relaxed(drvdata->base + EDPRCR); in debug_force_cpu_powered_up()
185 writel_relaxed(edprcr, drvdata->base + EDPRCR); in debug_force_cpu_powered_up()
187 drvdata->edprsr = readl_relaxed(drvdata->base + EDPRSR); in debug_force_cpu_powered_up()
190 if (unlikely(!(drvdata->edprsr & EDPRSR_PU))) in debug_force_cpu_powered_up()
198 CS_UNLOCK(drvdata->base); in debug_read_regs()
204 save_edprcr = readl_relaxed(drvdata->base + EDPRCR); in debug_read_regs()
215 drvdata->edpcsr = readl_relaxed(drvdata->base + EDPCSR); in debug_read_regs()
219 * element (PE) is in debug state, or sample-based in debug_read_regs()
224 if (drvdata->edpcsr == EDPCSR_PROHIBITED) in debug_read_regs()
228 * A read of the EDPCSR normally has the side-effect of in debug_read_regs()
233 drvdata->edpcsr_hi = readl_relaxed(drvdata->base + EDPCSR_HI); in debug_read_regs()
235 if (drvdata->edcidsr_present) in debug_read_regs()
236 drvdata->edcidsr = readl_relaxed(drvdata->base + EDCIDSR); in debug_read_regs()
238 if (drvdata->edvidsr_present) in debug_read_regs()
239 drvdata->edvidsr = readl_relaxed(drvdata->base + EDVIDSR); in debug_read_regs()
243 writel_relaxed(save_edprcr, drvdata->base + EDPRCR); in debug_read_regs()
245 CS_LOCK(drvdata->base); in debug_read_regs()
251 return (unsigned long)drvdata->edpcsr_hi << 32 | in debug_adjust_pc()
252 (unsigned long)drvdata->edpcsr; in debug_adjust_pc()
260 pc = (unsigned long)drvdata->edpcsr; in debug_adjust_pc()
262 if (drvdata->pc_has_offset) { in debug_adjust_pc()
269 pc = (pc & EDPCSR_THUMB_INST_MASK) - thumb_inst_offset; in debug_adjust_pc()
280 dev_emerg(drvdata->dev, in debug_adjust_pc()
283 pc = (pc & EDPCSR_ARM_INST_MASK) - arm_inst_offset; in debug_adjust_pc()
291 struct device *dev = drvdata->dev; in debug_dump_regs()
295 drvdata->edprsr, in debug_dump_regs()
296 drvdata->edprsr & EDPRSR_PU ? "On" : "Off", in debug_dump_regs()
297 drvdata->edprsr & EDPRSR_DLK ? "Lock" : "Unlock"); in debug_dump_regs()
304 if (drvdata->edpcsr == EDPCSR_PROHIBITED) { in debug_dump_regs()
312 if (drvdata->edcidsr_present) in debug_dump_regs()
313 dev_emerg(dev, " EDCIDSR: %08x\n", drvdata->edcidsr); in debug_dump_regs()
315 if (drvdata->edvidsr_present) in debug_dump_regs()
317 drvdata->edvidsr, in debug_dump_regs()
318 drvdata->edvidsr & EDVIDSR_NS ? in debug_dump_regs()
319 "Non-secure" : "Secure", in debug_dump_regs()
320 drvdata->edvidsr & EDVIDSR_E3 ? "EL3" : in debug_dump_regs()
321 (drvdata->edvidsr & EDVIDSR_E2 ? in debug_dump_regs()
323 drvdata->edvidsr & EDVIDSR_HV ? 64 : 32, in debug_dump_regs()
324 drvdata->edvidsr & (u32)EDVIDSR_VMID); in debug_dump_regs()
333 CS_UNLOCK(drvdata->base); in debug_init_arch_data()
336 eddevid = readl_relaxed(drvdata->base + EDDEVID); in debug_init_arch_data()
337 eddevid1 = readl_relaxed(drvdata->base + EDDEVID1); in debug_init_arch_data()
339 CS_LOCK(drvdata->base); in debug_init_arch_data()
345 drvdata->edpcsr_present = false; in debug_init_arch_data()
346 drvdata->edcidsr_present = false; in debug_init_arch_data()
347 drvdata->edvidsr_present = false; in debug_init_arch_data()
348 drvdata->pc_has_offset = false; in debug_init_arch_data()
352 drvdata->edvidsr_present = true; in debug_init_arch_data()
355 drvdata->edcidsr_present = true; in debug_init_arch_data()
365 drvdata->edpcsr_present = in debug_init_arch_data()
369 drvdata->pc_has_offset = in debug_init_arch_data()
400 dev_emerg(drvdata->dev, "CPU[%d]:\n", drvdata->cpu); in debug_notifier_call()
432 ret = pm_runtime_get_sync(drvdata->dev); in debug_enable_func()
448 pm_runtime_put_noidle(drvdata->dev); in debug_enable_func()
469 ret = pm_runtime_put(drvdata->dev); in debug_disable_func()
569 drvdata->cpu = coresight_get_cpu(dev); in __debug_probe()
570 if (drvdata->cpu < 0) in __debug_probe()
571 return drvdata->cpu; in __debug_probe()
573 if (per_cpu(debug_drvdata, drvdata->cpu)) { in __debug_probe()
575 drvdata->cpu); in __debug_probe()
576 return -EBUSY; in __debug_probe()
579 drvdata->dev = dev; in __debug_probe()
584 drvdata->base = base; in __debug_probe()
587 per_cpu(debug_drvdata, drvdata->cpu) = drvdata; in __debug_probe()
588 ret = smp_call_function_single(drvdata->cpu, debug_init_arch_data, in __debug_probe()
593 dev_err(dev, "CPU%d debug arch init failed\n", drvdata->cpu); in __debug_probe()
597 if (!drvdata->edpcsr_present) { in __debug_probe()
598 dev_err(dev, "CPU%d sample-based profiling isn't implemented\n", in __debug_probe()
599 drvdata->cpu); in __debug_probe()
600 ret = -ENXIO; in __debug_probe()
616 dev_info(dev, "Coresight debug-CPU%d initialized\n", drvdata->cpu); in __debug_probe()
620 debug_count--; in __debug_probe()
622 per_cpu(debug_drvdata, drvdata->cpu) = NULL; in __debug_probe()
630 drvdata = devm_kzalloc(&adev->dev, sizeof(*drvdata), GFP_KERNEL); in debug_probe()
632 return -ENOMEM; in debug_probe()
635 return __debug_probe(&adev->dev, &adev->res); in debug_probe()
642 per_cpu(debug_drvdata, drvdata->cpu) = NULL; in __debug_remove()
650 if (!--debug_count) in __debug_remove()
656 __debug_remove(&adev->dev); in debug_remove()
669 CS_AMBA_ID(0x000bbd03), /* Cortex-A53 */
670 CS_AMBA_ID(0x000bbd07), /* Cortex-A57 */
671 CS_AMBA_ID(0x000bbd08), /* Cortex-A72 */
672 CS_AMBA_ID(0x000bbd09), /* Cortex-A73 */
682 .name = "coresight-cpu-debug",
696 drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); in debug_platform_probe()
698 return -ENOMEM; in debug_platform_probe()
700 drvdata->pclk = coresight_get_enable_apb_pclk(&pdev->dev); in debug_platform_probe()
701 if (IS_ERR(drvdata->pclk)) in debug_platform_probe()
702 return -ENODEV; in debug_platform_probe()
704 dev_set_drvdata(&pdev->dev, drvdata); in debug_platform_probe()
705 pm_runtime_get_noresume(&pdev->dev); in debug_platform_probe()
706 pm_runtime_set_active(&pdev->dev); in debug_platform_probe()
707 pm_runtime_enable(&pdev->dev); in debug_platform_probe()
709 ret = __debug_probe(&pdev->dev, res); in debug_platform_probe()
711 pm_runtime_put_noidle(&pdev->dev); in debug_platform_probe()
712 pm_runtime_disable(&pdev->dev); in debug_platform_probe()
713 if (!IS_ERR_OR_NULL(drvdata->pclk)) in debug_platform_probe()
714 clk_put(drvdata->pclk); in debug_platform_probe()
721 struct debug_drvdata *drvdata = dev_get_drvdata(&pdev->dev); in debug_platform_remove()
726 __debug_remove(&pdev->dev); in debug_platform_remove()
727 pm_runtime_disable(&pdev->dev); in debug_platform_remove()
728 if (!IS_ERR_OR_NULL(drvdata->pclk)) in debug_platform_remove()
729 clk_put(drvdata->pclk); in debug_platform_remove()
734 {"ARMHC503", 0, 0, 0}, /* ARM CoreSight Debug */
745 if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) in debug_runtime_suspend()
746 clk_disable_unprepare(drvdata->pclk); in debug_runtime_suspend()
754 if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) in debug_runtime_resume()
755 clk_prepare_enable(drvdata->pclk); in debug_runtime_resume()
768 .name = "coresight-debug-platform",
788 MODULE_DESCRIPTION("ARM Coresight CPU Debug Driver");