hwtracing/coresight/coresight-catu.h

1 /* SPDX-License-Identifier: GPL-2.0 */
11 #include "coresight-priv.h"
13 /* Register offset from base */
41  * AXI - ARPROT bits:
42  * See AMBA AXI & ACE Protocol specification (ARM IHI 0022E)
45  * Bit 0: 0 - Unprivileged access, 1 - Privileged access
46  * Bit 1: 0 - Secure access, 1 - Non-secure access.
47  * Bit 2: 0 - Data access, 1 - instruction access.
65 	void __iomem *base;  member
74 	return csdev_access_relaxed_read32(&drvdata->csdev->access, offset); \
79 	csdev_access_relaxed_write32(&drvdata->csdev->access, val, offset); \
86 	return csdev_access_relaxed_read_pair(&drvdata->csdev->access, lo_off, hi_off); \
91 	csdev_access_relaxed_write_pair(&drvdata->csdev->access, val, lo_off, hi_off); \
105 	if (csdev->type != CORESIGHT_DEV_TYPE_HELPER)  in CATU_REG_PAIR()
107 	if (csdev->subtype.helper_subtype != CORESIGHT_DEV_SUBTYPE_HELPER_CATU)  in CATU_REG_PAIR()