Lines Matching +full:0 +full:xc01
22 * nct6106d 9 3 3 6+3 0xc450 0xc1 0x5ca3
23 * nct6116d 9 5 5 3+3 0xd280 0xc1 0x5ca3
24 * nct6775f 9 4 3 6+3 0xb470 0xc1 0x5ca3
25 * nct6776f 9 5 3 6+3 0xc330 0xc1 0x5ca3
26 * nct6779d 15 5 5 2+6 0xc560 0xc1 0x5ca3
27 * nct6791d 15 6 6 2+6 0xc800 0xc1 0x5ca3
28 * nct6792d 15 6 6 2+6 0xc910 0xc1 0x5ca3
29 * nct6793d 15 6 6 2+6 0xd120 0xc1 0x5ca3
30 * nct6795d 14 6 6 2+6 0xd350 0xc1 0x5ca3
31 * nct6796d 14 7 7 2+6 0xd420 0xc1 0x5ca3
32 * nct6797d 14 7 7 2+6 0xd450 0xc1 0x5ca3
33 * (0xd451)
34 * nct6798d 14 7 7 2+6 0xd428 0xc1 0x5ca3
35 * (0xd429)
36 * nct6796d-s 18 7 7 6+2 0xd801 0xc1 0x5ca3
37 * nct6799d-r 18 7 7 6+2 0xd802 0xc1 0x5ca3
89 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
90 0x55c, 0x55e, 0x560, 0x562, 0x564, 0x570, 0x572 };
92 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
93 0x55d, 0x55f, 0x561, 0x563, 0x565, 0x571, 0x573 };
95 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
98 #define NCT6775_REG_VBAT 0x5D
99 #define NCT6775_REG_DIODE 0x5E
100 #define NCT6775_DIODE_MASK 0x02
102 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
105 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */
112 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
115 0, 1, 2, 3, 8, 9, 10, 16, 17, -1, -1, -1, /* in0-in11 */
123 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
124 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
129 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 };
131 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 };
133 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 };
135 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 };
137 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 };
139 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 };
140 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
141 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
144 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 };
146 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 };
148 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 };
150 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
151 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
153 0x641, 0x642, 0x643, 0x644 };
157 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
159 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
162 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
164 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
166 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
169 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
172 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 };
175 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
177 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
179 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
181 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
183 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
185 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
188 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 };
190 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 };
195 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
198 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 };
200 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 };
208 "PECI Agent 0",
226 #define NCT6775_TEMP_MASK 0x001ffffe
227 #define NCT6775_VIRT_TEMP_MASK 0x00000000
230 [13] = 0x661,
231 [14] = 0x662,
232 [15] = 0x664,
236 [4] = 0xa00,
237 [5] = 0xa01,
238 [6] = 0xa02,
239 [7] = 0xa03,
240 [8] = 0xa04,
241 [9] = 0xa05,
242 [10] = 0xa06,
243 [11] = 0xa07
246 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 };
255 0, 1, 2, 3, 8, 21, 20, 16, 17, -1, -1, -1, /* in0-in11 */
262 /* 0xbf: nct6799 only */
263 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
266 0, 1, 2, 3, 4, 5, 6, 7, 8, -1, -1, -1, /* in0-in11 */
274 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c };
276 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
277 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
280 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c };
282 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
285 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
288 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
295 "SMBUSMASTER 0",
303 "PECI Agent 0",
316 #define NCT6776_TEMP_MASK 0x007ffffe
317 #define NCT6776_VIRT_TEMP_MASK 0x00000000
320 [14] = 0x401,
321 [15] = 0x402,
322 [16] = 0x404,
326 [11] = 0x709,
327 [12] = 0x70a,
331 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 };
342 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
343 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e, 0x48f,
344 0x470, 0x471};
347 0x459, 0x45A, 0x45B, 0x568 };
350 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */
358 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */
366 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce };
368 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f };
371 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };
372 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
374 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 };
376 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
377 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
379 0x18, 0x152 };
381 0x3a, 0x153 };
383 0x39, 0x155 };
386 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c, 0x44d, 0x449 };
397 "SMBUSMASTER 0",
405 "PECI Agent 0",
423 #define NCT6779_TEMP_MASK 0x07ffff7e
424 #define NCT6779_VIRT_TEMP_MASK 0x00000000
425 #define NCT6791_TEMP_MASK 0x87ffff7e
426 #define NCT6791_VIRT_TEMP_MASK 0x80000000
429 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
430 0, 0, 0, 0, 0, 0, 0, 0,
431 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
432 0x408, 0 };
435 [15] = 0x709,
436 [16] = 0x70a,
441 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 };
442 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a };
443 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b };
444 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c };
445 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d };
446 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e };
449 0x459, 0x45A, 0x45B, 0x568, 0x45D };
452 0, 1, 2, 3, 8, 21, 20, 16, 17, 24, 25, 26, /* in0-in11 */
462 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
464 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
475 "SMBUSMASTER 0",
483 "PECI Agent 0",
494 "PECI Agent 0 Calibration",
501 #define NCT6792_TEMP_MASK 0x9fffff7e
502 #define NCT6792_VIRT_TEMP_MASK 0x80000000
513 "SMBUSMASTER 0",
521 "PECI Agent 0",
533 "PECI Agent 0 Calibration",
539 #define NCT6793_TEMP_MASK 0xbfff037e
540 #define NCT6793_VIRT_TEMP_MASK 0x80000000
551 "SMBUSMASTER 0",
559 "PECI Agent 0",
571 "PECI Agent 0 Calibration",
577 #define NCT6795_TEMP_MASK 0xbfffff7e
578 #define NCT6795_VIRT_TEMP_MASK 0x80000000
589 "SMBUSMASTER 0",
597 "PECI Agent 0",
609 "PECI Agent 0 Calibration",
615 #define NCT6796_TEMP_MASK 0xbfff0ffe
616 #define NCT6796_VIRT_TEMP_MASK 0x80000c00
618 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b };
621 0x27, 0x150, 0x670, 0x672, 0x674, 0x676, 0x678, 0x67a};
624 0x621, 0x622, 0xc26, 0xc27, 0xc28, 0xc29, 0xc2a, 0xc2b };
627 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d, 0x4a0 };
629 0x39, 0x155, 0xc1a, 0xc1b, 0xc1c, 0xc1d, 0xc1e, 0xc1f };
631 0x3a, 0x153, 0xc20, 0xc21, 0xc22, 0xc23, 0xc24, 0xc25 };
634 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35, 0 };
637 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0x496, 0,
638 0, 0, 0, 0, 0x4a2, 0, 0, 0,
639 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
640 0x408, 0x419, 0x41a, 0x4f4, 0x4f5 };
651 "SMBUSMASTER 0",
659 "PECI Agent 0",
671 "PECI Agent 0 Calibration", /* undocumented */
677 #define NCT6798_TEMP_MASK 0xbfff0ffe
678 #define NCT6798_VIRT_TEMP_MASK 0x80000c00
681 0x459, 0x45A, 0x45B, 0x568, 0x45D, 0xc01 };
684 0, 1, 2, 3, 8, -1, 20, 16, 17, 24, 25, 26, /* in0-in11 */
692 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, /* in0-in11 */
709 "SMBUSMASTER 0",
717 "PECI Agent 0",
729 "PECI/TSI Agent 0 Calibration",
735 #define NCT6799_TEMP_MASK 0xbfff2ffe
736 #define NCT6799_VIRT_TEMP_MASK 0x80000c00
740 #define NCT6106_REG_VBAT 0x318
741 #define NCT6106_REG_DIODE 0x319
742 #define NCT6106_DIODE_MASK 0x01
745 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
747 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
749 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
751 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
752 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
754 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
756 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
758 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
760 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
761 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
763 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
765 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
766 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
767 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 };
768 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 };
770 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3, 0, 0 };
771 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04, 0, 0 };
772 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c, 0xd8, 0xd9 };
773 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
775 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
777 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
779 0x11b, 0x12b, 0x13b };
781 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
782 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
783 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
785 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
786 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
787 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
788 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
789 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
790 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
792 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
794 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
795 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
796 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
797 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b };
798 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
799 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
801 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
802 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
805 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
808 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */
816 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
819 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */
827 [14] = 0x51,
828 [15] = 0x52,
829 [16] = 0x54,
833 [11] = 0x204,
834 [12] = 0x205,
837 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 };
841 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 };
842 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 };
843 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 };
844 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 };
846 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 };
847 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 };
848 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 };
850 0xb0, 0xb1, 0xb2 };
853 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa };
855 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab };
858 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac };
860 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad };
863 0x114, 0x124, 0x134, 0x194, 0x1a4 };
865 0x115, 0x125, 0x135, 0x195, 0x1a5 };
867 0x116, 0x126, 0x136, 0x196, 0x1a6 };
869 0x117, 0x127, 0x137, 0x197, 0x1a7 };
871 0x118, 0x128, 0x138, 0x198, 0x1a8 };
873 0x112, 0x122, 0x132, 0x192, 0x1a2 };
876 0x111, 0x121, 0x131, 0x191, 0x1a1 };
879 0x160, 0x170, 0x180, 0x1d0, 0x1e0 };
881 0x164, 0x174, 0x184, 0x1d4, 0x1e4 };
884 0, 1, 2, 3, 4, 5, 7, 8, 9, -1, -1, -1, /* in0-in11 */
892 0, 1, 2, 3, 4, 5, 7, 8, 9, 10, 11, 12, /* in0-in11 */
899 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b };
903 if (mode == 0 && pwm == 255) in reg_to_pwm_enable()
911 return 0; in pwm_enable_to_reg()
933 if (reg == 0 || reg == 255) in fan_from_reg8()
934 return 0; in fan_from_reg8()
940 if ((reg & 0xff1f) == 0xff1f) in fan_from_reg13()
941 return 0; in fan_from_reg13()
943 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3); in fan_from_reg13()
945 if (reg == 0) in fan_from_reg13()
946 return 0; in fan_from_reg13()
953 if (reg == 0 || reg == 0xffff) in fan_from_reg16()
954 return 0; in fan_from_reg16()
971 return 0; in fan_to_reg()
1009 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scales[nr]), 0, 255); in in_to_reg()
1088 if (repeat <= 0) in nct6775_add_template_attr_group()
1092 for (count = 0; *t; t++, count++) in nct6775_add_template_attr_group()
1095 if (count == 0) in nct6775_add_template_attr_group()
1115 for (i = 0; i < repeat; i++) { in nct6775_add_template_attr_group()
1155 return reg == 0x20 || reg == 0x22 || reg == 0x24 || in nct6775_reg_is_word_sized()
1156 (reg >= 0x59 && reg < 0x69 && (reg & 1)) || in nct6775_reg_is_word_sized()
1157 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || in nct6775_reg_is_word_sized()
1158 reg == 0x111 || reg == 0x121 || reg == 0x131; in nct6775_reg_is_word_sized()
1160 return reg == 0x20 || reg == 0x22 || reg == 0x24 || in nct6775_reg_is_word_sized()
1161 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b || in nct6775_reg_is_word_sized()
1162 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 || in nct6775_reg_is_word_sized()
1163 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 || in nct6775_reg_is_word_sized()
1164 reg == 0x191 || reg == 0x1a1; in nct6775_reg_is_word_sized()
1166 return (((reg & 0xff00) == 0x100 || in nct6775_reg_is_word_sized()
1167 (reg & 0xff00) == 0x200) && in nct6775_reg_is_word_sized()
1168 ((reg & 0x00ff) == 0x50 || in nct6775_reg_is_word_sized()
1169 (reg & 0x00ff) == 0x53 || in nct6775_reg_is_word_sized()
1170 (reg & 0x00ff) == 0x55)) || in nct6775_reg_is_word_sized()
1171 (reg & 0xfff0) == 0x630 || in nct6775_reg_is_word_sized()
1172 reg == 0x640 || reg == 0x642 || in nct6775_reg_is_word_sized()
1173 reg == 0x662 || reg == 0x669 || in nct6775_reg_is_word_sized()
1174 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || in nct6775_reg_is_word_sized()
1175 reg == 0x73 || reg == 0x75 || reg == 0x77; in nct6775_reg_is_word_sized()
1177 return (((reg & 0xff00) == 0x100 || in nct6775_reg_is_word_sized()
1178 (reg & 0xff00) == 0x200) && in nct6775_reg_is_word_sized()
1179 ((reg & 0x00ff) == 0x50 || in nct6775_reg_is_word_sized()
1180 (reg & 0x00ff) == 0x53 || in nct6775_reg_is_word_sized()
1181 (reg & 0x00ff) == 0x55)) || in nct6775_reg_is_word_sized()
1182 (reg & 0xfff0) == 0x630 || in nct6775_reg_is_word_sized()
1183 reg == 0x402 || in nct6775_reg_is_word_sized()
1184 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || in nct6775_reg_is_word_sized()
1185 reg == 0x640 || reg == 0x642 || in nct6775_reg_is_word_sized()
1186 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) || in nct6775_reg_is_word_sized()
1187 reg == 0x73 || reg == 0x75 || reg == 0x77; in nct6775_reg_is_word_sized()
1197 return reg == 0x150 || reg == 0x153 || reg == 0x155 || in nct6775_reg_is_word_sized()
1198 (reg & 0xfff0) == 0x4c0 || in nct6775_reg_is_word_sized()
1199 reg == 0x402 || in nct6775_reg_is_word_sized()
1200 (reg >= 0x409 && reg < 0x419 && (reg & 1)) || in nct6775_reg_is_word_sized()
1201 reg == 0x63a || reg == 0x63c || reg == 0x63e || in nct6775_reg_is_word_sized()
1202 reg == 0x640 || reg == 0x642 || reg == 0x64a || in nct6775_reg_is_word_sized()
1203 reg == 0x64c || in nct6775_reg_is_word_sized()
1204 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 || in nct6775_reg_is_word_sized()
1205 reg == 0x7b || reg == 0x7d; in nct6775_reg_is_word_sized()
1223 return 0; in nct6775_read_temp()
1237 reg &= 0x70 >> oddshift; in nct6775_write_fan_div()
1238 reg |= (data->fan_div[nr] & 0x7) << oddshift; in nct6775_write_fan_div()
1246 return 0; in nct6775_write_fan_div_common()
1257 data->fan_div[0] = i & 0x7; in nct6775_update_fan_div()
1258 data->fan_div[1] = (i & 0x70) >> 4; in nct6775_update_fan_div()
1262 data->fan_div[2] = i & 0x7; in nct6775_update_fan_div()
1264 data->fan_div[3] = (i & 0x70) >> 4; in nct6775_update_fan_div()
1266 return 0; in nct6775_update_fan_div()
1273 return 0; in nct6775_update_fan_div_common()
1290 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) { in nct6775_init_fan_div()
1293 if (data->fan_div[i] == 0) { in nct6775_init_fan_div()
1301 return 0; in nct6775_init_fan_div()
1317 * If fan_min is not set (0), set it to 0xff to disable it. This in nct6775_init_fan_common()
1318 * prevents the unnecessary warning when fanX_min is reported as 0. in nct6775_init_fan_common()
1320 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) { in nct6775_init_fan_common()
1327 data->has_fan_div ? 0xff : 0xff1f); in nct6775_init_fan_common()
1334 return 0; in nct6775_init_fan_common()
1345 return 0; in nct6775_select_fan_div()
1352 if (reg == 0x00 && fan_div < 0x07) in nct6775_select_fan_div()
1354 else if (reg != 0x00 && reg < 0x30 && fan_div > 0) in nct6775_select_fan_div()
1388 return 0; in nct6775_select_fan_div()
1398 for (i = 0; i < data->pwm_num; i++) { in nct6775_update_pwm()
1411 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) { in nct6775_update_pwm()
1420 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i], in nct6775_update_pwm()
1423 if (!data->temp_tolerance[0][i] || in nct6775_update_pwm()
1425 data->temp_tolerance[0][i] = fanmodecfg & 0x0f; in nct6775_update_pwm()
1428 u8 t = fanmodecfg & 0x0f; in nct6775_update_pwm()
1434 t |= (reg & 0x70) >> 1; in nct6775_update_pwm()
1447 data->pwm_temp_sel[i] = reg & 0x1f; in nct6775_update_pwm()
1448 /* If fan can stop, report floor as 0 */ in nct6775_update_pwm()
1449 if (reg & 0x80) in nct6775_update_pwm()
1450 data->pwm[2][i] = 0; in nct6775_update_pwm()
1458 data->pwm_weight_temp_sel[i] = reg & 0x1f; in nct6775_update_pwm()
1459 /* If weight is disabled, report weight source as 0 */ in nct6775_update_pwm()
1460 if (!(reg & 0x80)) in nct6775_update_pwm()
1461 data->pwm_weight_temp_sel[i] = 0; in nct6775_update_pwm()
1464 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) { in nct6775_update_pwm()
1472 return 0; in nct6775_update_pwm()
1481 for (i = 0; i < data->pwm_num; i++) { in nct6775_update_pwm_limits()
1485 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) { in nct6775_update_pwm_limits()
1506 reg_t |= (reg & 0x0f) << 8; in nct6775_update_pwm_limits()
1511 for (j = 0; j < data->auto_pwm_num; j++) { in nct6775_update_pwm_limits()
1535 (reg & 0x02) ? 0xff : 0x00; in nct6775_update_pwm_limits()
1538 data->auto_pwm[i][data->auto_pwm_num] = 0xff; in nct6775_update_pwm_limits()
1559 reg = 0xff; in nct6775_update_pwm_limits()
1566 return 0; in nct6775_update_pwm_limits()
1572 int i, j, err = 0; in nct6775_update_device()
1585 for (i = 0; i < data->in_num; i++) { in nct6775_update_device()
1592 data->in[i][0] = reg; in nct6775_update_device()
1594 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®); in nct6775_update_device()
1606 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) { in nct6775_update_device()
1631 data->fan_pulses[i] = (tmp >> data->FAN_PULSE_SHIFT[i]) & 0x03; in nct6775_update_device()
1648 for (i = 0; i < NUM_TEMP; i++) { in nct6775_update_device()
1651 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) { in nct6775_update_device()
1668 for (i = 0; i < NUM_TSI_TEMP; i++) { in nct6775_update_device()
1677 data->alarms = 0; in nct6775_update_device()
1678 for (i = 0; i < NUM_REG_ALARM; i++) { in nct6775_update_device()
1689 data->beeps = 0; in nct6775_update_device()
1690 for (i = 0; i < NUM_REG_BEEP; i++) { in nct6775_update_device()
1740 if (err < 0) in store_in_reg()
1761 (unsigned int)((data->alarms >> nr) & 0x01)); in nct6775_show_alarm()
1770 for (nr = 0; nr < count; nr++) { in find_temp_source()
1776 if ((src & 0x1f) == source) in find_temp_source()
1787 unsigned int alarm = 0; in show_temp_alarm()
1798 if (nr >= 0) { in show_temp_alarm()
1801 alarm = (data->alarms >> bit) & 0x01; in show_temp_alarm()
1819 (unsigned int)((data->beeps >> nr) & 0x01)); in nct6775_show_beep()
1834 if (err < 0) in nct6775_store_beep()
1845 (data->beeps >> (regindex << 3)) & 0xff); in nct6775_store_beep()
1856 unsigned int beep = 0; in show_temp_beep()
1868 if (nr >= 0) { in show_temp_beep()
1871 beep = (data->beeps >> bit) & 0x01; in show_temp_beep()
1887 if (err < 0) in store_temp_beep()
1893 if (nr < 0) in store_temp_beep()
1905 (data->beeps >> (regindex << 3)) & 0xff); in store_temp_beep()
1920 return 0; in nct6775_in_is_visible()
1923 return 0; in nct6775_in_is_visible()
1928 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0);
1929 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0);
1930 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0);
1931 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1);
1932 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2);
2007 if (err < 0) in store_fan_min()
2014 val = 0xff1f; in store_fan_min()
2019 val = (val & 0x1f) | ((val << 3) & 0xff00); in store_fan_min()
2048 new_div = 0; /* 1 == BIT(0) */ in store_fan_min()
2051 nr + 1, val, data->fan_from_reg_min(1, 0)); in store_fan_min()
2058 new_div = 0; in store_fan_min()
2116 if (err < 0) in store_fan_pulses()
2127 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]); in store_fan_pulses()
2145 return 0; in nct6775_fan_is_visible()
2148 return 0; in nct6775_fan_is_visible()
2150 return 0; in nct6775_fan_is_visible()
2152 return 0; in nct6775_fan_is_visible()
2154 return 0; in nct6775_fan_is_visible()
2156 return 0; in nct6775_fan_is_visible()
2161 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0);
2165 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0);
2166 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0);
2167 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0);
2229 if (err < 0) in store_temp()
2262 if (err < 0) in store_temp_offset()
2304 if (err < 0) in store_temp_type()
2313 vbit = 0x02 << nr; in store_temp_type()
2355 return 0; in nct6775_temp_is_visible()
2358 return 0; in nct6775_temp_is_visible()
2360 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0) in nct6775_temp_is_visible()
2361 return 0; /* alarm */ in nct6775_temp_is_visible()
2363 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0) in nct6775_temp_is_visible()
2364 return 0; /* beep */ in nct6775_temp_is_visible()
2367 return 0; in nct6775_temp_is_visible()
2370 return 0; in nct6775_temp_is_visible()
2373 return 0; in nct6775_temp_is_visible()
2376 return 0; in nct6775_temp_is_visible()
2380 return 0; in nct6775_temp_is_visible()
2385 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0);
2386 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0);
2387 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1);
2388 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2);
2389 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3);
2390 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4);
2391 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0);
2392 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0);
2393 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0);
2394 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0);
2439 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0);
2440 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0);
2449 return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0; in nct6775_tsi_temp_is_visible()
2486 if (err < 0) in store_pwm_mode()
2492 /* Setting DC mode (0) is not supported for all chips/channels */ in store_pwm_mode()
2493 if (data->REG_PWM_MODE[nr] == 0) { in store_pwm_mode()
2530 if (index == 0 && data->pwm_enable[nr] > manual) { in show_pwm()
2550 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 }; in store_pwm()
2560 if (index == 0 && data->pwm_enable[nr] > manual) in store_pwm()
2564 if (err < 0) in store_pwm()
2573 if (index == 2) { /* floor: disable if val == 0 */ in store_pwm()
2577 reg &= 0x7f; in store_pwm()
2579 reg |= 0x80; in store_pwm()
2587 /* Returns 0 if OK, -EINVAL otherwise */
2592 for (i = 0; i < data->auto_pwm_num - 1; i++) { in check_trip_points()
2596 for (i = 0; i < data->auto_pwm_num - 1; i++) { in check_trip_points()
2600 /* validate critical temperature and pwm if enabled (pwm > 0) */ in check_trip_points()
2608 return 0; in check_trip_points()
2630 data->target_speed[nr] & 0xff); in pwm_update_registers()
2634 reg = (data->target_speed[nr] >> 8) & 0x0f; in pwm_update_registers()
2635 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1; in pwm_update_registers()
2651 data->temp_tolerance[0][nr]; in pwm_update_registers()
2658 return 0; in pwm_update_registers()
2685 if (err < 0) in store_pwm_enable()
2706 data->pwm[0][nr] = 255; in store_pwm_enable()
2707 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255); in store_pwm_enable()
2717 reg &= 0x0f; in store_pwm_enable()
2728 int i, sel = 0; in show_pwm_temp_sel_common()
2730 for (i = 0; i < NUM_TEMP; i++) { in show_pwm_temp_sel_common()
2770 if (err < 0) in store_pwm_temp_sel()
2772 if (val == 0 || val > NUM_TEMP) in store_pwm_temp_sel()
2783 reg &= 0xe0; in store_pwm_temp_sel()
2822 if (err < 0) in store_pwm_weight_temp_sel()
2838 reg &= 0xe0; in store_pwm_weight_temp_sel()
2839 reg |= (src | 0x80); in store_pwm_weight_temp_sel()
2842 data->pwm_weight_temp_sel[nr] = 0; in store_pwm_weight_temp_sel()
2846 reg &= 0x7f; in store_pwm_weight_temp_sel()
2878 if (err < 0) in store_target_temp()
2881 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, in store_target_temp()
2918 if (err < 0) in store_target_speed()
2921 val = clamp_val(val, 0, 1350000U); in store_target_speed()
2958 if (err < 0) in store_temp_tolerance()
2962 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask); in store_temp_tolerance()
2979 * configured, so only display values other than 0 if that is the case.
2988 int target, tolerance = 0; in show_speed_tolerance()
2999 if (low <= 0) in show_speed_tolerance()
3001 if (high > 0xffff) in show_speed_tolerance()
3002 high = 0xffff; in show_speed_tolerance()
3025 if (err < 0) in store_speed_tolerance()
3030 if (low <= 0) in store_speed_tolerance()
3039 val = clamp_val(val, 0, data->speed_tolerance_limit); in store_speed_tolerance()
3048 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0);
3049 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0);
3050 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0);
3051 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0);
3052 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0);
3053 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0);
3055 store_speed_tolerance, 0);
3085 if (err < 0) in store_weight_temp()
3088 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255); in store_weight_temp()
3098 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
3100 0644, show_weight_temp, store_weight_temp, 0, 0);
3102 0644, show_weight_temp, store_weight_temp, 0, 1);
3104 0644, show_weight_temp, store_weight_temp, 0, 2);
3105 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5);
3106 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6);
3136 if (err < 0) in store_fan_time()
3172 if (err < 0) in store_auto_pwm()
3181 val = 0xff; in store_auto_pwm()
3192 /* disable if needed (pwm == 0) */ in store_auto_pwm()
3197 reg |= 0x02; in store_auto_pwm()
3199 reg &= ~0x02; in store_auto_pwm()
3290 return 0; in nct6775_pwm_is_visible()
3294 return 0; in nct6775_pwm_is_visible()
3296 return 0; in nct6775_pwm_is_visible()
3298 return 0; in nct6775_pwm_is_visible()
3300 return 0; in nct6775_pwm_is_visible()
3306 return 0; in nct6775_pwm_is_visible()
3311 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0);
3313 show_fan_time, store_fan_time, 0, 1);
3315 show_fan_time, store_fan_time, 0, 2);
3316 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1);
3317 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2);
3319 show_temp_tolerance, store_temp_tolerance, 0, 0);
3321 0644, show_temp_tolerance, store_temp_tolerance, 0, 1);
3323 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3);
3325 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4);
3328 0644, show_auto_pwm, store_auto_pwm, 0, 0);
3330 0644, show_auto_temp, store_auto_temp, 0, 0);
3333 0644, show_auto_pwm, store_auto_pwm, 0, 1);
3335 0644, show_auto_temp, store_auto_temp, 0, 1);
3338 0644, show_auto_pwm, store_auto_pwm, 0, 2);
3340 0644, show_auto_temp, store_auto_temp, 0, 2);
3343 0644, show_auto_pwm, store_auto_pwm, 0, 3);
3345 0644, show_auto_temp, store_auto_temp, 0, 3);
3348 0644, show_auto_pwm, store_auto_pwm, 0, 4);
3350 0644, show_auto_temp, store_auto_temp, 0, 4);
3353 0644, show_auto_pwm, store_auto_pwm, 0, 5);
3355 0644, show_auto_temp, store_auto_temp, 0, 5);
3358 0644, show_auto_pwm, store_auto_pwm, 0, 6);
3360 0644, show_auto_temp, store_auto_temp, 0, 6);
3424 if (!(tmp & 0x01)) { in nct6775_init_device()
3425 err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01); in nct6775_init_device()
3432 for (i = 0; i < NUM_TEMP; i++) { in nct6775_init_device()
3440 if (tmp & 0x01) { in nct6775_init_device()
3441 err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe); in nct6775_init_device()
3451 if (!(tmp & 0x01)) { in nct6775_init_device()
3452 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01); in nct6775_init_device()
3461 for (i = 0; i < data->temp_fixed_num; i++) { in nct6775_init_device()
3471 return 0; in nct6775_init_device()
3480 for (i = 0; i < data->pwm_num && *available; i++) { in add_temp_sensors()
3488 src &= 0x1f; in add_temp_sensors()
3502 return 0; in add_temp_sensors()
3508 int i, s, err = 0; in nct6775_probe()
3525 data->bank = 0xff; /* Force initial bank selection */ in nct6775_probe()
3548 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; in nct6775_probe()
3556 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME; in nct6775_probe()
3560 data->REG_PWM[0] = NCT6116_REG_PWM; in nct6775_probe()
3581 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; in nct6775_probe()
3624 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN; in nct6775_probe()
3632 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME; in nct6775_probe()
3636 data->REG_PWM[0] = NCT6116_REG_PWM; in nct6775_probe()
3657 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP; in nct6775_probe()
3695 data->target_temp_mask = 0x7f; in nct6775_probe()
3696 data->tolerance_mask = 0x0f; in nct6775_probe()
3708 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; in nct6775_probe()
3716 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; in nct6775_probe()
3719 data->REG_PWM[0] = NCT6775_REG_PWM; in nct6775_probe()
3737 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; in nct6775_probe()
3771 data->target_temp_mask = 0xff; in nct6775_probe()
3772 data->tolerance_mask = 0x07; in nct6775_probe()
3784 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; in nct6775_probe()
3792 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; in nct6775_probe()
3796 data->REG_PWM[0] = NCT6775_REG_PWM; in nct6775_probe()
3813 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; in nct6775_probe()
3847 data->target_temp_mask = 0xff; in nct6775_probe()
3848 data->tolerance_mask = 0x07; in nct6775_probe()
3860 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; in nct6775_probe()
3868 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; in nct6775_probe()
3872 data->REG_PWM[0] = NCT6775_REG_PWM; in nct6775_probe()
3893 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP; in nct6775_probe()
3933 data->target_temp_mask = 0xff; in nct6775_probe()
3934 data->tolerance_mask = 0x07; in nct6775_probe()
3972 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; in nct6775_probe()
3980 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; in nct6775_probe()
3984 data->REG_PWM[0] = NCT6775_REG_PWM; in nct6775_probe()
4005 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; in nct6775_probe()
4027 num_reg_tsi_temp = 0; in nct6775_probe()
4064 data->target_temp_mask = 0xff; in nct6775_probe()
4065 data->tolerance_mask = 0x07; in nct6775_probe()
4087 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN; in nct6775_probe()
4095 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME; in nct6775_probe()
4099 data->REG_PWM[0] = NCT6775_REG_PWM; in nct6775_probe()
4118 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP; in nct6775_probe()
4142 data->have_temp = 0; in nct6775_probe()
4152 mask = 0; in nct6775_probe()
4153 available = 0; in nct6775_probe()
4154 for (i = 0; i < num_reg_temp; i++) { in nct6775_probe()
4155 if (reg_temp[i] == 0) in nct6775_probe()
4161 src &= 0x1f; in nct6775_probe()
4179 mask = 0; in nct6775_probe()
4181 for (i = 0; i < num_reg_temp; i++) { in nct6775_probe()
4182 if (reg_temp[i] == 0) in nct6775_probe()
4188 src &= 0x1f; in nct6775_probe()
4194 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", in nct6775_probe()
4205 data->reg_temp[0][src - 1] = reg_temp[i]; in nct6775_probe()
4226 data->reg_temp[0][s] = reg_temp[i]; in nct6775_probe()
4246 for (i = 0; i < num_reg_temp_mon; i++) { in nct6775_probe()
4247 if (reg_temp_mon[i] == 0) in nct6775_probe()
4253 src &= 0x1f; in nct6775_probe()
4259 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n", in nct6775_probe()
4282 data->reg_temp[0][src - 1] = reg_temp_mon[i]; in nct6775_probe()
4292 data->reg_temp[0][s] = reg_temp_mon[i]; in nct6775_probe()
4304 for (i = 0; i < 31; i++) { in nct6775_probe()
4316 data->reg_temp[0][i] = reg_temp_alternate[i]; in nct6775_probe()
4329 data->reg_temp[0][s] = reg_temp_alternate[i]; in nct6775_probe()
4336 for (i = 0; i < num_reg_tsi_temp; i++) { in nct6775_probe()