Lines Matching +full:25 +full:mv

40  * This corresponds to an arbitrary VRM code of 25 in the functions below.
66  * Returned value is in mV to avoid floating point in the kernel.
67  * Some VID have some bits in uV scale, this is rounded to mV.
76 		/* compute in uV, round to mV */  in vid_from_reg()
89 				/* compute in uV, round to mV */  in vid_from_reg()
100 	case 25:		/* AMD NPT 0Fh */  in vid_from_reg()
102 		return (val < 32) ? 1550 - 25 * val  in vid_from_reg()
103 			: 775 - (25 * (val - 31)) / 2;  in vid_from_reg()
115 				     1850 - val * 25;  in vid_from_reg()
119 		return (val & 0x10  ? 25 : 0) +  in vid_from_reg()
133 		return val & 0x10 ? 975 - (val & 0xF) * 25 :  in vid_from_reg()
143 				/* compute in uV, round to mV */  in vid_from_reg()
184 	 * thus use vrm 25, however in practice not all mainboards route the
189 	{X86_VENDOR_AMD, 0xF, 0x80, ANY, ANY, 25},	/* future fam. 0Fh */
190 	{X86_VENDOR_AMD, 0x10, 0x0, ANY, ANY, 25},	/* NPT family 10h */