18 #define IC_CONF                 0x0000
19 #define IC_PRP_ENC_RSC          0x0004
20 #define IC_PRP_VF_RSC           0x0008
21 #define IC_PP_RSC               0x000C
22 #define IC_CMBP_1               0x0010
23 #define IC_CMBP_2               0x0014
24 #define IC_IDMAC_1              0x0018
25 #define IC_IDMAC_2              0x001C
26 #define IC_IDMAC_3              0x0020
27 #define IC_IDMAC_4              0x0024
30 #define IC_CONF_PRPENC_EN       (1 << 0)
48 #define IC_IDMAC_1_CB0_BURST_16         (1 << 0)
56 #define IC_IDMAC_1_PRPENC_ROT_MASK      (0x7 << 11)
58 #define IC_IDMAC_1_PRPVF_ROT_MASK       (0x7 << 14)
60 #define IC_IDMAC_1_PP_ROT_MASK          (0x7 << 17)
66 #define IC_IDMAC_2_PRPENC_HEIGHT_MASK   (0x3ff << 0)
67 #define IC_IDMAC_2_PRPENC_HEIGHT_OFFSET 0
68 #define IC_IDMAC_2_PRPVF_HEIGHT_MASK    (0x3ff << 10)
70 #define IC_IDMAC_2_PP_HEIGHT_MASK       (0x3ff << 20)
73 #define IC_IDMAC_3_PRPENC_WIDTH_MASK    (0x3ff << 0)
74 #define IC_IDMAC_3_PRPENC_WIDTH_OFFSET  0
75 #define IC_IDMAC_3_PRPVF_WIDTH_MASK     (0x3ff << 10)
77 #define IC_IDMAC_3_PP_WIDTH_MASK        (0x3ff << 20)
97 		.tpmem_csc = {0x2008, 0},
101 		.tpmem_csc = {0x4028, 0x4040},
105 		.tpmem_csc = {0x6060, 0x6078},
113 		.ic_conf_cmb_en = 0,    /* NA */
115 		.ic_conf_csc2_en = 0,   /* NA */
116 		.ic_cmb_galpha_bit = 0, /* NA */
124 		.ic_cmb_galpha_bit = 0,
191 	param = ((a[0] & 0x1f) << 27) | ((c[0][0] & 0x1ff) << 18) |  in init_csc()
192 		((c[1][1] & 0x1ff) << 9) | (c[2][2] & 0x1ff);  in init_csc()
195 	param = ((a[0] & 0x1fe0) >> 5) | (csc->params.scale << 8) |  in init_csc()
199 	param = ((a[1] & 0x1f) << 27) | ((c[0][1] & 0x1ff) << 18) |  in init_csc()
200 		((c[1][0] & 0x1ff) << 9) | (c[2][0] & 0x1ff);  in init_csc()
203 	param = ((a[1] & 0x1fe0) >> 5);  in init_csc()
206 	param = ((a[2] & 0x1f) << 27) | ((c[0][2] & 0x1ff) << 18) |  in init_csc()
207 		((c[1][2] & 0x1ff) << 9) | (c[2][1] & 0x1ff);  in init_csc()
210 	param = ((a[2] & 0x1fe0) >> 5);  in init_csc()
213 	return 0;  in init_csc()
245 	temp_downsize = 0;  in calc_resize_coeffs()
262 		*resize_coeff = 0x3FFF;  in calc_resize_coeffs()
265 	return 0;  in calc_resize_coeffs()
333 	int ret = 0;  in ipu_ic_task_graphics_init()
356 		ret = init_csc(ic, &csc1, 0);  in ipu_ic_task_graphics_init()
376 		reg &= ~(0xff << ic->bit->ic_cmb_galpha_bit);  in ipu_ic_task_graphics_init()
406 	int ret = 0;  in ipu_ic_task_init_rsc()
435 	ret = init_csc(ic, csc, 0);  in ipu_ic_task_init_rsc()
448 				    out_width, out_height, 0);  in ipu_ic_task_init()
462 	int ret = 0;  in ipu_ic_task_idma_init()
472 	if (temp_rot & 0x2)	/* Need horizontal flip */  in ipu_ic_task_idma_init()
629 	return 0;  in ipu_ic_enable()
645 	if (priv->use_count < 0)  in ipu_ic_disable()
646 		priv->use_count = 0;  in ipu_ic_disable()
655 	return 0;  in ipu_ic_disable()
717 	dev_dbg(dev, "IC base: 0x%08lx remapped to %p\n", base, priv->base);  in ipu_ic_init()
721 	for (i = 0; i < IC_NUM_TASKS; i++) {  in ipu_ic_init()
728 	return 0;  in ipu_ic_init()