200  * @tile: tile to get info for
214  * NOTE: multi-tile bases will include the tile offset.
217 static int tile_vram_size(struct xe_tile *tile, u64 *vram_size,  in tile_vram_size()  argument
220 	struct xe_device *xe = tile_to_xe(tile);  in tile_vram_size()
221 	struct xe_gt *gt = tile->primary_gt;  in tile_vram_size()
232 			for_each_if(t->id < tile->id)  in tile_vram_size()
263 	/* remove the tile offset so we have just the available size */  in tile_vram_size()
272 	struct xe_tile *tile;  in vram_fini()  local
280 	for_each_tile(tile, xe, id)  in vram_fini()
281 		tile->mem.vram.mapping = NULL;  in vram_fini()
294 	struct xe_tile *tile;  in xe_vram_probe()  local
307 	/* Get the size of the root tile's vram for later accessibility comparison */  in xe_vram_probe()
308 	tile = xe_device_get_root_tile(xe);  in xe_vram_probe()
309 	err = tile_vram_size(tile, &vram_size, &tile_size, &tile_offset);  in xe_vram_probe()
322 	/* tile specific ranges */  in xe_vram_probe()
323 	for_each_tile(tile, xe, id) {  in xe_vram_probe()
324 		err = tile_vram_size(tile, &vram_size, &tile_size, &tile_offset);  in xe_vram_probe()
328 		tile->mem.vram.actual_physical_size = tile_size;  in xe_vram_probe()
329 		tile->mem.vram.io_start = xe->mem.vram.io_start + tile_offset;  in xe_vram_probe()
330 		tile->mem.vram.io_size = min_t(u64, vram_size, io_size);  in xe_vram_probe()
332 		if (!tile->mem.vram.io_size) {  in xe_vram_probe()
333 			drm_err(&xe->drm, "Tile without any CPU visible VRAM. Aborting.\n");  in xe_vram_probe()
337 		tile->mem.vram.dpa_base = xe->mem.vram.dpa_base + tile_offset;  in xe_vram_probe()
338 		tile->mem.vram.usable_size = vram_size;  in xe_vram_probe()
339 		tile->mem.vram.mapping = xe->mem.vram.mapping + tile_offset;  in xe_vram_probe()
341 		if (tile->mem.vram.io_size < tile->mem.vram.usable_size)  in xe_vram_probe()
344 …tile->id, &tile->mem.vram.actual_physical_size, &tile->mem.vram.usable_size, &tile->mem.vram.io_si…  in xe_vram_probe()
345 		drm_info(&xe->drm, "VRAM[%u, %u]: DPA range: [%pa-%llx], io range: [%pa-%llx]\n", id, tile->id,  in xe_vram_probe()
346 			 &tile->mem.vram.dpa_base, tile->mem.vram.dpa_base + (u64)tile->mem.vram.actual_physical_size,  in xe_vram_probe()
347 			 &tile->mem.vram.io_start, tile->mem.vram.io_start + (u64)tile->mem.vram.io_size);  in xe_vram_probe()
349 		/* calculate total size using tile size to get the correct HW sizing */  in xe_vram_probe()