22 #define _PAT_ATS				0x47fc
24 								   0x4800, 0x4804, \
25 								   0x4848, 0x484c)
26 #define _PAT_PTA				0x4820
33 #define XE2_COH_MODE				REG_GENMASK(1, 0)
38 #define XELPG_PAT_0_WB				REG_FIELD_PREP(XELPG_L4_POLICY_MASK, 0)
39 #define XELPG_INDEX_COH_MODE_MASK		REG_GENMASK(1, 0)
42 #define XELPG_0_COH_NON				REG_FIELD_PREP(XELPG_INDEX_COH_MODE_MASK, 0)
47 #define XELP_MEM_TYPE_MASK			REG_GENMASK(1, 0)
51 #define XELP_PAT_UC				REG_FIELD_PREP(XELP_MEM_TYPE_MASK, 0)
64 	[0] = { XELP_PAT_WB, XE_COH_AT_LEAST_1WAY },
71 	[0] = { XELP_PAT_UC, XE_COH_NONE },
82 	[0] = { XELPG_PAT_0_WB, XE_COH_NONE },
93  *   - no_promote:  0=promotable, 1=no promote
94  *   - comp_en:     0=disable, 1=enable
95  *   - l3clos:      L3 class of service (0-3)
96  *   - l3_policy:   0=WB, 1=XD ("WB - Transient Display"), 3=UC
97  *   - l4_policy:   0=WB, 1=WT, 3=UC
98  *   - coh_mode:    0=no snoop, 2=1-way coherent, 3=2-way coherent
101  * coherency (which matches an all-0's encoding), so we can just omit them
106 		.value = (no_promote ? XE2_NO_PROMOTE : 0) | \
107 			(comp_en ? XE2_COMP_EN : 0) | \
116 	[ 0] = XE2_PAT( 0, 0, 0, 0, 3, 0 ),
117 	[ 1] = XE2_PAT( 0, 0, 0, 0, 3, 2 ),
118 	[ 2] = XE2_PAT( 0, 0, 0, 0, 3, 3 ),
119 	[ 3] = XE2_PAT( 0, 0, 0, 3, 3, 0 ),
120 	[ 4] = XE2_PAT( 0, 0, 0, 3, 0, 2 ),
121 	[ 5] = XE2_PAT( 0, 0, 0, 3, 3, 2 ),
122 	[ 6] = XE2_PAT( 1, 0, 0, 1, 3, 0 ),
123 	[ 7] = XE2_PAT( 0, 0, 0, 3, 0, 3 ),
124 	[ 8] = XE2_PAT( 0, 0, 0, 3, 0, 0 ),
125 	[ 9] = XE2_PAT( 0, 1, 0, 0, 3, 0 ),
126 	[10] = XE2_PAT( 0, 1, 0, 3, 0, 0 ),
127 	[11] = XE2_PAT( 1, 1, 0, 1, 3, 0 ),
128 	[12] = XE2_PAT( 0, 1, 0, 3, 3, 0 ),
129 	[13] = XE2_PAT( 0, 0, 0, 0, 0, 0 ),
130 	[14] = XE2_PAT( 0, 1, 0, 0, 0, 0 ),
131 	[15] = XE2_PAT( 1, 1, 0, 1, 1, 0 ),
132 	/* 16..19 are reserved; leave set to all 0's */
133 	[20] = XE2_PAT( 0, 0, 1, 0, 3, 0 ),
134 	[21] = XE2_PAT( 0, 1, 1, 0, 3, 0 ),
135 	[22] = XE2_PAT( 0, 0, 1, 0, 3, 2 ),
136 	[23] = XE2_PAT( 0, 0, 1, 0, 3, 3 ),
137 	[24] = XE2_PAT( 0, 0, 2, 0, 3, 0 ),
138 	[25] = XE2_PAT( 0, 1, 2, 0, 3, 0 ),
139 	[26] = XE2_PAT( 0, 0, 2, 0, 3, 2 ),
140 	[27] = XE2_PAT( 0, 0, 2, 0, 3, 3 ),
141 	[28] = XE2_PAT( 0, 0, 3, 0, 3, 0 ),
142 	[29] = XE2_PAT( 0, 1, 3, 0, 3, 0 ),
143 	[30] = XE2_PAT( 0, 0, 3, 0, 3, 2 ),
144 	[31] = XE2_PAT( 0, 0, 3, 0, 3, 3 ),
148 static const struct xe_pat_table_entry xe2_pat_ats = XE2_PAT( 0, 0, 0, 0, 3, 3 );
149 static const struct xe_pat_table_entry xe2_pat_pta = XE2_PAT( 0, 0, 0, 0, 3, 0 );
151 u16 xe_pat_index_get_coh_mode(struct xe_device *xe, u16 pat_index)  in xe_pat_index_get_coh_mode()  argument
153 	WARN_ON(pat_index >= xe->pat.n_entries);  in xe_pat_index_get_coh_mode()
154 	return xe->pat.table[pat_index].coh_mode;  in xe_pat_index_get_coh_mode()
160 	for (int i = 0; i < n_entries; i++) {  in program_pat()
170 	for (int i = 0; i < n_entries; i++) {  in program_pat_mcr()
179 	struct xe_device *xe = gt_to_xe(gt);  in xelp_dump()  local
188 	for (i = 0; i < xe->pat.n_entries; i++) {  in xelp_dump()
198 	xe_assert(xe, !err);  in xelp_dump()
208 	struct xe_device *xe = gt_to_xe(gt);  in xehp_dump()  local
217 	for (i = 0; i < xe->pat.n_entries; i++) {  in xehp_dump()
229 	xe_assert(xe, !err);  in xehp_dump()
239 	struct xe_device *xe = gt_to_xe(gt);  in xehpc_dump()  local
248 	for (i = 0; i < xe->pat.n_entries; i++) {  in xehpc_dump()
258 	xe_assert(xe, !err);  in xehpc_dump()
268 	struct xe_device *xe = gt_to_xe(gt);  in xelpg_dump()  local
277 	for (i = 0; i < xe->pat.n_entries; i++) {  in xelpg_dump()
292 	xe_assert(xe, !err);  in xelpg_dump()
327 	struct xe_device *xe = gt_to_xe(gt);  in xe2_dump()  local
337 	for (i = 0; i < xe->pat.n_entries; i++) {  in xe2_dump()
374 	xe_assert(xe, !err);  in xe2_dump()
383 void xe_pat_init_early(struct xe_device *xe)  in xe_pat_init_early()  argument
385 	if (GRAPHICS_VER(xe) == 20) {  in xe_pat_init_early()
386 		xe->pat.ops = &xe2_pat_ops;  in xe_pat_init_early()
387 		xe->pat.table = xe2_pat_table;  in xe_pat_init_early()
390 		if (GRAPHICS_VERx100(xe) == 2001)  in xe_pat_init_early()
391 			xe->pat.n_entries = 28; /* Disable CLOS3 */  in xe_pat_init_early()
393 			xe->pat.n_entries = ARRAY_SIZE(xe2_pat_table);  in xe_pat_init_early()
395 		xe->pat.idx[XE_CACHE_NONE] = 3;  in xe_pat_init_early()
396 		xe->pat.idx[XE_CACHE_WT] = 15;  in xe_pat_init_early()
397 		xe->pat.idx[XE_CACHE_WB] = 2;  in xe_pat_init_early()
398 		xe->pat.idx[XE_CACHE_NONE_COMPRESSION] = 12; /*Applicable on xe2 and beyond */  in xe_pat_init_early()
399 	} else if (xe->info.platform == XE_METEORLAKE) {  in xe_pat_init_early()
400 		xe->pat.ops = &xelpg_pat_ops;  in xe_pat_init_early()
401 		xe->pat.table = xelpg_pat_table;  in xe_pat_init_early()
402 		xe->pat.n_entries = ARRAY_SIZE(xelpg_pat_table);  in xe_pat_init_early()
403 		xe->pat.idx[XE_CACHE_NONE] = 2;  in xe_pat_init_early()
404 		xe->pat.idx[XE_CACHE_WT] = 1;  in xe_pat_init_early()
405 		xe->pat.idx[XE_CACHE_WB] = 3;  in xe_pat_init_early()
406 	} else if (xe->info.platform == XE_PVC) {  in xe_pat_init_early()
407 		xe->pat.ops = &xehpc_pat_ops;  in xe_pat_init_early()
408 		xe->pat.table = xehpc_pat_table;  in xe_pat_init_early()
409 		xe->pat.n_entries = ARRAY_SIZE(xehpc_pat_table);  in xe_pat_init_early()
410 		xe->pat.idx[XE_CACHE_NONE] = 0;  in xe_pat_init_early()
411 		xe->pat.idx[XE_CACHE_WT] = 2;  in xe_pat_init_early()
412 		xe->pat.idx[XE_CACHE_WB] = 3;  in xe_pat_init_early()
413 	} else if (xe->info.platform == XE_DG2) {  in xe_pat_init_early()
418 		xe->pat.ops = &xehp_pat_ops;  in xe_pat_init_early()
419 		xe->pat.table = xelp_pat_table;  in xe_pat_init_early()
420 		xe->pat.n_entries = ARRAY_SIZE(xelp_pat_table);  in xe_pat_init_early()
421 		xe->pat.idx[XE_CACHE_NONE] = 3;  in xe_pat_init_early()
422 		xe->pat.idx[XE_CACHE_WT] = 2;  in xe_pat_init_early()
423 		xe->pat.idx[XE_CACHE_WB] = 0;  in xe_pat_init_early()
424 	} else if (GRAPHICS_VERx100(xe) <= 1210) {  in xe_pat_init_early()
425 		WARN_ON_ONCE(!IS_DGFX(xe) && !xe->info.has_llc);  in xe_pat_init_early()
426 		xe->pat.ops = &xelp_pat_ops;  in xe_pat_init_early()
427 		xe->pat.table = xelp_pat_table;  in xe_pat_init_early()
428 		xe->pat.n_entries = ARRAY_SIZE(xelp_pat_table);  in xe_pat_init_early()
429 		xe->pat.idx[XE_CACHE_NONE] = 3;  in xe_pat_init_early()
430 		xe->pat.idx[XE_CACHE_WT] = 2;  in xe_pat_init_early()
431 		xe->pat.idx[XE_CACHE_WB] = 0;  in xe_pat_init_early()
441 		drm_err(&xe->drm, "Missing PAT table for platform with graphics version %d.%02d!\n",  in xe_pat_init_early()
442 			GRAPHICS_VER(xe), GRAPHICS_VERx100(xe) % 100);  in xe_pat_init_early()
446 	if (IS_SRIOV_VF(xe))  in xe_pat_init_early()
447 		xe->pat.ops = NULL;  in xe_pat_init_early()
449 	xe_assert(xe, !xe->pat.ops || xe->pat.ops->dump);  in xe_pat_init_early()
450 	xe_assert(xe, !xe->pat.ops || xe->pat.ops->program_graphics);  in xe_pat_init_early()
451 	xe_assert(xe, !xe->pat.ops || MEDIA_VER(xe) < 13 || xe->pat.ops->program_media);  in xe_pat_init_early()
456 	struct xe_device *xe = gt_to_xe(gt);  in xe_pat_init()  local
458 	if (!xe->pat.ops)  in xe_pat_init()
462 		xe->pat.ops->program_media(gt, xe->pat.table, xe->pat.n_entries);  in xe_pat_init()
464 		xe->pat.ops->program_graphics(gt, xe->pat.table, xe->pat.n_entries);  in xe_pat_init()
469 	struct xe_device *xe = gt_to_xe(gt);  in xe_pat_dump()  local
471 	if (!xe->pat.ops)  in xe_pat_dump()
474 	xe->pat.ops->dump(gt, p);  in xe_pat_dump()