53 static void unmask_and_enable(struct xe_tile *tile, u32 irqregs, u32 bits)  in unmask_and_enable()  argument
61 	assert_iir_is_zero(mmio, IIR(irqregs));  in unmask_and_enable()
63 	xe_mmio_write32(mmio, IER(irqregs), bits);  in unmask_and_enable()
64 	xe_mmio_write32(mmio, IMR(irqregs), ~bits);  in unmask_and_enable()
67 	xe_mmio_read32(mmio, IMR(irqregs));  in unmask_and_enable()
71 static void mask_and_disable(struct xe_tile *tile, u32 irqregs)  in mask_and_disable()  argument
75 	xe_mmio_write32(mmio, IMR(irqregs), ~0);  in mask_and_disable()
77 	xe_mmio_read32(mmio, IMR(irqregs));  in mask_and_disable()
79 	xe_mmio_write32(mmio, IER(irqregs), 0);  in mask_and_disable()
82 	xe_mmio_write32(mmio, IIR(irqregs), ~0);  in mask_and_disable()
83 	xe_mmio_read32(mmio, IIR(irqregs));  in mask_and_disable()
84 	xe_mmio_write32(mmio, IIR(irqregs), ~0);  in mask_and_disable()
85 	xe_mmio_read32(mmio, IIR(irqregs));  in mask_and_disable()