27  * ISR, IMR, IIR, IER.
30 #define IIR(offset)				XE_REG(offset + 0x8)  macro
59 	 * be raised in the IIR.  in unmask_and_enable()
61 	assert_iir_is_zero(mmio, IIR(irqregs));  in unmask_and_enable()
81 	/* IIR can theoretically queue up two events. Be paranoid. */  in mask_and_disable()
82 	xe_mmio_write32(mmio, IIR(irqregs), ~0);  in mask_and_disable()
83 	xe_mmio_read32(mmio, IIR(irqregs));  in mask_and_disable()
84 	xe_mmio_write32(mmio, IIR(irqregs), ~0);  in mask_and_disable()
85 	xe_mmio_read32(mmio, IIR(irqregs));  in mask_and_disable()
107 	u32 iir;  in gu_misc_irq_ack()  local
112 	iir = xe_mmio_read32(mmio, IIR(GU_MISC_IRQ_OFFSET));  in gu_misc_irq_ack()
113 	if (likely(iir))  in gu_misc_irq_ack()
114 		xe_mmio_write32(mmio, IIR(GU_MISC_IRQ_OFFSET), iir);  in gu_misc_irq_ack()
116 	return iir;  in gu_misc_irq_ack()
245 gt_other_irq_handler(struct xe_gt *gt, const u8 instance, const u16 iir)  in gt_other_irq_handler()  argument
248 		return xe_guc_irq_handler(&gt->uc.guc, iir);  in gt_other_irq_handler()
250 		return xe_guc_irq_handler(&gt->uc.guc, iir);  in gt_other_irq_handler()
252 		return xe_gsc_proxy_irq_handler(&gt->uc.gsc, iir);  in gt_other_irq_handler()
256 		WARN_ONCE(1, "unhandled other interrupt instance=0x%x, iir=0x%x\n",  in gt_other_irq_handler()
257 			  instance, iir);  in gt_other_irq_handler()