Lines Matching +full:y +full:- +full:max
1 // SPDX-License-Identifier: MIT
6 #include <linux/hwmon-sysfs.h>
43 * SF_* - scale factors for particular quantities according to hwmon spec.
52 * struct xe_hwmon_energy_info - to accumulate energy
62 * struct xe_hwmon - xe hwmon data structure
84 struct xe_device *xe = hwmon->xe; in xe_hwmon_get_reg()
88 if (xe->info.platform == XE_BATTLEMAGE) { in xe_hwmon_get_reg()
93 } else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG) { in xe_hwmon_get_reg()
95 } else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG)) { in xe_hwmon_get_reg()
100 if (xe->info.platform == XE_BATTLEMAGE) in xe_hwmon_get_reg()
102 else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG) in xe_hwmon_get_reg()
104 else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG)) in xe_hwmon_get_reg()
108 if (xe->info.platform == XE_BATTLEMAGE) in xe_hwmon_get_reg()
110 else if (xe->info.platform == XE_PVC) in xe_hwmon_get_reg()
112 else if (xe->info.platform == XE_DG2) in xe_hwmon_get_reg()
116 if (xe->info.platform == XE_DG2 && channel == CHANNEL_PKG) in xe_hwmon_get_reg()
120 if (xe->info.platform == XE_BATTLEMAGE) { in xe_hwmon_get_reg()
125 } else if (xe->info.platform == XE_PVC && channel == CHANNEL_PKG) { in xe_hwmon_get_reg()
127 } else if ((xe->info.platform == XE_DG2) && (channel == CHANNEL_PKG)) { in xe_hwmon_get_reg()
132 drm_warn(&xe->drm, "Unknown xe hwmon reg id: %d\n", hwmon_reg); in xe_hwmon_get_reg()
143 * "typical but not guaranteed" min/max values in REG_PKG_POWER_SKU. Follow the
149 u64 reg_val, min, max; in xe_hwmon_power_max_read() local
150 struct xe_device *xe = hwmon->xe; in xe_hwmon_power_max_read()
162 drm_warn(&xe->drm, "pkg_power_sku invalid\n"); in xe_hwmon_power_max_read()
167 mutex_lock(&hwmon->hwmon_lock); in xe_hwmon_power_max_read()
177 *value = mul_u64_u32_shr(reg_val, SF_POWER, hwmon->scl_shift_power); in xe_hwmon_power_max_read()
181 min = mul_u64_u32_shr(min, SF_POWER, hwmon->scl_shift_power); in xe_hwmon_power_max_read()
182 max = REG_FIELD_GET(PKG_MAX_PWR, reg_val); in xe_hwmon_power_max_read()
183 max = mul_u64_u32_shr(max, SF_POWER, hwmon->scl_shift_power); in xe_hwmon_power_max_read()
185 if (min && max) in xe_hwmon_power_max_read()
186 *value = clamp_t(u64, *value, min, max); in xe_hwmon_power_max_read()
188 mutex_unlock(&hwmon->hwmon_lock); in xe_hwmon_power_max_read()
193 struct xe_gt *mmio = xe_root_mmio_gt(hwmon->xe); in xe_hwmon_power_max_write()
200 mutex_lock(&hwmon->hwmon_lock); in xe_hwmon_power_max_write()
207 drm_warn(&hwmon->xe->drm, "PL1 disable is not supported!\n"); in xe_hwmon_power_max_write()
208 ret = -EOPNOTSUPP; in xe_hwmon_power_max_write()
213 /* Computation in 64-bits to avoid overflow. Round to nearest. */ in xe_hwmon_power_max_write()
214 reg_val = DIV_ROUND_CLOSEST_ULL((u64)value << hwmon->scl_shift_power, SF_POWER); in xe_hwmon_power_max_write()
219 mutex_unlock(&hwmon->hwmon_lock); in xe_hwmon_power_max_write()
225 struct xe_gt *mmio = xe_root_mmio_gt(hwmon->xe); in xe_hwmon_power_rated_max_read()
236 *value = mul_u64_u32_shr(reg_val, SF_POWER, hwmon->scl_shift_power); in xe_hwmon_power_rated_max_read()
240 * xe_hwmon_energy_get - Obtain energy value
242 * The underlying energy hardware register is 32-bits and is subject to
245 * a power draw of 1000 watts, the 32-bit counter will overflow in
249 * 1 watt: (2^32 >> 14) / 1 W / (60 * 60 * 24) secs/day -> 3 days
250 * 1000 watts: (2^32 >> 14) / 1000 W / 60 secs/min -> 4.36 minutes
256 * hwmon->scl_shift_energy of 14 bits we have 57 (63 - 20 + 14) bits before
262 struct xe_gt *mmio = xe_root_mmio_gt(hwmon->xe); in xe_hwmon_energy_get()
263 struct xe_hwmon_energy_info *ei = &hwmon->ei[channel]; in xe_hwmon_energy_get()
269 if (reg_val >= ei->reg_val_prev) in xe_hwmon_energy_get()
270 ei->accum_energy += reg_val - ei->reg_val_prev; in xe_hwmon_energy_get()
272 ei->accum_energy += UINT_MAX - ei->reg_val_prev + reg_val; in xe_hwmon_energy_get()
274 ei->reg_val_prev = reg_val; in xe_hwmon_energy_get()
276 *energy = mul_u64_u32_shr(ei->accum_energy, SF_ENERGY, in xe_hwmon_energy_get()
277 hwmon->scl_shift_energy); in xe_hwmon_energy_get()
285 struct xe_gt *mmio = xe_root_mmio_gt(hwmon->xe); in xe_hwmon_power_max_interval_show()
286 u32 x, y, x_w = 2; /* 2 bits */ in xe_hwmon_power_max_interval_show() local
288 int sensor_index = to_sensor_dev_attr(attr)->index; in xe_hwmon_power_max_interval_show()
290 xe_pm_runtime_get(hwmon->xe); in xe_hwmon_power_max_interval_show()
292 mutex_lock(&hwmon->hwmon_lock); in xe_hwmon_power_max_interval_show()
296 mutex_unlock(&hwmon->hwmon_lock); in xe_hwmon_power_max_interval_show()
298 xe_pm_runtime_put(hwmon->xe); in xe_hwmon_power_max_interval_show()
301 y = REG_FIELD_GET(PKG_PWR_LIM_1_TIME_Y, r); in xe_hwmon_power_max_interval_show()
304 * tau = 1.x * power(2,y), x = bits(23:22), y = bits(21:17) in xe_hwmon_power_max_interval_show()
305 * = (4 | x) << (y - 2) in xe_hwmon_power_max_interval_show()
307 * Here (y - 2) ensures a 1.x fixed point representation of 1.x in xe_hwmon_power_max_interval_show()
310 * As y can be < 2, we compute tau4 = (4 | x) << y in xe_hwmon_power_max_interval_show()
313 tau4 = (u64)((1 << x_w) | x) << y; in xe_hwmon_power_max_interval_show()
316 out = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w); in xe_hwmon_power_max_interval_show()
326 struct xe_gt *mmio = xe_root_mmio_gt(hwmon->xe); in xe_hwmon_power_max_interval_store()
327 u32 x, y, rxy, x_w = 2; /* 2 bits */ in xe_hwmon_power_max_interval_store() local
331 int sensor_index = to_sensor_dev_attr(attr)->index; in xe_hwmon_power_max_interval_store()
338 * Max HW supported tau in '1.x * power(2,y)' format, x = 0, y = 0x12. in xe_hwmon_power_max_interval_store()
339 * The hwmon->scl_shift_time default of 0xa results in a max tau of 256 seconds. in xe_hwmon_power_max_interval_store()
349 * val must be < max in hwmon interface units. The steps below are in xe_hwmon_power_max_interval_store()
354 y = REG_FIELD_GET(PKG_MAX_WIN_Y, r); in xe_hwmon_power_max_interval_store()
355 tau4 = (u64)((1 << x_w) | x) << y; in xe_hwmon_power_max_interval_store()
356 max_win = mul_u64_u32_shr(tau4, SF_TIME, hwmon->scl_shift_time + x_w); in xe_hwmon_power_max_interval_store()
359 return -EINVAL; in xe_hwmon_power_max_interval_store()
362 val = DIV_ROUND_CLOSEST_ULL((u64)val << hwmon->scl_shift_time, SF_TIME); in xe_hwmon_power_max_interval_store()
365 * Convert val to 1.x * power(2,y) in xe_hwmon_power_max_interval_store()
366 * y = ilog2(val) in xe_hwmon_power_max_interval_store()
367 * x = (val - (1 << y)) >> (y - 2) in xe_hwmon_power_max_interval_store()
370 y = 0; in xe_hwmon_power_max_interval_store()
373 y = ilog2(val); in xe_hwmon_power_max_interval_store()
374 x = (val - (1ul << y)) << x_w >> y; in xe_hwmon_power_max_interval_store()
377 rxy = REG_FIELD_PREP(PKG_PWR_LIM_1_TIME_X, x) | REG_FIELD_PREP(PKG_PWR_LIM_1_TIME_Y, y); in xe_hwmon_power_max_interval_store()
379 xe_pm_runtime_get(hwmon->xe); in xe_hwmon_power_max_interval_store()
381 mutex_lock(&hwmon->hwmon_lock); in xe_hwmon_power_max_interval_store()
386 mutex_unlock(&hwmon->hwmon_lock); in xe_hwmon_power_max_interval_store()
388 xe_pm_runtime_put(hwmon->xe); in xe_hwmon_power_max_interval_store()
414 xe_pm_runtime_get(hwmon->xe); in xe_hwmon_attributes_visible()
416 ret = xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, index)) ? attr->mode : 0; in xe_hwmon_attributes_visible()
418 xe_pm_runtime_put(hwmon->xe); in xe_hwmon_attributes_visible()
445 struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe); in xe_hwmon_pcode_read_i1()
448 if (hwmon->xe->info.platform == XE_DG2) in xe_hwmon_pcode_read_i1()
449 return -ENXIO; in xe_hwmon_pcode_read_i1()
458 struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe); in xe_hwmon_pcode_write_i1()
471 mutex_lock(&hwmon->hwmon_lock); in xe_hwmon_power_curr_crit_read()
480 mutex_unlock(&hwmon->hwmon_lock); in xe_hwmon_power_curr_crit_read()
490 mutex_lock(&hwmon->hwmon_lock); in xe_hwmon_power_curr_crit_write()
495 mutex_unlock(&hwmon->hwmon_lock); in xe_hwmon_power_curr_crit_write()
501 struct xe_gt *mmio = xe_root_mmio_gt(hwmon->xe); in xe_hwmon_get_voltage()
548 return -EOPNOTSUPP; in xe_hwmon_power_read()
561 return -EOPNOTSUPP; in xe_hwmon_power_write()
595 return -EOPNOTSUPP; in xe_hwmon_curr_read()
606 return -EOPNOTSUPP; in xe_hwmon_curr_write()
631 return -EOPNOTSUPP; in xe_hwmon_in_read()
656 return -EOPNOTSUPP; in xe_hwmon_energy_read()
667 xe_pm_runtime_get(hwmon->xe); in xe_hwmon_is_visible()
687 xe_pm_runtime_put(hwmon->xe); in xe_hwmon_is_visible()
699 xe_pm_runtime_get(hwmon->xe); in xe_hwmon_read()
715 ret = -EOPNOTSUPP; in xe_hwmon_read()
719 xe_pm_runtime_put(hwmon->xe); in xe_hwmon_read()
731 xe_pm_runtime_get(hwmon->xe); in xe_hwmon_write()
741 ret = -EOPNOTSUPP; in xe_hwmon_write()
745 xe_pm_runtime_put(hwmon->xe); in xe_hwmon_write()
765 return -EOPNOTSUPP; in xe_hwmon_read_label()
785 struct xe_hwmon *hwmon = xe->hwmon; in xe_hwmon_get_preregistration_info()
798 hwmon->scl_shift_power = REG_FIELD_GET(PKG_PWR_UNIT, val_sku_unit); in xe_hwmon_get_preregistration_info()
799 hwmon->scl_shift_energy = REG_FIELD_GET(PKG_ENERGY_UNIT, val_sku_unit); in xe_hwmon_get_preregistration_info()
800 hwmon->scl_shift_time = REG_FIELD_GET(PKG_TIME_UNIT, val_sku_unit); in xe_hwmon_get_preregistration_info()
816 mutex_destroy(&hwmon->hwmon_lock); in xe_hwmon_mutex_destroy()
821 struct device *dev = xe->drm.dev; in xe_hwmon_register()
836 xe->hwmon = hwmon; in xe_hwmon_register()
838 mutex_init(&hwmon->hwmon_lock); in xe_hwmon_register()
843 hwmon->xe = xe; in xe_hwmon_register()
847 drm_dbg(&xe->drm, "Register xe hwmon interface\n"); in xe_hwmon_register()
850 hwmon->hwmon_dev = devm_hwmon_device_register_with_info(dev, "xe", hwmon, in xe_hwmon_register()
854 if (IS_ERR(hwmon->hwmon_dev)) { in xe_hwmon_register()
855 drm_warn(&xe->drm, "Failed to register xe hwmon (%pe)\n", hwmon->hwmon_dev); in xe_hwmon_register()
856 xe->hwmon = NULL; in xe_hwmon_register()