16 #define GSC_BAR_LENGTH  0x00000FFC
18 #define DG1_GSC_HECI2_BASE			0x259000
19 #define PVC_GSC_HECI2_BASE			0x285000
20 #define DG2_GSC_HECI2_BASE			0x374000
91 void xe_heci_gsc_fini(struct xe_device *xe)  in xe_heci_gsc_fini()  argument
93 	struct xe_heci_gsc *heci_gsc = &xe->heci_gsc;  in xe_heci_gsc_fini()
95 	if (!HAS_HECI_GSCFI(xe) && !HAS_HECI_CSCFI(xe))  in xe_heci_gsc_fini()
106 	if (heci_gsc->irq >= 0)  in xe_heci_gsc_fini()
111 static int heci_gsc_irq_setup(struct xe_device *xe)  in heci_gsc_irq_setup()  argument
113 	struct xe_heci_gsc *heci_gsc = &xe->heci_gsc;  in heci_gsc_irq_setup()
116 	heci_gsc->irq = irq_alloc_desc(0);  in heci_gsc_irq_setup()
117 	if (heci_gsc->irq < 0) {  in heci_gsc_irq_setup()
118 		drm_err(&xe->drm, "gsc irq error %d\n", heci_gsc->irq);  in heci_gsc_irq_setup()
123 	if (ret < 0)  in heci_gsc_irq_setup()
124 		drm_err(&xe->drm, "gsc irq init failed %d\n", ret);  in heci_gsc_irq_setup()
129 static int heci_gsc_add_device(struct xe_device *xe, const struct heci_gsc_def *def)  in heci_gsc_add_device()  argument
131 	struct xe_heci_gsc *heci_gsc = &xe->heci_gsc;  in heci_gsc_add_device()
132 	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);  in heci_gsc_add_device()
141 	adev->bar.parent = &pdev->resource[0];  in heci_gsc_add_device()
142 	adev->bar.start = def->bar + pdev->resource[0].start;  in heci_gsc_add_device()
156 	if (ret < 0) {  in heci_gsc_add_device()
157 		drm_err(&xe->drm, "gsc aux init failed %d\n", ret);  in heci_gsc_add_device()
164 	if (ret < 0) {  in heci_gsc_add_device()
165 		drm_err(&xe->drm, "gsc aux add failed %d\n", ret);  in heci_gsc_add_device()
174 void xe_heci_gsc_init(struct xe_device *xe)  in xe_heci_gsc_init()  argument
176 	struct xe_heci_gsc *heci_gsc = &xe->heci_gsc;  in xe_heci_gsc_init()
180 	if (!HAS_HECI_GSCFI(xe) && !HAS_HECI_CSCFI(xe))  in xe_heci_gsc_init()
185 	if (xe->info.platform == XE_BATTLEMAGE) {  in xe_heci_gsc_init()
187 	} else if (xe->info.platform == XE_PVC) {  in xe_heci_gsc_init()
189 	} else if (xe->info.platform == XE_DG2) {  in xe_heci_gsc_init()
191 	} else if (xe->info.platform == XE_DG1) {  in xe_heci_gsc_init()
194 		drm_warn_once(&xe->drm, "Unknown platform\n");  in xe_heci_gsc_init()
199 		drm_warn_once(&xe->drm, "HECI is not implemented!\n");  in xe_heci_gsc_init()
204 		ret = heci_gsc_irq_setup(xe);  in xe_heci_gsc_init()
209 	ret = heci_gsc_add_device(xe, def);  in xe_heci_gsc_init()
215 	xe_heci_gsc_fini(xe);  in xe_heci_gsc_init()
218 void xe_heci_gsc_irq_handler(struct xe_device *xe, u32 iir)  in xe_heci_gsc_irq_handler()  argument
222 	if ((iir & GSC_IRQ_INTF(1)) == 0)  in xe_heci_gsc_irq_handler()
225 	if (!HAS_HECI_GSCFI(xe)) {  in xe_heci_gsc_irq_handler()
226 		drm_warn_once(&xe->drm, "GSC irq: not supported");  in xe_heci_gsc_irq_handler()
230 	if (xe->heci_gsc.irq < 0)  in xe_heci_gsc_irq_handler()
233 	ret = generic_handle_irq(xe->heci_gsc.irq);  in xe_heci_gsc_irq_handler()
235 		drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", ret);  in xe_heci_gsc_irq_handler()
238 void xe_heci_csc_irq_handler(struct xe_device *xe, u32 iir)  in xe_heci_csc_irq_handler()  argument
242 	if ((iir & CSC_IRQ_INTF(1)) == 0)  in xe_heci_csc_irq_handler()
245 	if (!HAS_HECI_CSCFI(xe)) {  in xe_heci_csc_irq_handler()
246 		drm_warn_once(&xe->drm, "CSC irq: not supported");  in xe_heci_csc_irq_handler()
250 	if (xe->heci_gsc.irq < 0)  in xe_heci_csc_irq_handler()
253 	ret = generic_handle_irq(xe->heci_gsc.irq);  in xe_heci_csc_irq_handler()
255 		drm_err_ratelimited(&xe->drm, "error handling GSC irq: %d\n", ret);  in xe_heci_csc_irq_handler()