19  * DOC: GT Multicast/Replicated (MCR) Register Support
21  * Some GT registers are designed as "multicast" or "replicated" registers:
240 static void init_steering_l3bank(struct xe_gt *gt)  in init_steering_l3bank()  argument
242 	if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270) {  in init_steering_l3bank()
244 						xe_mmio_read32(gt, MIRROR_FUSE3));  in init_steering_l3bank()
246 					      xe_mmio_read32(gt, XEHP_FUSE4));  in init_steering_l3bank()
252 		gt->steering[L3BANK].group_target = __ffs(mslice_mask);  in init_steering_l3bank()
253 		gt->steering[L3BANK].instance_target =  in init_steering_l3bank()
255 	} else if (gt_to_xe(gt)->info.platform == XE_DG2) {  in init_steering_l3bank()
257 						xe_mmio_read32(gt, MIRROR_FUSE3));  in init_steering_l3bank()
265 		gt->steering[L3BANK].group_target = (bank >> 2) & 0x7;  in init_steering_l3bank()
266 		gt->steering[L3BANK].instance_target = bank & 0x3;  in init_steering_l3bank()
269 					 ~xe_mmio_read32(gt, MIRROR_FUSE3));  in init_steering_l3bank()
271 		gt->steering[L3BANK].group_target = 0;	/* unused */  in init_steering_l3bank()
272 		gt->steering[L3BANK].instance_target = __ffs(fuse);  in init_steering_l3bank()
276 static void init_steering_mslice(struct xe_gt *gt)  in init_steering_mslice()  argument
279 				 xe_mmio_read32(gt, MIRROR_FUSE3));  in init_steering_mslice()
288 	gt->steering[MSLICE].group_target = __ffs(mask);  in init_steering_mslice()
289 	gt->steering[MSLICE].instance_target = 0;	/* unused */  in init_steering_mslice()
296 	gt->steering[LNCF].group_target = __ffs(mask) << 1;  in init_steering_mslice()
297 	gt->steering[LNCF].instance_target = 0;		/* unused */  in init_steering_mslice()
300 static unsigned int dss_per_group(struct xe_gt *gt)  in dss_per_group()  argument
302 	struct xe_guc *guc = &gt->uc.guc;  in dss_per_group()
331 	xe_gt_dbg(gt, "GuC hwconfig cannot provide dss/slice; using typical fallback values\n");  in dss_per_group()
332 	if (gt_to_xe(gt)->info.platform == XE_PVC)  in dss_per_group()
334 	else if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1250)  in dss_per_group()
342  * @gt: GT structure
347 void xe_gt_mcr_get_dss_steering(struct xe_gt *gt, unsigned int dss, u16 *group, u16 *instance)  in xe_gt_mcr_get_dss_steering()  argument
349 	xe_gt_assert(gt, dss < XE_MAX_DSS_FUSE_BITS);  in xe_gt_mcr_get_dss_steering()
351 	*group = dss / gt->steering_dss_per_grp;  in xe_gt_mcr_get_dss_steering()
352 	*instance = dss % gt->steering_dss_per_grp;  in xe_gt_mcr_get_dss_steering()
355 static void init_steering_dss(struct xe_gt *gt)  in init_steering_dss()  argument
357 	gt->steering_dss_per_grp = dss_per_group(gt);  in init_steering_dss()
359 	xe_gt_mcr_get_dss_steering(gt,  in init_steering_dss()
360 				   min(xe_dss_mask_group_ffs(gt->fuse_topo.g_dss_mask, 0, 0),  in init_steering_dss()
361 				       xe_dss_mask_group_ffs(gt->fuse_topo.c_dss_mask, 0, 0)),  in init_steering_dss()
362 				   &gt->steering[DSS].group_target,  in init_steering_dss()
363 				   &gt->steering[DSS].instance_target);  in init_steering_dss()
366 static void init_steering_oaddrm(struct xe_gt *gt)  in init_steering_oaddrm()  argument
372 	if (gt->info.engine_mask & (XE_HW_ENGINE_VCS0 | XE_HW_ENGINE_VECS0))  in init_steering_oaddrm()
373 		gt->steering[OADDRM].group_target = 0;  in init_steering_oaddrm()
375 		gt->steering[OADDRM].group_target = 1;  in init_steering_oaddrm()
377 	gt->steering[OADDRM].instance_target = 0;	/* unused */  in init_steering_oaddrm()
380 static void init_steering_sqidi_psmi(struct xe_gt *gt)  in init_steering_sqidi_psmi()  argument
383 				 xe_mmio_read32(gt, MIRROR_FUSE3));  in init_steering_sqidi_psmi()
386 	gt->steering[SQIDI_PSMI].group_target = select >> 1;  in init_steering_sqidi_psmi()
387 	gt->steering[SQIDI_PSMI].instance_target = select & 0x1;  in init_steering_sqidi_psmi()
390 static void init_steering_inst0(struct xe_gt *gt)  in init_steering_inst0()  argument
392 	gt->steering[INSTANCE0].group_target = 0;	/* unused */  in init_steering_inst0()
393 	gt->steering[INSTANCE0].instance_target = 0;	/* unused */  in init_steering_inst0()
398 	void (*init)(struct xe_gt *gt);
412  * @gt: GT structure
418 void xe_gt_mcr_init_early(struct xe_gt *gt)  in xe_gt_mcr_init_early()  argument
423 	spin_lock_init(&gt->mcr_lock);  in xe_gt_mcr_init_early()
428  * @gt: GT structure
432 void xe_gt_mcr_init(struct xe_gt *gt)  in xe_gt_mcr_init()  argument
434 	struct xe_device *xe = gt_to_xe(gt);  in xe_gt_mcr_init()
439 	if (gt->info.type == XE_GT_TYPE_MEDIA) {  in xe_gt_mcr_init()
443 			gt->steering[OADDRM].ranges = xe2lpm_gpmxmt_steering_table;  in xe_gt_mcr_init()
444 			gt->steering[INSTANCE0].ranges = xe2lpm_instance0_steering_table;  in xe_gt_mcr_init()
446 			gt->steering[OADDRM].ranges = xelpmp_oaddrm_steering_table;  in xe_gt_mcr_init()
450 			gt->steering[DSS].ranges = xe2lpg_dss_steering_table;  in xe_gt_mcr_init()
451 			gt->steering[SQIDI_PSMI].ranges = xe2lpg_sqidi_psmi_steering_table;  in xe_gt_mcr_init()
452 			gt->steering[INSTANCE0].ranges = xe2lpg_instance0_steering_table;  in xe_gt_mcr_init()
454 			gt->steering[INSTANCE0].ranges = xelpg_instance0_steering_table;  in xe_gt_mcr_init()
455 			gt->steering[L3BANK].ranges = xelpg_l3bank_steering_table;  in xe_gt_mcr_init()
456 			gt->steering[DSS].ranges = xelpg_dss_steering_table;  in xe_gt_mcr_init()
458 			gt->steering[INSTANCE0].ranges = xehpc_instance0_steering_table;  in xe_gt_mcr_init()
459 			gt->steering[DSS].ranges = xehpc_dss_steering_table;  in xe_gt_mcr_init()
461 			gt->steering[L3BANK].ranges = xehp_l3bank_steering_table;  in xe_gt_mcr_init()
462 			gt->steering[MSLICE].ranges = xehp_mslice_steering_table;  in xe_gt_mcr_init()
463 			gt->steering[LNCF].ranges = xehp_lncf_steering_table;  in xe_gt_mcr_init()
464 			gt->steering[DSS].ranges = xehp_dss_steering_table;  in xe_gt_mcr_init()
465 			gt->steering[IMPLICIT_STEERING].ranges = dg2_implicit_steering_table;  in xe_gt_mcr_init()
467 			gt->steering[L3BANK].ranges = xelp_l3bank_steering_table;  in xe_gt_mcr_init()
468 			gt->steering[DSS].ranges = xelp_dss_steering_table;  in xe_gt_mcr_init()
474 		if (gt->steering[i].ranges && xe_steering_types[i].init)  in xe_gt_mcr_init()
475 			xe_steering_types[i].init(gt);  in xe_gt_mcr_init()
480  * @gt: GT structure
486 void xe_gt_mcr_set_implicit_defaults(struct xe_gt *gt)  in xe_gt_mcr_set_implicit_defaults()  argument
488 	struct xe_device *xe = gt_to_xe(gt);  in xe_gt_mcr_set_implicit_defaults()
497 		xe_mmio_write32(gt, MCFG_MCR_SELECTOR, steer_val);  in xe_gt_mcr_set_implicit_defaults()
498 		xe_mmio_write32(gt, SF_MCR_SELECTOR, steer_val);  in xe_gt_mcr_set_implicit_defaults()
511  * @gt: GT structure
524 static bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,  in xe_gt_mcr_get_nonterminated_steering()  argument
532 		if (!gt->steering[type].ranges)  in xe_gt_mcr_get_nonterminated_steering()
535 		for (int i = 0; gt->steering[type].ranges[i].end > 0; i++) {  in xe_gt_mcr_get_nonterminated_steering()
536 			if (xe_mmio_in_range(gt, &gt->steering[type].ranges[i], reg)) {  in xe_gt_mcr_get_nonterminated_steering()
537 				*group = gt->steering[type].group_target;  in xe_gt_mcr_get_nonterminated_steering()
538 				*instance = gt->steering[type].instance_target;  in xe_gt_mcr_get_nonterminated_steering()
544 	implicit_ranges = gt->steering[IMPLICIT_STEERING].ranges;  in xe_gt_mcr_get_nonterminated_steering()
547 			if (xe_mmio_in_range(gt, &implicit_ranges[i], reg))  in xe_gt_mcr_get_nonterminated_steering()
554 	drm_WARN(&gt_to_xe(gt)->drm, true,  in xe_gt_mcr_get_nonterminated_steering()
568 static void mcr_lock(struct xe_gt *gt) __acquires(&gt->mcr_lock)  in mcr_lock()  argument
570 	struct xe_device *xe = gt_to_xe(gt);  in mcr_lock()
573 	spin_lock(&gt->mcr_lock);  in mcr_lock()
582 		ret = xe_mmio_wait32(gt, STEER_SEMAPHORE, 0x1, 0x1, 10, NULL,  in mcr_lock()
588 static void mcr_unlock(struct xe_gt *gt) __releases(&gt->mcr_lock)  in mcr_unlock()  argument
591 	if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270)  in mcr_unlock()
592 		xe_mmio_write32(gt, STEER_SEMAPHORE, 0x1);  in mcr_unlock()
594 	spin_unlock(&gt->mcr_lock);  in mcr_unlock()
602 static u32 rw_with_mcr_steering(struct xe_gt *gt, struct xe_reg_mcr reg_mcr,  in rw_with_mcr_steering()  argument
609 	lockdep_assert_held(&gt->mcr_lock);  in rw_with_mcr_steering()
611 	if (GRAPHICS_VERx100(gt_to_xe(gt)) >= 1270) {  in rw_with_mcr_steering()
638 	xe_mmio_write32(gt, steer_reg, steer_val);  in rw_with_mcr_steering()
641 		val = xe_mmio_read32(gt, reg);  in rw_with_mcr_steering()
643 		xe_mmio_write32(gt, reg, value);  in rw_with_mcr_steering()
652 		xe_mmio_write32(gt, steer_reg, MCR_MULTICAST);  in rw_with_mcr_steering()
659  * @gt: GT structure
662  * Reads a GT MCR register.  The read will be steered to a non-terminated
669 u32 xe_gt_mcr_unicast_read_any(struct xe_gt *gt, struct xe_reg_mcr reg_mcr)  in xe_gt_mcr_unicast_read_any()  argument
676 	xe_gt_assert(gt, !IS_SRIOV_VF(gt_to_xe(gt)));  in xe_gt_mcr_unicast_read_any()
678 	steer = xe_gt_mcr_get_nonterminated_steering(gt, reg_mcr,  in xe_gt_mcr_unicast_read_any()
682 		mcr_lock(gt);  in xe_gt_mcr_unicast_read_any()
683 		val = rw_with_mcr_steering(gt, reg_mcr, MCR_OP_READ,  in xe_gt_mcr_unicast_read_any()
685 		mcr_unlock(gt);  in xe_gt_mcr_unicast_read_any()
687 		val = xe_mmio_read32(gt, reg);  in xe_gt_mcr_unicast_read_any()
695  * @gt: GT structure
703 u32 xe_gt_mcr_unicast_read(struct xe_gt *gt,  in xe_gt_mcr_unicast_read()  argument
709 	xe_gt_assert(gt, !IS_SRIOV_VF(gt_to_xe(gt)));  in xe_gt_mcr_unicast_read()
711 	mcr_lock(gt);  in xe_gt_mcr_unicast_read()
712 	val = rw_with_mcr_steering(gt, reg_mcr, MCR_OP_READ, group, instance, 0);  in xe_gt_mcr_unicast_read()
713 	mcr_unlock(gt);  in xe_gt_mcr_unicast_read()
720  * @gt: GT structure
729 void xe_gt_mcr_unicast_write(struct xe_gt *gt, struct xe_reg_mcr reg_mcr,  in xe_gt_mcr_unicast_write()  argument
732 	xe_gt_assert(gt, !IS_SRIOV_VF(gt_to_xe(gt)));  in xe_gt_mcr_unicast_write()
734 	mcr_lock(gt);  in xe_gt_mcr_unicast_write()
735 	rw_with_mcr_steering(gt, reg_mcr, MCR_OP_WRITE, group, instance, value);  in xe_gt_mcr_unicast_write()
736 	mcr_unlock(gt);  in xe_gt_mcr_unicast_write()
741  * @gt: GT structure
747 void xe_gt_mcr_multicast_write(struct xe_gt *gt, struct xe_reg_mcr reg_mcr,  in xe_gt_mcr_multicast_write()  argument
752 	xe_gt_assert(gt, !IS_SRIOV_VF(gt_to_xe(gt)));  in xe_gt_mcr_multicast_write()
759 	mcr_lock(gt);  in xe_gt_mcr_multicast_write()
760 	xe_mmio_write32(gt, reg, value);  in xe_gt_mcr_multicast_write()
761 	mcr_unlock(gt);  in xe_gt_mcr_multicast_write()
764 void xe_gt_mcr_steering_dump(struct xe_gt *gt, struct drm_printer *p)  in xe_gt_mcr_steering_dump()  argument
767 		if (gt->steering[i].ranges) {  in xe_gt_mcr_steering_dump()
770 				   gt->steering[i].group_target,  in xe_gt_mcr_steering_dump()
771 				   gt->steering[i].instance_target);  in xe_gt_mcr_steering_dump()
772 			for (int j = 0; gt->steering[i].ranges[j].end; j++)  in xe_gt_mcr_steering_dump()
774 					   gt->steering[i].ranges[j].start,  in xe_gt_mcr_steering_dump()
775 					   gt->steering[i].ranges[j].end);  in xe_gt_mcr_steering_dump()