Lines Matching refs:REG_BIT
65 .expected_set_bits = REG_BIT(0) | REG_BIT(1),
66 .expected_clr_bits = REG_BIT(0) | REG_BIT(1),
73 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
77 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))
85 .expected_set_bits = REG_BIT(0),
86 .expected_clr_bits = REG_BIT(0),
93 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
97 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))
105 .expected_set_bits = REG_BIT(0) | REG_BIT(1) | REG_BIT(2),
106 .expected_clr_bits = REG_BIT(0) | REG_BIT(1) | REG_BIT(2),
112 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
118 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))
122 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(2)))
126 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(3)))
138 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
147 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))
151 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(2)))
159 .expected_set_bits = REG_BIT(0),
160 .expected_clr_bits = REG_BIT(0),
167 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
171 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(1)))
179 .expected_set_bits = REG_BIT(0),
180 .expected_clr_bits = REG_BIT(0),
187 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
191 XE_RTP_ACTIONS(SET(REGULAR_REG2, REG_BIT(0)))
199 .expected_set_bits = REG_BIT(0),
200 .expected_clr_bits = REG_BIT(1) | REG_BIT(0),
207 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
211 XE_RTP_ACTIONS(CLR(REGULAR_REG1, REG_BIT(1)))
240 .expected_set_bits = REG_BIT(0),
241 .expected_clr_bits = REG_BIT(0),
248 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
253 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
261 .expected_set_bits = REG_BIT(0),
262 .expected_clr_bits = REG_BIT(0),
269 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
282 .expected_set_bits = REG_BIT(0),
283 .expected_clr_bits = REG_BIT(0),
290 XE_RTP_ACTIONS(SET(REGULAR_REG1, REG_BIT(0)))
295 XE_RTP_ACTIONS(SET(MCR_REG1, REG_BIT(1)))
300 XE_RTP_ACTIONS(SET(MASKED_REG1, REG_BIT(0)))