Lines Matching refs:VC4_HD_REG
156 #define VC4_HD_REG(reg, offset) _VC4_REG(VC4_HD, reg, offset) macro
166 VC4_HD_REG(HDMI_M_CTL, 0x000c),
167 VC4_HD_REG(HDMI_MAI_CTL, 0x0014),
168 VC4_HD_REG(HDMI_MAI_THR, 0x0018),
169 VC4_HD_REG(HDMI_MAI_FMT, 0x001c),
170 VC4_HD_REG(HDMI_MAI_DATA, 0x0020),
171 VC4_HD_REG(HDMI_MAI_SMP, 0x002c),
172 VC4_HD_REG(HDMI_VID_CTL, 0x0038),
173 VC4_HD_REG(HDMI_CSC_CTL, 0x0040),
174 VC4_HD_REG(HDMI_CSC_12_11, 0x0044),
175 VC4_HD_REG(HDMI_CSC_14_13, 0x0048),
176 VC4_HD_REG(HDMI_CSC_22_21, 0x004c),
177 VC4_HD_REG(HDMI_CSC_24_23, 0x0050),
178 VC4_HD_REG(HDMI_CSC_32_31, 0x0054),
179 VC4_HD_REG(HDMI_CSC_34_33, 0x0058),
180 VC4_HD_REG(HDMI_FRAME_COUNT, 0x0068),
229 VC4_HD_REG(HDMI_DVP_CTL, 0x0000),
230 VC4_HD_REG(HDMI_MAI_CTL, 0x0010),
231 VC4_HD_REG(HDMI_MAI_THR, 0x0014),
232 VC4_HD_REG(HDMI_MAI_FMT, 0x0018),
233 VC4_HD_REG(HDMI_MAI_DATA, 0x001c),
234 VC4_HD_REG(HDMI_MAI_SMP, 0x0020),
235 VC4_HD_REG(HDMI_VID_CTL, 0x0044),
236 VC4_HD_REG(HDMI_FRAME_COUNT, 0x0060),
322 VC4_HD_REG(HDMI_DVP_CTL, 0x0000),
323 VC4_HD_REG(HDMI_MAI_CTL, 0x0030),
324 VC4_HD_REG(HDMI_MAI_THR, 0x0034),
325 VC4_HD_REG(HDMI_MAI_FMT, 0x0038),
326 VC4_HD_REG(HDMI_MAI_DATA, 0x003c),
327 VC4_HD_REG(HDMI_MAI_SMP, 0x0040),
328 VC4_HD_REG(HDMI_VID_CTL, 0x0048),
329 VC4_HD_REG(HDMI_FRAME_COUNT, 0x0064),