Lines Matching +full:vga +full:- +full:format
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2006-2008 Intel Corporation
14 #include <linux/dma-buf.h>
34 stat = readl(priv->regs + TVE200_INT_STAT); in tve200_irq()
51 val = readl(priv->regs + TVE200_CTRL); in tve200_irq()
54 drm_crtc_handle_vblank(&priv->pipe.crtc); in tve200_irq()
61 writel(val, priv->regs + TVE200_CTRL); in tve200_irq()
63 dev_err(priv->drm->dev, "stray IRQ %08x\n", stat); in tve200_irq()
66 writel(stat, priv->regs + TVE200_INT_CLR); in tve200_irq()
75 const struct drm_display_mode *mode = &cstate->mode; in tve200_display_check()
76 struct drm_framebuffer *old_fb = pipe->plane.state->fb; in tve200_display_check()
77 struct drm_framebuffer *fb = pstate->fb; in tve200_display_check()
82 if (!(mode->hdisplay == 352 && mode->vdisplay == 240) && /* SIF(525) */ in tve200_display_check()
83 !(mode->hdisplay == 352 && mode->vdisplay == 288) && /* CIF(625) */ in tve200_display_check()
84 !(mode->hdisplay == 640 && mode->vdisplay == 480) && /* VGA */ in tve200_display_check()
85 !(mode->hdisplay == 720 && mode->vdisplay == 480) && /* D1 */ in tve200_display_check()
86 !(mode->hdisplay == 720 && mode->vdisplay == 576)) { /* D1 */ in tve200_display_check()
88 mode->hdisplay, mode->vdisplay); in tve200_display_check()
89 return -EINVAL; in tve200_display_check()
97 DRM_DEBUG_KMS("FB not 32-bit aligned\n"); in tve200_display_check()
98 return -EINVAL; in tve200_display_check()
105 if (fb->pitches[0] != mode->hdisplay * fb->format->cpp[0]) { in tve200_display_check()
107 return -EINVAL; in tve200_display_check()
111 * We can't change the FB format in a flicker-free in tve200_display_check()
114 if (old_fb && old_fb->format != fb->format) in tve200_display_check()
115 cstate->mode_changed = true; in tve200_display_check()
125 struct drm_crtc *crtc = &pipe->crtc; in tve200_display_enable()
126 struct drm_plane *plane = &pipe->plane; in tve200_display_enable()
127 struct drm_device *drm = crtc->dev; in tve200_display_enable()
128 struct tve200_drm_dev_private *priv = drm->dev_private; in tve200_display_enable()
129 const struct drm_display_mode *mode = &cstate->mode; in tve200_display_enable()
130 struct drm_framebuffer *fb = plane->state->fb; in tve200_display_enable()
131 struct drm_connector *connector = priv->connector; in tve200_display_enable()
132 u32 format = fb->format->format; in tve200_display_enable() local
136 clk_prepare_enable(priv->clk); in tve200_display_enable()
139 writel(TVE200_CTRL_4_RESET, priv->regs + TVE200_CTRL_4); in tve200_display_enable()
142 if (readl(priv->regs + TVE200_CTRL_4) & TVE200_CTRL_4_RESET) in tve200_display_enable()
148 readl(priv->regs + TVE200_CTRL_4) & TVE200_CTRL_4_RESET) { in tve200_display_enable()
149 dev_err(drm->dev, "can't get hardware out of reset\n"); in tve200_display_enable()
167 if (connector->display_info.bus_flags & in tve200_display_enable()
171 if ((mode->hdisplay == 352 && mode->vdisplay == 240) || /* SIF(525) */ in tve200_display_enable()
172 (mode->hdisplay == 352 && mode->vdisplay == 288)) { /* CIF(625) */ in tve200_display_enable()
174 dev_info(drm->dev, "CIF mode\n"); in tve200_display_enable()
175 } else if (mode->hdisplay == 640 && mode->vdisplay == 480) { in tve200_display_enable()
177 dev_info(drm->dev, "VGA mode\n"); in tve200_display_enable()
178 } else if ((mode->hdisplay == 720 && mode->vdisplay == 480) || in tve200_display_enable()
179 (mode->hdisplay == 720 && mode->vdisplay == 576)) { in tve200_display_enable()
181 dev_info(drm->dev, "D1 mode\n"); in tve200_display_enable()
184 if (format & DRM_FORMAT_BIG_ENDIAN) { in tve200_display_enable()
186 format &= ~DRM_FORMAT_BIG_ENDIAN; in tve200_display_enable()
189 switch (format) { in tve200_display_enable()
229 dev_err(drm->dev, "Unknown FB format 0x%08x\n", in tve200_display_enable()
230 fb->format->format); in tve200_display_enable()
237 writel(ctrl1, priv->regs + TVE200_CTRL); in tve200_display_enable()
244 struct drm_crtc *crtc = &pipe->crtc; in tve200_display_disable()
245 struct drm_device *drm = crtc->dev; in tve200_display_disable()
246 struct tve200_drm_dev_private *priv = drm->dev_private; in tve200_display_disable()
251 writel(0, priv->regs + TVE200_CTRL); in tve200_display_disable()
252 writel(TVE200_CTRL_4_RESET, priv->regs + TVE200_CTRL_4); in tve200_display_disable()
254 clk_disable_unprepare(priv->clk); in tve200_display_disable()
260 struct drm_crtc *crtc = &pipe->crtc; in tve200_display_update()
261 struct drm_device *drm = crtc->dev; in tve200_display_update()
262 struct tve200_drm_dev_private *priv = drm->dev_private; in tve200_display_update()
263 struct drm_pending_vblank_event *event = crtc->state->event; in tve200_display_update()
264 struct drm_plane *plane = &pipe->plane; in tve200_display_update()
265 struct drm_plane_state *pstate = plane->state; in tve200_display_update()
266 struct drm_framebuffer *fb = pstate->fb; in tve200_display_update()
271 priv->regs + TVE200_Y_FRAME_BASE_ADDR); in tve200_display_update()
274 if (fb->format->format == DRM_FORMAT_YUV420) { in tve200_display_update()
276 priv->regs + TVE200_U_FRAME_BASE_ADDR); in tve200_display_update()
278 priv->regs + TVE200_V_FRAME_BASE_ADDR); in tve200_display_update()
283 crtc->state->event = NULL; in tve200_display_update()
285 spin_lock_irq(&crtc->dev->event_lock); in tve200_display_update()
286 if (crtc->state->active && drm_crtc_vblank_get(crtc) == 0) in tve200_display_update()
290 spin_unlock_irq(&crtc->dev->event_lock); in tve200_display_update()
296 struct drm_crtc *crtc = &pipe->crtc; in tve200_display_enable_vblank()
297 struct drm_device *drm = crtc->dev; in tve200_display_enable_vblank()
298 struct tve200_drm_dev_private *priv = drm->dev_private; in tve200_display_enable_vblank()
301 writel(0xFF, priv->regs + TVE200_INT_CLR); in tve200_display_enable_vblank()
302 writel(TVE200_INT_V_STATUS, priv->regs + TVE200_INT_EN); in tve200_display_enable_vblank()
308 struct drm_crtc *crtc = &pipe->crtc; in tve200_display_disable_vblank()
309 struct drm_device *drm = crtc->dev; in tve200_display_disable_vblank()
310 struct tve200_drm_dev_private *priv = drm->dev_private; in tve200_display_disable_vblank()
312 writel(0, priv->regs + TVE200_INT_EN); in tve200_display_disable_vblank()
326 struct tve200_drm_dev_private *priv = drm->dev_private; in tve200_display_init()
348 ret = drm_simple_display_pipe_init(drm, &priv->pipe, in tve200_display_init()
352 priv->connector); in tve200_display_init()