29 #define HX8357D_SETOSC 0xb0
30 #define HX8357D_SETPOWER 0xb1
31 #define HX8357D_SETRGB 0xb3
32 #define HX8357D_SETCYC 0xb3
33 #define HX8357D_SETCOM 0xb6
34 #define HX8357D_SETEXTC 0xb9
35 #define HX8357D_SETSTBA 0xc0
36 #define HX8357D_SETPANEL 0xcc
37 #define HX8357D_SETGAMMA 0xe0
39 #define HX8357D_MADCTL_MY  0x80
40 #define HX8357D_MADCTL_MX  0x40
41 #define HX8357D_MADCTL_MV  0x20
42 #define HX8357D_MADCTL_ML  0x10
43 #define HX8357D_MADCTL_RGB 0x00
44 #define HX8357D_MADCTL_BGR 0x08
45 #define HX8357D_MADCTL_MH  0x04
62 	if (ret < 0)  in yx240qv29_enable()
68 	mipi_dbi_command(dbi, HX8357D_SETEXTC, 0xFF, 0x83, 0x57);  in yx240qv29_enable()
72 	mipi_dbi_command(dbi, HX8357D_SETRGB, 0x00, 0x00, 0x06, 0x06);  in yx240qv29_enable()
75 	mipi_dbi_command(dbi, HX8357D_SETCOM, 0x25);  in yx240qv29_enable()
78 	mipi_dbi_command(dbi, HX8357D_SETOSC, 0x68);  in yx240qv29_enable()
81 	mipi_dbi_command(dbi, HX8357D_SETPANEL, 0x05);  in yx240qv29_enable()
84 			 0x00,  /* Not deep standby */  in yx240qv29_enable()
85 			 0x15,  /* BT */  in yx240qv29_enable()
86 			 0x1C,  /* VSPR */  in yx240qv29_enable()
87 			 0x1C,  /* VSNR */  in yx240qv29_enable()
88 			 0x83,  /* AP */  in yx240qv29_enable()
89 			 0xAA);  /* FS */  in yx240qv29_enable()
92 			 0x50,  /* OPON normal */  in yx240qv29_enable()
93 			 0x50,  /* OPON idle */  in yx240qv29_enable()
94 			 0x01,  /* STBA */  in yx240qv29_enable()
95 			 0x3C,  /* STBA */  in yx240qv29_enable()
96 			 0x1E,  /* STBA */  in yx240qv29_enable()
97 			 0x08);  /* GEN */  in yx240qv29_enable()
100 			 0x02,  /* NW 0x02 */  in yx240qv29_enable()
101 			 0x40,  /* RTN */  in yx240qv29_enable()
102 			 0x00,  /* DIV */  in yx240qv29_enable()
103 			 0x2A,  /* DUM */  in yx240qv29_enable()
104 			 0x2A,  /* DUM */  in yx240qv29_enable()
105 			 0x0D,  /* GDON */  in yx240qv29_enable()
106 			 0x78);  /* GDOFF */  in yx240qv29_enable()
109 			 0x02,  in yx240qv29_enable()
110 			 0x0A,  in yx240qv29_enable()
111 			 0x11,  in yx240qv29_enable()
112 			 0x1d,  in yx240qv29_enable()
113 			 0x23,  in yx240qv29_enable()
114 			 0x35,  in yx240qv29_enable()
115 			 0x41,  in yx240qv29_enable()
116 			 0x4b,  in yx240qv29_enable()
117 			 0x4b,  in yx240qv29_enable()
118 			 0x42,  in yx240qv29_enable()
119 			 0x3A,  in yx240qv29_enable()
120 			 0x27,  in yx240qv29_enable()
121 			 0x1B,  in yx240qv29_enable()
122 			 0x08,  in yx240qv29_enable()
123 			 0x09,  in yx240qv29_enable()
124 			 0x03,  in yx240qv29_enable()
125 			 0x02,  in yx240qv29_enable()
126 			 0x0A,  in yx240qv29_enable()
127 			 0x11,  in yx240qv29_enable()
128 			 0x1d,  in yx240qv29_enable()
129 			 0x23,  in yx240qv29_enable()
130 			 0x35,  in yx240qv29_enable()
131 			 0x41,  in yx240qv29_enable()
132 			 0x4b,  in yx240qv29_enable()
133 			 0x4b,  in yx240qv29_enable()
134 			 0x42,  in yx240qv29_enable()
135 			 0x3A,  in yx240qv29_enable()
136 			 0x27,  in yx240qv29_enable()
137 			 0x1B,  in yx240qv29_enable()
138 			 0x08,  in yx240qv29_enable()
139 			 0x09,  in yx240qv29_enable()
140 			 0x03,  in yx240qv29_enable()
141 			 0x00,  in yx240qv29_enable()
142 			 0x01);  in yx240qv29_enable()
149 	mipi_dbi_command(dbi, MIPI_DCS_SET_TEAR_ON, 0x00);  in yx240qv29_enable()
152 	mipi_dbi_command(dbi, MIPI_DCS_SET_TEAR_SCANLINE, 0x00, 0x02);  in yx240qv29_enable()
171 		addr_mode = 0;  in yx240qv29_enable()
202 	.minor			= 0,
212 	{ "yx350hv15", 0 },
223 	u32 rotation = 0;  in hx8357d_probe()
253 	ret = drm_dev_register(drm, 0);  in hx8357d_probe()
259 	drm_fbdev_dma_setup(drm, 0);  in hx8357d_probe()
261 	return 0;  in hx8357d_probe()