Lines Matching refs:tilcdc_write
107 tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, in tilcdc_crtc_load_palette()
109 tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, in tilcdc_crtc_load_palette()
122 tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_PL_INT_ENA); in tilcdc_crtc_load_palette()
138 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, LCDC_V2_PL_INT_ENA); in tilcdc_crtc_load_palette()
152 tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, in tilcdc_crtc_enable_irqs()
170 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, in tilcdc_crtc_disable_irqs()
258 tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) | in tilcdc_crtc_set_clk()
312 tilcdc_write(dev, LCDC_DMA_CTRL_REG, reg); in tilcdc_crtc_set_mode()
341 tilcdc_write(dev, LCDC_RASTER_TIMING_2_REG, reg); in tilcdc_crtc_set_mode()
349 tilcdc_write(dev, LCDC_RASTER_TIMING_0_REG, reg); in tilcdc_crtc_set_mode()
355 tilcdc_write(dev, LCDC_RASTER_TIMING_1_REG, reg); in tilcdc_crtc_set_mode()
399 tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg); in tilcdc_crtc_set_mode()
743 tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, LCDC_FRAME_DONE); in tilcdc_crtc_reset()
966 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, in tilcdc_crtc_irq()
990 tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, in tilcdc_crtc_irq()
1011 tilcdc_write(dev, LCDC_END_OF_INT_IND_REG, 0); in tilcdc_crtc_irq()