Lines Matching refs:hw_videoport
439 static void dispc_ovr_write(struct dispc_device *dispc, u32 hw_videoport, in dispc_ovr_write() argument
442 void __iomem *base = dispc->base_ovr[hw_videoport]; in dispc_ovr_write()
447 static u32 dispc_ovr_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg) in dispc_ovr_read() argument
449 void __iomem *base = dispc->base_ovr[hw_videoport]; in dispc_ovr_read()
454 static void dispc_vp_write(struct dispc_device *dispc, u32 hw_videoport, in dispc_vp_write() argument
457 void __iomem *base = dispc->base_vp[hw_videoport]; in dispc_vp_write()
462 static u32 dispc_vp_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg) in dispc_vp_read() argument
464 void __iomem *base = dispc->base_vp[hw_videoport]; in dispc_vp_read()
548 static dispc_irq_t dispc_vp_irq_from_raw(u32 stat, u32 hw_videoport) in dispc_vp_irq_from_raw() argument
553 vp_stat |= DSS_IRQ_VP_FRAME_DONE(hw_videoport); in dispc_vp_irq_from_raw()
555 vp_stat |= DSS_IRQ_VP_VSYNC_EVEN(hw_videoport); in dispc_vp_irq_from_raw()
557 vp_stat |= DSS_IRQ_VP_VSYNC_ODD(hw_videoport); in dispc_vp_irq_from_raw()
559 vp_stat |= DSS_IRQ_VP_SYNC_LOST(hw_videoport); in dispc_vp_irq_from_raw()
564 static u32 dispc_vp_irq_to_raw(dispc_irq_t vpstat, u32 hw_videoport) in dispc_vp_irq_to_raw() argument
568 if (vpstat & DSS_IRQ_VP_FRAME_DONE(hw_videoport)) in dispc_vp_irq_to_raw()
570 if (vpstat & DSS_IRQ_VP_VSYNC_EVEN(hw_videoport)) in dispc_vp_irq_to_raw()
572 if (vpstat & DSS_IRQ_VP_VSYNC_ODD(hw_videoport)) in dispc_vp_irq_to_raw()
574 if (vpstat & DSS_IRQ_VP_SYNC_LOST(hw_videoport)) in dispc_vp_irq_to_raw()
601 u32 hw_videoport) in dispc_k2g_vp_read_irqstatus() argument
603 u32 stat = dispc_vp_read(dispc, hw_videoport, DISPC_VP_K2G_IRQSTATUS); in dispc_k2g_vp_read_irqstatus()
605 return dispc_vp_irq_from_raw(stat, hw_videoport); in dispc_k2g_vp_read_irqstatus()
609 u32 hw_videoport, dispc_irq_t vpstat) in dispc_k2g_vp_write_irqstatus() argument
611 u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport); in dispc_k2g_vp_write_irqstatus()
613 dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_IRQSTATUS, stat); in dispc_k2g_vp_write_irqstatus()
633 u32 hw_videoport) in dispc_k2g_vp_read_irqenable() argument
635 u32 stat = dispc_vp_read(dispc, hw_videoport, DISPC_VP_K2G_IRQENABLE); in dispc_k2g_vp_read_irqenable()
637 return dispc_vp_irq_from_raw(stat, hw_videoport); in dispc_k2g_vp_read_irqenable()
641 u32 hw_videoport, dispc_irq_t vpstat) in dispc_k2g_vp_set_irqenable() argument
643 u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport); in dispc_k2g_vp_set_irqenable()
645 dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_IRQENABLE, stat); in dispc_k2g_vp_set_irqenable()
716 u32 hw_videoport) in dispc_k3_vp_read_irqstatus() argument
718 u32 stat = dispc_read(dispc, DISPC_VP_IRQSTATUS(hw_videoport)); in dispc_k3_vp_read_irqstatus()
720 return dispc_vp_irq_from_raw(stat, hw_videoport); in dispc_k3_vp_read_irqstatus()
724 u32 hw_videoport, dispc_irq_t vpstat) in dispc_k3_vp_write_irqstatus() argument
726 u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport); in dispc_k3_vp_write_irqstatus()
728 dispc_write(dispc, DISPC_VP_IRQSTATUS(hw_videoport), stat); in dispc_k3_vp_write_irqstatus()
748 u32 hw_videoport) in dispc_k3_vp_read_irqenable() argument
750 u32 stat = dispc_read(dispc, DISPC_VP_IRQENABLE(hw_videoport)); in dispc_k3_vp_read_irqenable()
752 return dispc_vp_irq_from_raw(stat, hw_videoport); in dispc_k3_vp_read_irqenable()
756 u32 hw_videoport, dispc_irq_t vpstat) in dispc_k3_vp_set_irqenable() argument
758 u32 stat = dispc_vp_irq_to_raw(vpstat, hw_videoport); in dispc_k3_vp_set_irqenable()
760 dispc_write(dispc, DISPC_VP_IRQENABLE(hw_videoport), stat); in dispc_k3_vp_set_irqenable()
932 u32 hw_videoport, in dispc_vp_find_bus_fmt() argument
945 int dispc_vp_bus_check(struct dispc_device *dispc, u32 hw_videoport, in dispc_vp_bus_check() argument
951 fmt = dispc_vp_find_bus_fmt(dispc, hw_videoport, tstate->bus_format, in dispc_vp_bus_check()
959 if (dispc->feat->vp_bus_type[hw_videoport] != DISPC_VP_OLDI && in dispc_vp_bus_check()
962 __func__, dispc->feat->vp_name[hw_videoport]); in dispc_vp_bus_check()
989 u32 hw_videoport, int num_lines) in dispc_set_num_datalines() argument
1011 VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, v, 10, 8); in dispc_set_num_datalines()
1014 static void dispc_enable_oldi(struct dispc_device *dispc, u32 hw_videoport, in dispc_enable_oldi() argument
1018 u32 oldi_reset_bit = BIT(5 + hw_videoport); in dispc_enable_oldi()
1040 dispc_vp_write(dispc, hw_videoport, DISPC_VP_DSS_OLDI_CFG, oldi_cfg); in dispc_enable_oldi()
1051 void dispc_vp_prepare(struct dispc_device *dispc, u32 hw_videoport, in dispc_vp_prepare() argument
1057 fmt = dispc_vp_find_bus_fmt(dispc, hw_videoport, tstate->bus_format, in dispc_vp_prepare()
1063 if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI) { in dispc_vp_prepare()
1066 dispc_enable_oldi(dispc, hw_videoport, fmt); in dispc_vp_prepare()
1070 void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport, in dispc_vp_enable() argument
1079 fmt = dispc_vp_find_bus_fmt(dispc, hw_videoport, tstate->bus_format, in dispc_vp_enable()
1085 dispc_set_num_datalines(dispc, hw_videoport, fmt->data_width); in dispc_vp_enable()
1095 dispc_vp_write(dispc, hw_videoport, DISPC_VP_TIMING_H, in dispc_vp_enable()
1100 dispc_vp_write(dispc, hw_videoport, DISPC_VP_TIMING_V, in dispc_vp_enable()
1122 if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI) in dispc_vp_enable()
1125 dispc_vp_write(dispc, hw_videoport, DISPC_VP_POL_FREQ, in dispc_vp_enable()
1134 dispc_vp_write(dispc, hw_videoport, DISPC_VP_SIZE_SCREEN, in dispc_vp_enable()
1138 VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 0, 0); in dispc_vp_enable()
1141 void dispc_vp_disable(struct dispc_device *dispc, u32 hw_videoport) in dispc_vp_disable() argument
1143 VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 0, 0, 0); in dispc_vp_disable()
1146 void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport) in dispc_vp_unprepare() argument
1148 if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI) { in dispc_vp_unprepare()
1149 dispc_vp_write(dispc, hw_videoport, DISPC_VP_DSS_OLDI_CFG, 0); in dispc_vp_unprepare()
1155 bool dispc_vp_go_busy(struct dispc_device *dispc, u32 hw_videoport) in dispc_vp_go_busy() argument
1157 return VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5); in dispc_vp_go_busy()
1160 void dispc_vp_go(struct dispc_device *dispc, u32 hw_videoport) in dispc_vp_go() argument
1162 WARN_ON(VP_REG_GET(dispc, hw_videoport, DISPC_VP_CONTROL, 5, 5)); in dispc_vp_go()
1163 VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 5, 5); in dispc_vp_go()
1207 u32 hw_videoport, u32 default_color) in dispc_vp_set_default_color() argument
1213 dispc_ovr_write(dispc, hw_videoport, in dispc_vp_set_default_color()
1215 dispc_ovr_write(dispc, hw_videoport, in dispc_vp_set_default_color()
1220 u32 hw_videoport, in dispc_vp_mode_valid() argument
1227 bus_type = dispc->feat->vp_bus_type[hw_videoport]; in dispc_vp_mode_valid()
1293 int dispc_vp_enable_clk(struct dispc_device *dispc, u32 hw_videoport) in dispc_vp_enable_clk() argument
1295 int ret = clk_prepare_enable(dispc->vp_clk[hw_videoport]); in dispc_vp_enable_clk()
1304 void dispc_vp_disable_clk(struct dispc_device *dispc, u32 hw_videoport) in dispc_vp_disable_clk() argument
1306 clk_disable_unprepare(dispc->vp_clk[hw_videoport]); in dispc_vp_disable_clk()
1321 int dispc_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport, in dispc_vp_set_clk_rate() argument
1327 r = clk_set_rate(dispc->vp_clk[hw_videoport], rate); in dispc_vp_set_clk_rate()
1330 hw_videoport, rate); in dispc_vp_set_clk_rate()
1334 new_rate = clk_get_rate(dispc->vp_clk[hw_videoport]); in dispc_vp_set_clk_rate()
1339 hw_videoport, new_rate, rate); in dispc_vp_set_clk_rate()
1342 hw_videoport, clk_get_rate(dispc->vp_clk[hw_videoport]), rate); in dispc_vp_set_clk_rate()
1349 u32 hw_plane, u32 hw_videoport, in dispc_k2g_ovr_set_plane() argument
1358 u32 hw_plane, u32 hw_videoport, in dispc_am65x_ovr_set_plane() argument
1361 OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer), in dispc_am65x_ovr_set_plane()
1363 OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer), in dispc_am65x_ovr_set_plane()
1365 OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer), in dispc_am65x_ovr_set_plane()
1370 u32 hw_plane, u32 hw_videoport, in dispc_j721e_ovr_set_plane() argument
1373 OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer), in dispc_j721e_ovr_set_plane()
1375 OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES2(layer), in dispc_j721e_ovr_set_plane()
1377 OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES2(layer), in dispc_j721e_ovr_set_plane()
1382 u32 hw_videoport, u32 x, u32 y, u32 layer) in dispc_ovr_set_plane() argument
1386 dispc_k2g_ovr_set_plane(dispc, hw_plane, hw_videoport, in dispc_ovr_set_plane()
1392 dispc_am65x_ovr_set_plane(dispc, hw_plane, hw_videoport, in dispc_ovr_set_plane()
1396 dispc_j721e_ovr_set_plane(dispc, hw_plane, hw_videoport, in dispc_ovr_set_plane()
1406 u32 hw_videoport, u32 layer, bool enable) in dispc_ovr_enable_layer() argument
1411 OVR_REG_FLD_MOD(dispc, hw_videoport, DISPC_OVR_ATTRIBUTES(layer), in dispc_ovr_enable_layer()
2026 u32 hw_videoport) in dispc_plane_check() argument
2097 u32 hw_videoport) in dispc_plane_setup() argument
2346 u32 hw_videoport) in dispc_k2g_vp_write_gamma_table() argument
2348 u32 *table = dispc->vp_data[hw_videoport].gamma_table; in dispc_k2g_vp_write_gamma_table()
2352 dev_dbg(dispc->dev, "%s: hw_videoport %d\n", __func__, hw_videoport); in dispc_k2g_vp_write_gamma_table()
2362 dispc_vp_write(dispc, hw_videoport, DISPC_VP_K2G_GAMMA_TABLE, in dispc_k2g_vp_write_gamma_table()
2368 u32 hw_videoport) in dispc_am65x_vp_write_gamma_table() argument
2370 u32 *table = dispc->vp_data[hw_videoport].gamma_table; in dispc_am65x_vp_write_gamma_table()
2374 dev_dbg(dispc->dev, "%s: hw_videoport %d\n", __func__, hw_videoport); in dispc_am65x_vp_write_gamma_table()
2384 dispc_vp_write(dispc, hw_videoport, DISPC_VP_GAMMA_TABLE, v); in dispc_am65x_vp_write_gamma_table()
2389 u32 hw_videoport) in dispc_j721e_vp_write_gamma_table() argument
2391 u32 *table = dispc->vp_data[hw_videoport].gamma_table; in dispc_j721e_vp_write_gamma_table()
2395 dev_dbg(dispc->dev, "%s: hw_videoport %d\n", __func__, hw_videoport); in dispc_j721e_vp_write_gamma_table()
2406 dispc_vp_write(dispc, hw_videoport, DISPC_VP_GAMMA_TABLE, v); in dispc_j721e_vp_write_gamma_table()
2411 u32 hw_videoport) in dispc_vp_write_gamma_table() argument
2415 dispc_k2g_vp_write_gamma_table(dispc, hw_videoport); in dispc_vp_write_gamma_table()
2420 dispc_am65x_vp_write_gamma_table(dispc, hw_videoport); in dispc_vp_write_gamma_table()
2423 dispc_j721e_vp_write_gamma_table(dispc, hw_videoport); in dispc_vp_write_gamma_table()
2437 u32 hw_videoport, in dispc_vp_set_gamma() argument
2441 u32 *table = dispc->vp_data[hw_videoport].gamma_table; in dispc_vp_set_gamma()
2447 __func__, hw_videoport, length, hwlen); in dispc_vp_set_gamma()
2483 dispc_vp_write_gamma_table(dispc, hw_videoport); in dispc_vp_set_gamma()
2530 static void dispc_k2g_vp_write_csc(struct dispc_device *dispc, u32 hw_videoport, in dispc_k2g_vp_write_csc() argument
2543 dispc_vp_write(dispc, hw_videoport, dispc_vp_cpr_coef_reg[i], in dispc_k2g_vp_write_csc()
2547 static void dispc_k2g_vp_set_ctm(struct dispc_device *dispc, u32 hw_videoport, in dispc_k2g_vp_set_ctm() argument
2556 dispc_k2g_vp_write_csc(dispc, hw_videoport, &cpr); in dispc_k2g_vp_set_ctm()
2560 VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONFIG, in dispc_k2g_vp_set_ctm()
2595 static void dispc_k3_vp_write_csc(struct dispc_device *dispc, u32 hw_videoport, in dispc_k3_vp_write_csc() argument
2609 dispc_vp_write(dispc, hw_videoport, dispc_vp_csc_coef_reg[i], in dispc_k3_vp_write_csc()
2613 static void dispc_k3_vp_set_ctm(struct dispc_device *dispc, u32 hw_videoport, in dispc_k3_vp_set_ctm() argument
2622 dispc_k3_vp_write_csc(dispc, hw_videoport, &csc); in dispc_k3_vp_set_ctm()
2626 VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONFIG, in dispc_k3_vp_set_ctm()
2631 u32 hw_videoport, in dispc_vp_set_color_mgmt() argument
2647 dispc_vp_set_gamma(dispc, hw_videoport, lut, length); in dispc_vp_set_color_mgmt()
2653 dispc_k2g_vp_set_ctm(dispc, hw_videoport, ctm); in dispc_vp_set_color_mgmt()
2655 dispc_k3_vp_set_ctm(dispc, hw_videoport, ctm); in dispc_vp_set_color_mgmt()
2658 void dispc_vp_setup(struct dispc_device *dispc, u32 hw_videoport, in dispc_vp_setup() argument
2661 dispc_vp_set_default_color(dispc, hw_videoport, 0); in dispc_vp_setup()
2662 dispc_vp_set_color_mgmt(dispc, hw_videoport, state, newmodeset); in dispc_vp_setup()